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2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
4 * @APPLE_LICENSE_HEADER_START@
6 * Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved.
8 * This file contains Original Code and/or Modifications of Original Code
9 * as defined in and that are subject to the Apple Public Source License
10 * Version 2.0 (the 'License'). You may not use this file except in
11 * compliance with the License. Please obtain a copy of the License at
12 * http://www.opensource.apple.com/apsl/ and read it before using this
15 * The Original Code and all software distributed under the License are
16 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
17 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
18 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
20 * Please see the License for the specific language governing rights and
21 * limitations under the License.
23 * @APPLE_LICENSE_HEADER_END@
26 * @OSF_FREE_COPYRIGHT@
29 * @APPLE_FREE_COPYRIGHT@
33 * Author: Bill Angell, Apple
40 #include <kern/machine.h>
41 #include <kern/processor.h>
42 #include <mach/machine.h>
43 #include <mach/processor_info.h>
44 #include <mach/mach_types.h>
45 #include <mach/boolean.h>
46 #include <kern/thread.h>
47 #include <kern/task.h>
48 #include <mach/vm_param.h>
49 #include <vm/vm_kern.h>
50 #include <vm/vm_map.h>
51 #include <vm/vm_page.h>
53 #include <ppc/exception.h>
54 #include <ppc/Firmware.h>
55 #include <ppc/low_trace.h>
56 #include <ppc/db_low_trace.h>
57 #include <ppc/mappings.h>
60 #include <ppc/savearea.h>
61 #include <ppc/Diagnostics.h>
62 #include <ppc/machine_cpu.h>
63 #include <pexpert/pexpert.h>
64 #include <ppc/POWERMAC/video_console.h>
67 extern struct vc_info vinfo
;
69 kern_return_t
testPerfTrap(int trapno
, struct savearea
*ss
,
70 unsigned int dsisr
, unsigned int dar
);
72 int diagCall(struct savearea
*save
) {
75 unsigned long long tbase
;
78 natural_t tbu
, tbu2
, tbl
;
79 struct per_proc_info
*per_proc
; /* Area for my per_proc address */
81 unsigned int tstrt
, tend
, temp
, temp2
;
83 uint64_t scom
, hid1
, hid4
, srrwrk
, stat
;
86 if(!(dgWork
.dgFlags
& enaDiagSCs
)) return 0; /* If not enabled, cause an exception */
88 switch(save
->save_r3
) { /* Select the routine */
91 * Adjust the timebase for drift recovery testing
93 case dgAdjTB
: /* Adjust the timebase */
95 adj
.tb
[0] = 0; /* Clear high part */
96 adj
.tb
[1] = save
->save_r4
; /* Set low order */
97 if(adj
.tb
[1] & 0x80000000) adj
.tb
[0] = 0xFFFFFFFF; /* Propagate sign bit */
99 do { /* Read current time */
100 asm volatile(" mftbu %0" : "=r" (tbu
));
101 asm volatile(" mftb %0" : "=r" (tbl
));
102 asm volatile(" mftbu %0" : "=r" (tbu2
));
103 } while (tbu
!= tbu2
);
105 ttt
.tb
[0] = tbu
; /* Set high */
106 ttt
.tb
[1] = tbl
; /* Set low */
108 ttt
.tbase
= ttt
.tbase
+ adj
.tbase
; /* Increment or decrement the TB */
110 tbu
= ttt
.tb
[0]; /* Save in regular variable */
111 tbl
= ttt
.tb
[1]; /* Save in regular variable */
113 mttb(0); /* Set low to keep from ticking */
114 mttbu(tbu
); /* Set adjusted high */
115 mttb(tbl
); /* Set adjusted low */
117 return -1; /* Return no AST checking... */
120 * Return physical address of a page
124 save
->save_r3
= pmap_find_phys(current_act()->map
->pmap
, save
->save_r4
); /* Get read address */
126 return -1; /* Return no AST checking... */
129 * Copy physical to virtual
135 src
= (save
->save_r4
<< 32) | (0x00000000FFFFFFFFULL
& save
->save_r5
); /* Merge into 64-bit */
136 snk
= (save
->save_r6
<< 32) | (0x00000000FFFFFFFFULL
& save
->save_r7
); /* Merge into 64-bit */
137 save
->save_r3
= copypv(src
, snk
, save
->save_r8
, save
->save_r9
); /* Copy the physical page */
139 return 1; /* Return and check for ASTs... */
142 * Read/Write physical memory
146 src
= (save
->save_r5
<< 32) | (0x00000000FFFFFFFFULL
& save
->save_r6
); /* Merge into 64-bit */
148 switch(save
->save_r4
) { /* Select the actual function */
151 save
->save_r3
= (uint64_t)ml_phys_read_byte((unsigned int)src
);
155 save
->save_r3
= (uint64_t)ml_phys_read_byte_64(src
);
159 save
->save_r3
= (uint64_t)ml_phys_read((unsigned int)src
);
163 save
->save_r3
= (uint64_t)ml_phys_read_64(src
);
167 ml_phys_write_byte((unsigned int)src
, (unsigned int)save
->save_r7
);
171 ml_phys_write_byte_64(src
, (unsigned int)save
->save_r7
);
175 ml_phys_write((unsigned int)src
, (unsigned int)save
->save_r7
);
179 ml_phys_write_64(src
, (unsigned int)save
->save_r7
);
183 return 1; /* Return and check for ASTs... */
187 * Soft reset processor
191 cpu
= save
->save_r4
; /* Get the requested CPU number */
193 if(cpu
>= NCPUS
) { /* Check for bogus cpu */
194 save
->save_r3
= KERN_FAILURE
; /* Set failure */
198 if(!machine_slot
[cpu
].running
) return KERN_FAILURE
; /* It is not running */
200 per_proc
= &per_proc_info
[cpu
]; /* Point to the processor */
202 (void)PE_cpu_start(per_proc
->cpu_id
,
203 per_proc
->start_paddr
, (vm_offset_t
)per_proc
);
205 save
->save_r3
= KERN_SUCCESS
; /* Set scuuess */
207 return 1; /* Return and check for ASTs... */
214 cacheInit(); /* Blow cache */
215 return 1; /* Return and check for ASTs... */
222 if(save
->save_r4
) perfTrapHook
= testPerfTrap
;
223 else perfTrapHook
= 0;
225 return 1; /* Return and check for ASTs... */
230 * Create a physical block map into the current task
231 * Don't bother to check for any errors.
232 * parms - vaddr, paddr, size, prot, attributes
236 pmap_map_block(current_act()->map
->pmap
, (addr64_t
)save
->save_r4
, /* Map in the block */
237 save
->save_r5
, save
->save_r6
, save
->save_r7
, save
->save_r8
, 0);
239 return 1; /* Return and check for ASTs... */
243 * Remove any mapping from the current task
244 * Don't bother to check for any errors.
249 (void)mapping_remove(current_act()->map
->pmap
, save
->save_r4
); /* Remove mapping */
250 return 1; /* Return and check for ASTs... */
254 * Allows direct control of alignment handling.
256 * The bottom bit of the parameter is used to set the control bit, enaNotifyEM.
260 temp
= dgWork
.dgFlags
; /* Save the old values */
262 temp2
= (save
->save_r4
& 1) << (31 - enaNotifyEMb
); /* Move parms into flag format */
263 dgWork
.dgFlags
= (temp
& ~enaNotifyEM
) | temp2
; /* Set the flag */
265 save
->save_r3
= (temp
>> (31 - enaNotifyEMb
)) & 1; /* Return the original */
267 return 1; /* Return and check for ASTs... */
270 * Return info for boot screen
274 ml_set_interrupts_enabled(1);
275 (void)copyout((char *)&vinfo
, (char *)save
->save_r4
, sizeof(struct vc_info
)); /* Copy out the video info */
276 ml_set_interrupts_enabled(0);
277 return 1; /* Return and check for ASTs... */
280 * Don't return info for boot screen
284 ml_set_interrupts_enabled(1);
285 (void)copyout((char *)&vinfo
, (char *)save
->save_r4
, 0); /* Copy out nothing */
286 ml_set_interrupts_enabled(0);
287 return 1; /* Return and check for ASTs... */
290 * Test machine check handler - only on 64-bit machines
293 if(!(per_proc_info
[0].pf
.Available
& pf64Bit
)) return 0; /* Leave if not correct machine */
295 fwEmMck(save
->save_r4
, save
->save_r5
, save
->save_r6
, save
->save_r7
, save
->save_r8
, save
->save_r9
); /* Start injecting */
297 return -1; /* Return and don't check for ASTs... */
300 * Set 64-bit on or off - only on 64-bit machines
303 if(!(per_proc_info
[0].pf
.Available
& pf64Bit
)) return 0; /* Leave if not correct machine */
305 srrwrk
= save
->save_srr1
>> 63; /* Save the old 64-bit bit */
307 save
->save_srr1
= (save
->save_srr1
& 0x7FFFFFFFFFFFFFFFULL
) | (save
->save_r4
<< 63); /* Set the requested mode */
308 save
->save_r3
= srrwrk
; /* Return the old value */
310 return -1; /* Return and don't check for ASTs... */
313 * Test the probe read function
318 src
= (save
->save_r4
<< 32) | (0x00000000FFFFFFFFULL
& save
->save_r5
); /* Merge into 64-bit */
319 save
->save_r3
= ml_probe_read_64(src
, &temp
); /* Try the address */
320 save
->save_r4
= temp
; /* Return the data */
321 return -1; /* Regurn and don't check for ASTs */
324 * Do perf monitor stuff
329 setPmon(save
->save_r4
, save
->save_r5
); /* Go load up MMCR0 and MMCR1 */
330 return -1; /* Regurn and don't check for ASTs */
334 * Don't bother to check for any errors.
335 * parms - vaddr, paddr, prot, attributes
339 (void)mapping_map(current_act()->map
->pmap
, /* Map in the page */
340 (addr64_t
)(((save
->save_r5
& 0xFFFFFFFF) << 32) | (save
->save_r5
& 0xFFFFFFFF)), save
->save_r6
, 0, 1, VM_PROT_READ
|VM_PROT_WRITE
);
342 return -1; /* Return and check for ASTs... */
346 * parms - pointer to scomcomm
350 ret
= copyin((unsigned int)(save
->save_r4
), &sarea
, sizeof(scomcomm
)); /* Get the data */
351 if(ret
) return 0; /* Copyin failed - return an exception */
353 sarea
.scomstat
= 0xFFFFFFFFFFFFFFFFULL
; /* Clear status */
354 cpu
= cpu_number(); /* Get us */
356 if((sarea
.scomcpu
< NCPUS
) && machine_slot
[sarea
.scomcpu
].running
) {
357 if(sarea
.scomcpu
== cpu
) fwSCOM(&sarea
); /* Do it if it is us */
358 else { /* Otherwise, tell the other processor */
359 (void)cpu_signal(sarea
.scomcpu
, SIGPcpureq
, CPRQscom
,(unsigned int)&sarea
); /* Ask him to do this */
360 (void)hw_cpu_sync((unsigned long)&sarea
.scomstat
, LockTimeOut
); /* Wait for the other processor to get its temperature */
364 ret
= copyout(&sarea
, (unsigned int)(save
->save_r4
), sizeof(scomcomm
)); /* Get the data */
365 if(ret
) return 0; /* Copyin failed - return an exception */
367 return -1; /* Return and check for ASTs... */
370 default: /* Handle invalid ones */
371 return 0; /* Return an exception */
377 kern_return_t
testPerfTrap(int trapno
, struct savearea
*ss
,
378 unsigned int dsisr
, unsigned int dar
) {
380 if(trapno
!= T_ALIGNMENT
) return KERN_FAILURE
;
382 kprintf("alignment exception at %08X, srr1 = %08X, dsisr = %08X, dar = %08X\n", ss
->save_srr0
,
383 ss
->save_srr1
, dsisr
, dar
);