osfmk/console/ppc/video_scroll.s

   1 /*
   2  * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * Copyright (c) 1999-2003 Apple Computer, Inc.  All Rights Reserved.
   7  *
   8  * This file contains Original Code and/or Modifications of Original Code
   9  * as defined in and that are subject to the Apple Public Source License
  10  * Version 2.0 (the 'License'). You may not use this file except in
  11  * compliance with the License. Please obtain a copy of the License at
  12  * http://www.opensource.apple.com/apsl/ and read it before using this
  13  * file.
  14  *
  15  * The Original Code and all software distributed under the License are
  16  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  17  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  18  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  20  * Please see the License for the specific language governing rights and
  21  * limitations under the License.
  22  *
  23  * @APPLE_LICENSE_HEADER_END@
  24  */
  25 /*
  26  * @OSF_FREE_COPYRIGHT@
  27  *
  28  */
  29
  30 /* Routines to perform high-speed scrolling, assuming that the memory is
  31  * non-cached, and that the amount of memory to be scrolled is a multiple
  32  * of (at least) 16.
  33  */
  34
  35 #include <ppc/asm.h>
  36 #include <ppc/proc_reg.h>
  37
  38 /*
  39  * void video_scroll_up(unsigned long start,
  40  *                      unsigned long end,
  41  *                      unsigned long dest)
  42  */
  43
  44 ENTRY(video_scroll_up, TAG_NO_FRAME_USED)
  45
  46                         mfmsr   r0                                                                      /* Get the MSR */
  47                         mflr    r6                                                                      /* Get the LR */
  48                         ori             r7,r0,1<<(31-MSR_FP_BIT)                        /* Turn on floating point */
  49                         stwu    r1,-(FM_SIZE+16)(r1)                            /* Get space for a couple of registers on stack */
  50                         rlwinm  r7,r7,0,MSR_EE_BIT+1,MSR_EE_BIT-1       /* Turn off interrupts */
  51                         stw             r6,(FM_SIZE+16+FM_LR_SAVE)(r1)          /* Save the return */
  52
  53                         mtmsr   r7                                                                      /* Turn on FPU */
  54                         isync                                                                           /* Wait for it */
  55
  56 vsufpuon1:      stfd    f0,(FM_SIZE+0)(r1)                                      /* Save one register */
  57                         stfd    f1,(FM_SIZE+8)(r1)                                      /* and the second */
  58
  59 /* ok, now we can use the FPU registers to do some fast copying
  60  */
  61
  62 .L_vscr_up_loop:
  63                         lfd     f0,     0(r3)
  64                         lfd     f1,     8(r3)
  65
  66                         addi    r3,     r3,     16
  67
  68                         stfd    f0,     0(r5)
  69
  70                         cmpl    cr0,    r3,     r4
  71
  72                         stfd    f1,     8(r5)
  73
  74                         addi    r5,     r5,     16
  75
  76                         blt+    cr0,    .L_vscr_up_loop
  77
  78                         lfd             f0,(FM_SIZE+0)(r1)                                      /* Load back one register */
  79                         lfd             f1,(FM_SIZE+8)(r1)                                      /* and the second */
  80                         lwz             r1,0(r1)                                                        /* Pop the stack */
  81
  82                         mtmsr   r0                                                                      /* Turn off FPU again */
  83                         isync                                                                           /* Wait for it */
  84                         blr                                                                                     /* Go away, don't bother me... */
  85
  86
  87 /*
  88  * void video_scroll_down(unsigned long start,   HIGH address to scroll from
  89  *                        unsigned long end,     LOW address
  90  *                        unsigned long dest)    HIGH address
  91  */
  92
  93 ENTRY(video_scroll_down, TAG_NO_FRAME_USED)
  94
  95         /* Save off the link register, we want to call fpu_save.
  96          */
  97
  98
  99                         mfmsr   r0                                                                      /* Get the MSR */
 100                         mflr    r6                                                                      /* Get the LR */
 101                         ori             r7,r0,1<<(31-MSR_FP_BIT)                        /* Turn on floating point */
 102                         stwu    r1,-(FM_SIZE+16)(r1)                            /* Get space for a couple of registers on stack */
 103                         rlwinm  r7,r7,0,MSR_EE_BIT+1,MSR_EE_BIT-1       /* Turn off interrupts */
 104                         stw             r6,(FM_SIZE+16+FM_LR_SAVE)(r1)          /* Save the return */
 105
 106                         mtmsr   r7                                                                      /* Turn on FPU */
 107                         isync                                                                           /* Wait for it */
 108
 109 vsdfpuon1:      stfd    f0,(FM_SIZE+0)(r1)                                      /* Save one register */
 110                         stfd    f1,(FM_SIZE+8)(r1)                                      /* and the second */
 111
 112 /* ok, now we can use the FPU registers to do some fast copying  */
 113
 114 .L_vscr_down_loop:
 115                         lfd     f0,     -16(r3)
 116                         lfd     f1,     -8(r3)
 117
 118                         subi    r3,     r3,     16
 119
 120                         stfd    f0,     -16(r5)
 121
 122                         cmpl    cr0,    r3,     r4
 123
 124                         stfd    f1,     -8(r5)
 125
 126                         subi    r5,     r5,     16
 127
 128                         bgt+    cr0,    .L_vscr_down_loop
 129
 130
 131                         lfd             f0,(FM_SIZE+0)(r1)                                      /* Load back one register */
 132                         lfd             f1,(FM_SIZE+8)(r1)                                      /* and the second */
 133                         lwz             r1,0(r1)                                                        /* Pop the stack */
 134
 135                         mtmsr   r0                                                                      /* Turn off FPU again */
 136                         isync                                                                           /* Wait for it */
 137                         blr                                                                                     /* Go away, don't bother me... */
 138