osfmk/ppc/POWERMAC/dbdma.c

   1 /*
   2  * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * Copyright (c) 1999-2003 Apple Computer, Inc.  All Rights Reserved.
   7  *
   8  * This file contains Original Code and/or Modifications of Original Code
   9  * as defined in and that are subject to the Apple Public Source License
  10  * Version 2.0 (the 'License'). You may not use this file except in
  11  * compliance with the License. Please obtain a copy of the License at
  12  * http://www.opensource.apple.com/apsl/ and read it before using this
  13  * file.
  14  *
  15  * The Original Code and all software distributed under the License are
  16  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  17  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  18  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  20  * Please see the License for the specific language governing rights and
  21  * limitations under the License.
  22  *
  23  * @APPLE_LICENSE_HEADER_END@
  24  */
  25 /*
  26  * @OSF_COPYRIGHT@
  27  *
  28  */
  29
  30 #include <platforms.h>
  31
  32 #include <ppc/proc_reg.h> /* For isync */
  33 #include <mach_debug.h>
  34 #include <kern/assert.h>
  35 #include <kern/cpu_number.h>
  36 #include <kern/spl.h>
  37 #include <mach/mach_types.h>
  38 #include <types.h>
  39 #include <pexpert/ppc/powermac.h>
  40 #include <ppc/io_map_entries.h>
  41 #include <pexpert/ppc/dbdma.h>
  42
  43
  44 static int      dbdma_alloc_index = 0;
  45 dbdma_command_t *dbdma_alloc_commands = NULL;
  46
  47 void
  48 dbdma_start(dbdma_regmap_t *dmap, dbdma_command_t *commands)
  49 {
  50         unsigned long addr = kvtophys((vm_offset_t) commands);
  51
  52         if (addr & 0xf)
  53                 panic("dbdma_start command structure not 16-byte aligned");
  54
  55         dmap->d_intselect = 0xff;       /* Endian magic - clear out interrupts */
  56         DBDMA_ST4_ENDIAN(&dmap->d_control,
  57                          DBDMA_CLEAR_CNTRL( (DBDMA_CNTRL_ACTIVE |
  58                                              DBDMA_CNTRL_DEAD   |
  59                                              DBDMA_CNTRL_WAKE   |
  60                                              DBDMA_CNTRL_FLUSH  |
  61                                              DBDMA_CNTRL_PAUSE  |
  62                                              DBDMA_CNTRL_RUN      )));
  63         eieio();
  64
  65         while (DBDMA_LD4_ENDIAN(&dmap->d_status) & DBDMA_CNTRL_ACTIVE)
  66                 eieio();
  67
  68         dmap->d_cmdptrhi = 0;   eieio();/* 64-bit not yet */
  69         DBDMA_ST4_ENDIAN(&dmap->d_cmdptrlo, addr); eieio();
  70
  71         DBDMA_ST4_ENDIAN(&dmap->d_control, DBDMA_SET_CNTRL(DBDMA_CNTRL_RUN));
  72         eieio();
  73
  74 }
  75
  76 void
  77 dbdma_stop(dbdma_regmap_t *dmap)
  78 {
  79         DBDMA_ST4_ENDIAN(&dmap->d_control, DBDMA_CLEAR_CNTRL(DBDMA_CNTRL_RUN) |
  80                           DBDMA_SET_CNTRL(DBDMA_CNTRL_FLUSH)); eieio();
  81
  82         while (DBDMA_LD4_ENDIAN(&dmap->d_status) & (DBDMA_CNTRL_ACTIVE|DBDMA_CNTRL_FLUSH))
  83                 eieio();
  84 }
  85
  86 void
  87 dbdma_flush(dbdma_regmap_t *dmap)
  88 {
  89         DBDMA_ST4_ENDIAN(&dmap->d_control,DBDMA_SET_CNTRL(DBDMA_CNTRL_FLUSH));
  90         eieio();
  91
  92         while (DBDMA_LD4_ENDIAN(&dmap->d_status) & (DBDMA_CNTRL_FLUSH))
  93                 eieio();
  94 }
  95
  96 void
  97 dbdma_reset(dbdma_regmap_t *dmap)
  98 {
  99         DBDMA_ST4_ENDIAN(&dmap->d_control,
 100                          DBDMA_CLEAR_CNTRL( (DBDMA_CNTRL_ACTIVE |
 101                                              DBDMA_CNTRL_DEAD   |
 102                                              DBDMA_CNTRL_WAKE   |
 103                                              DBDMA_CNTRL_FLUSH  |
 104                                              DBDMA_CNTRL_PAUSE  |
 105                                              DBDMA_CNTRL_RUN      )));
 106         eieio();
 107
 108         while (DBDMA_LD4_ENDIAN(&dmap->d_status) & DBDMA_CNTRL_RUN)
 109                 eieio();
 110 }
 111
 112 void
 113 dbdma_continue(dbdma_regmap_t *dmap)
 114 {
 115         DBDMA_ST4_ENDIAN(&dmap->d_control, DBDMA_SET_CNTRL(DBDMA_CNTRL_RUN|DBDMA_CNTRL_WAKE) | DBDMA_CLEAR_CNTRL(DBDMA_CNTRL_PAUSE|DBDMA_CNTRL_DEAD));
 116         eieio();
 117 }
 118
 119 void
 120 dbdma_pause(dbdma_regmap_t *dmap)
 121 {
 122         DBDMA_ST4_ENDIAN(&dmap->d_control,DBDMA_SET_CNTRL(DBDMA_CNTRL_PAUSE));
 123         eieio();
 124
 125         while (DBDMA_LD4_ENDIAN(&dmap->d_status) & DBDMA_CNTRL_ACTIVE)
 126                 eieio();
 127 }
 128
 129 dbdma_command_t *
 130 dbdma_alloc(int count)
 131 {
 132         dbdma_command_t *dbdmap;
 133
 134         /*
 135          * For now, we assume that dbdma_alloc() is called only when
 136          * the system is bootstrapping, i.e. before the other CPUs
 137          * are activated...
 138          * If that's not the case, we need to protect the global
 139          * variables here.
 140          */
 141         assert(cpu_number() == master_cpu);
 142
 143         if (dbdma_alloc_index == 0)
 144                 dbdma_alloc_commands = (dbdma_command_t *) io_map(0, PAGE_SIZE);
 145         if ((dbdma_alloc_index+count) >= PAGE_SIZE / sizeof(dbdma_command_t))
 146                 panic("Too many dbdma command structures!");
 147
 148         dbdmap = &dbdma_alloc_commands[dbdma_alloc_index];
 149         dbdma_alloc_index += count;
 150         return  dbdmap;
 151 }