]> git.saurik.com Git - apple/xnu.git/blob - osfmk/i386/commpage/cacheflush.s
876597fac1bad72bd5c919fed7fdb550c0bdc36f
[apple/xnu.git] / osfmk / i386 / commpage / cacheflush.s
1 /*
2 * Copyright (c) 2003-2006 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
11 *
12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
18 * under the License.
19 *
20 * @APPLE_LICENSE_HEADER_END@
21 */
22
23 #include <machine/cpu_capabilities.h>
24 #include <machine/commpage.h>
25
26 .text
27 .align 2, 0x90
28
29 // void sysFlushDcache( void *p, size_t len );
30 // 32-bit version
31
32 Lsys_flush_dcache:
33 movl 4(%esp),%ecx // get length
34 movl 8(%esp),%edx // get ptr
35 testl %ecx,%ecx // length 0?
36 jz 2f // yes
37 mfence // ensure previous stores make it to memory
38 1:
39 clflush (%edx) // flush a line
40 addl $64,%edx
41 subl $64,%ecx
42 jnc 1b
43 mfence // make sure memory is updated before we return
44 2:
45 ret
46
47 COMMPAGE_DESCRIPTOR(sys_flush_dcache,_COMM_PAGE_FLUSH_DCACHE,kCache64,0)
48
49
50 // void sysFlushDcache( void *p, size_t len );
51 // 64-bit version
52 .code64
53 Lsys_flush_dcache_64: // %rdi = ptr, %rsi = length
54 testq %rsi,%rsi // length 0?
55 jz 2f // yes
56 mfence // ensure previous stores make it to memory
57 1:
58 clflush (%rdi) // flush a line
59 addq $64,%rdi
60 subq $64,%rsi
61 jnc 1b
62 mfence // make sure memory is updated before we return
63 2:
64 ret
65 .code32
66 COMMPAGE_DESCRIPTOR(sys_flush_dcache_64,_COMM_PAGE_FLUSH_DCACHE,kCache64,0)
67
68
69 // void sysIcacheInvalidate( void *p, size_t len );
70
71 Lsys_icache_invalidate:
72 // This is a NOP on intel processors, since the intent of the API
73 // is to make data executable, and Intel L1Is are coherent with L1D.
74 // We can use same routine both in 32 and 64-bit mode, since it is
75 // just a RET instruction.
76 ret
77
78 COMMPAGE_DESCRIPTOR(sys_icache_invalidate,_COMM_PAGE_FLUSH_ICACHE,0,0)