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1 /*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
11 *
12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
18 * under the License.
19 *
20 * @APPLE_LICENSE_HEADER_END@
21 */
22 /*
23 * @OSF_COPYRIGHT@
24 */
25 /*
26 * Mach Operating System
27 * Copyright (c) 1991,1990,1989,1988,1987 Carnegie Mellon University
28 * All Rights Reserved.
29 *
30 * Permission to use, copy, modify and distribute this software and its
31 * documentation is hereby granted, provided that both the copyright
32 * notice and this permission notice appear in all copies of the
33 * software, derivative works or modified versions, and any portions
34 * thereof, and that both notices appear in supporting documentation.
35 *
36 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
37 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
38 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
39 *
40 * Carnegie Mellon requests users of this software to return to
41 *
42 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
43 * School of Computer Science
44 * Carnegie Mellon University
45 * Pittsburgh PA 15213-3890
46 *
47 * any improvements or extensions that they make and grant Carnegie Mellon
48 * the rights to redistribute these changes.
49 */
50 /*
51 */
52
53 /*
54 *
55 * This file contains routines to check whether an ast is needed.
56 *
57 * ast_check() - check whether ast is needed for interrupt or context
58 * switch. Usually called by clock interrupt handler.
59 *
60 */
61
62 #include <cputypes.h>
63 #include <cpus.h>
64 #include <platforms.h>
65
66 #include <kern/ast.h>
67 #include <kern/counters.h>
68 #include <kern/cpu_number.h>
69 #include <kern/misc_protos.h>
70 #include <kern/queue.h>
71 #include <kern/sched_prim.h>
72 #include <kern/thread.h>
73 #include <kern/thread_act.h>
74 #include <kern/thread_swap.h>
75 #include <kern/processor.h>
76 #include <kern/spl.h>
77 #include <mach/policy.h>
78
79 volatile ast_t need_ast[NCPUS];
80
81 void
82 ast_init(void)
83 {
84 #ifndef MACHINE_AST
85 register int i;
86
87 for (i=0; i<NCPUS; i++) {
88 need_ast[i] = AST_NONE;
89 }
90 #endif /* MACHINE_AST */
91 }
92
93 void
94 ast_taken(
95 ast_t reasons,
96 boolean_t enable
97 )
98 {
99 register int mycpu;
100 register processor_t myprocessor;
101 register thread_t self = current_thread();
102 boolean_t preempt_trap = (reasons == AST_PREEMPT);
103
104 disable_preemption();
105 mycpu = cpu_number();
106 reasons &= need_ast[mycpu];
107 need_ast[mycpu] &= ~reasons;
108 enable_preemption();
109
110 /*
111 * No ast for an idle thread
112 */
113 if (self->state & TH_IDLE)
114 goto enable_and_return;
115
116 /*
117 * Check for urgent preemption
118 */
119 if ((reasons & AST_URGENT) && wait_queue_assert_possible(self)) {
120 if (reasons & AST_BLOCK) {
121 counter(c_ast_taken_block++);
122 thread_block_reason((void (*)(void))0, AST_BLOCK);
123 }
124
125 reasons &= ~AST_PREEMPT;
126 if (reasons == 0)
127 goto enable_and_return;
128 }
129
130 if (preempt_trap)
131 goto enable_and_return;
132
133 ml_set_interrupts_enabled(enable);
134
135 #ifdef MACH_BSD
136 /*
137 * Check for BSD hook
138 */
139 if (reasons & AST_BSD) {
140 extern void bsd_ast(thread_act_t act);
141 thread_act_t act = self->top_act;
142
143 thread_ast_clear(act, AST_BSD);
144 bsd_ast(act);
145 }
146 #endif
147
148 /*
149 * migration APC hook
150 */
151 if (reasons & AST_APC) {
152 act_execute_returnhandlers();
153 }
154
155 /*
156 * Check for normal preemption
157 */
158 reasons &= AST_BLOCK;
159 if (reasons == 0) {
160 disable_preemption();
161 myprocessor = current_processor();
162 if (csw_needed(self, myprocessor))
163 reasons = AST_BLOCK;
164 enable_preemption();
165 }
166 if ( (reasons & AST_BLOCK) &&
167 wait_queue_assert_possible(self) ) {
168 counter(c_ast_taken_block++);
169 thread_block_reason(thread_exception_return, AST_BLOCK);
170 }
171
172 goto just_return;
173
174 enable_and_return:
175 ml_set_interrupts_enabled(enable);
176
177 just_return:
178 return;
179 }
180
181 /*
182 * Called at splsched.
183 */
184 void
185 ast_check(
186 processor_t processor)
187 {
188 register thread_t self = processor->cpu_data->active_thread;
189
190 processor->current_pri = self->sched_pri;
191 if (processor->state == PROCESSOR_RUNNING) {
192 register ast_t preempt;
193 processor_running:
194
195 /*
196 * Propagate thread ast to processor.
197 */
198 ast_propagate(self->top_act->ast);
199
200 /*
201 * Context switch check.
202 */
203 if ((preempt = csw_check(self, processor)) != AST_NONE)
204 ast_on(preempt);
205 }
206 else
207 if ( processor->state == PROCESSOR_DISPATCHING ||
208 processor->state == PROCESSOR_IDLE ) {
209 return;
210 }
211 else
212 if (processor->state == PROCESSOR_SHUTDOWN)
213 goto processor_running;
214 else
215 if (processor->state == PROCESSOR_ASSIGN)
216 ast_on(AST_BLOCK);
217 }