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1 /*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
11 *
12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
18 * under the License.
19 *
20 * @APPLE_LICENSE_HEADER_END@
21 */
22 /*
23 * @OSF_COPYRIGHT@
24 */
25 /*
26 * Mach Operating System
27 * Copyright (c) 1991,1990 Carnegie Mellon University
28 * All Rights Reserved.
29 *
30 * Permission to use, copy, modify and distribute this software and its
31 * documentation is hereby granted, provided that both the copyright
32 * notice and this permission notice appear in all copies of the
33 * software, derivative works or modified versions, and any portions
34 * thereof, and that both notices appear in supporting documentation.
35 *
36 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
37 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
38 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
39 *
40 * Carnegie Mellon requests users of this software to return to
41 *
42 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
43 * School of Computer Science
44 * Carnegie Mellon University
45 * Pittsburgh PA 15213-3890
46 *
47 * any improvements or extensions that they make and grant Carnegie Mellon
48 * the rights to redistribute these changes.
49 */
50
51 /*
52 */
53
54 #ifndef _I386AT_MP_H_
55 #define _I386AT_MP_H_
56
57 #include <cpus.h>
58 #include <platforms.h>
59 #include <mp_v1_1.h>
60 #include <mach_rt.h>
61 #include <mach_assert.h>
62
63 #if NCPUS > 1
64 #include <i386/apic.h>
65 #include <i386/AT386/mp/mp_events.h>
66
67 #define CPU_NUMBER(r) \
68 movl EXT(lapic_id), r ; \
69 movl 0(r),r ; \
70 shrl $ LAPIC_ID_SHIFT, r; \
71 andl $ LAPIC_ID_MASK, r
72
73
74 #define MP_IPL SPL6 /* software interrupt level */
75
76 /* word describing the reason for the interrupt, one per cpu */
77
78 #ifndef ASSEMBLER
79 #include <kern/lock.h>
80 extern cpu_int_word[];
81 extern real_ncpus; /* real number of cpus */
82 extern wncpu; /* wanted number of cpus */
83 decl_simple_lock_data(extern,kdb_lock) /* kdb lock */
84
85 extern int kdb_cpu; /* current cpu running kdb */
86 extern int kdb_debug;
87 extern int kdb_is_slave[];
88 extern int kdb_active[];
89 #endif /* ASSEMBLER */
90
91 #define i_bit(bit, word) ((long)(*(word)) & ((long)1 << (bit)))
92
93
94 /*
95 * Device driver synchronization.
96 *
97 * at386_io_lock(op) and at386_io_unlock() are called
98 * by device drivers when accessing H/W. The underlying
99 * Processing is machine dependant. But the op argument
100 * to the at386_io_lock is generic
101 */
102
103 #define MP_DEV_OP_MAX 4
104 #define MP_DEV_WAIT MP_DEV_OP_MAX /* Wait for the lock */
105
106 /*
107 * If the caller specifies an op value different than MP_DEV_WAIT, the
108 * at386_io_lock function must return true if lock was successful else
109 * false
110 */
111
112 #define MP_DEV_OP_START 0 /* If lock busy, register a pending start op */
113 #define MP_DEV_OP_INTR 1 /* If lock busy, register a pending intr */
114 #define MP_DEV_OP_TIMEO 2 /* If lock busy, register a pending timeout */
115 #define MP_DEV_OP_CALLB 3 /* If lock busy, register a pending callback */
116
117 #else /* NCPUS > 1 */
118 #define at386_io_lock_state()
119 #define at386_io_lock(op) (TRUE)
120 #define at386_io_unlock()
121 #if MP_V1_1
122 #include <i386/apic.h>
123 #endif /* MP_V1_1 */
124 #endif /* NCPUS > 1 */
125
126 #if MACH_RT
127 #define _DISABLE_PREEMPTION(r) \
128 movl $ CPD_PREEMPTION_LEVEL,r ; \
129 incl %gs:(r)
130
131 #define _ENABLE_PREEMPTION(r) \
132 movl $ CPD_PREEMPTION_LEVEL,r ; \
133 decl %gs:(r) ; \
134 jne 9f ; \
135 pushl %eax ; \
136 pushl %ecx ; \
137 pushl %edx ; \
138 call EXT(kernel_preempt_check) ; \
139 popl %edx ; \
140 popl %ecx ; \
141 popl %eax ; \
142 9:
143
144 #define _ENABLE_PREEMPTION_NO_CHECK(r) \
145 movl $ CPD_PREEMPTION_LEVEL,r ; \
146 decl %gs:(r)
147
148 #if MACH_ASSERT
149 #define DISABLE_PREEMPTION(r) \
150 pushl %eax; \
151 pushl %ecx; \
152 pushl %edx; \
153 call EXT(_disable_preemption); \
154 popl %edx; \
155 popl %ecx; \
156 popl %eax
157 #define ENABLE_PREEMPTION(r) \
158 pushl %eax; \
159 pushl %ecx; \
160 pushl %edx; \
161 call EXT(_enable_preemption); \
162 popl %edx; \
163 popl %ecx; \
164 popl %eax
165 #define ENABLE_PREEMPTION_NO_CHECK(r) \
166 pushl %eax; \
167 pushl %ecx; \
168 pushl %edx; \
169 call EXT(_enable_preemption_no_check); \
170 popl %edx; \
171 popl %ecx; \
172 popl %eax
173 #if NCPUS > 1
174 #define MP_DISABLE_PREEMPTION(r) \
175 pushl %eax; \
176 pushl %ecx; \
177 pushl %edx; \
178 call EXT(_mp_disable_preemption); \
179 popl %edx; \
180 popl %ecx; \
181 popl %eax
182 #define MP_ENABLE_PREEMPTION(r) \
183 pushl %eax; \
184 pushl %ecx; \
185 pushl %edx; \
186 call EXT(_mp_enable_preemption); \
187 popl %edx; \
188 popl %ecx; \
189 popl %eax
190 #define MP_ENABLE_PREEMPTION_NO_CHECK(r) \
191 pushl %eax; \
192 pushl %ecx; \
193 pushl %edx; \
194 call EXT(_mp_enable_preemption_no_check); \
195 popl %edx; \
196 popl %ecx; \
197 popl %eax
198 #else /* NCPUS > 1 */
199 #define MP_DISABLE_PREEMPTION(r)
200 #define MP_ENABLE_PREEMPTION(r)
201 #define MP_ENABLE_PREEMPTION_NO_CHECK(r)
202 #endif /* NCPUS > 1 */
203 #else /* MACH_ASSERT */
204 #define DISABLE_PREEMPTION(r) _DISABLE_PREEMPTION(r)
205 #define ENABLE_PREEMPTION(r) _ENABLE_PREEMPTION(r)
206 #define ENABLE_PREEMPTION_NO_CHECK(r) _ENABLE_PREEMPTION_NO_CHECK(r)
207 #if NCPUS > 1
208 #define MP_DISABLE_PREEMPTION(r) _DISABLE_PREEMPTION(r)
209 #define MP_ENABLE_PREEMPTION(r) _ENABLE_PREEMPTION(r)
210 #define MP_ENABLE_PREEMPTION_NO_CHECK(r) _ENABLE_PREEMPTION_NO_CHECK(r)
211 #else /* NCPUS > 1 */
212 #define MP_DISABLE_PREEMPTION(r)
213 #define MP_ENABLE_PREEMPTION(r)
214 #define MP_ENABLE_PREEMPTION_NO_CHECK(r)
215 #endif /* NCPUS > 1 */
216 #endif /* MACH_ASSERT */
217
218 #else /* MACH_RT */
219 #define DISABLE_PREEMPTION(r)
220 #define ENABLE_PREEMPTION(r)
221 #define ENABLE_PREEMPTION_NO_CHECK(r)
222 #define MP_DISABLE_PREEMPTION(r)
223 #define MP_ENABLE_PREEMPTION(r)
224 #define MP_ENABLE_PREEMPTION_NO_CHECK(r)
225 #endif /* MACH_RT */
226
227 #endif /* _I386AT_MP_H_ */