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1 /*
2 * Copyright (c) 2000-2005 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_OSREFERENCE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the
10 * License may not be used to create, or enable the creation or
11 * redistribution of, unlawful or unlicensed copies of an Apple operating
12 * system, or to circumvent, violate, or enable the circumvention or
13 * violation of, any terms of an Apple operating system software license
14 * agreement.
15 *
16 * Please obtain a copy of the License at
17 * http://www.opensource.apple.com/apsl/ and read it before using this
18 * file.
19 *
20 * The Original Code and all software distributed under the License are
21 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
22 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
23 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
25 * Please see the License for the specific language governing rights and
26 * limitations under the License.
27 *
28 * @APPLE_LICENSE_OSREFERENCE_HEADER_END@
29 */
30 /*
31 * @OSF_COPYRIGHT@
32 */
33 /*
34 * Mach Operating System
35 * Copyright (c) 1991,1990,1989 Carnegie Mellon University
36 * All Rights Reserved.
37 *
38 * Permission to use, copy, modify and distribute this software and its
39 * documentation is hereby granted, provided that both the copyright
40 * notice and this permission notice appear in all copies of the
41 * software, derivative works or modified versions, and any portions
42 * thereof, and that both notices appear in supporting documentation.
43 *
44 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
45 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
46 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
47 *
48 * Carnegie Mellon requests users of this software to return to
49 *
50 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
51 * School of Computer Science
52 * Carnegie Mellon University
53 * Pittsburgh PA 15213-3890
54 *
55 * any improvements or extensions that they make and grant Carnegie Mellon
56 * the rights to redistribute these changes.
57 */
58 /*
59 */
60 /*
61 * File: thread_status.h
62 * Author: Avadis Tevanian, Jr.
63 * Date: 1985
64 *
65 * This file contains the structure definitions for the thread
66 * state as applied to I386 processors.
67 */
68
69 #ifndef _MACH_I386_THREAD_STATUS_H_
70 #define _MACH_I386_THREAD_STATUS_H_
71
72 #include <mach/message.h>
73 #include <mach/i386/fp_reg.h>
74 #include <mach/i386/thread_state.h>
75 #include <architecture/i386/frame.h> /* FIXME */
76 #include <architecture/i386/fpu.h> /* FIXME */
77 /*
78 * i386_thread_state this is the structure that is exported
79 * to user threads for use in status/mutate
80 * calls. This structure should never
81 * change.
82 *
83 * i386_float_state exported to use threads for access to
84 * floating point registers. Try not to
85 * change this one, either.
86 *
87 * i386_isa_port_map_state exported to user threads to allow
88 * selective in/out operations
89 *
90 * i386_v86_assist_state
91 *
92 * thread_syscall_state
93 */
94
95 /* THREAD_STATE_FLAVOR_LIST 0 */
96 #define i386_NEW_THREAD_STATE 1 /* used to be i386_THREAD_STATE */
97 #define i386_FLOAT_STATE 2
98 #define i386_ISA_PORT_MAP_STATE 3
99 #define i386_V86_ASSIST_STATE 4
100 #define i386_REGS_SEGS_STATE 5
101 #define THREAD_SYSCALL_STATE 6
102 #define THREAD_STATE_NONE 7
103 #define i386_SAVED_STATE 8
104
105
106 /*
107 * x86-64 compatibility
108 * THREAD_STATE_FLAVOR_LIST 0
109 * these are the supported flavors
110 */
111 #define x86_THREAD_STATE32 1
112 #define x86_FLOAT_STATE32 2
113 #define x86_EXCEPTION_STATE32 3
114 #define x86_THREAD_STATE64 4
115 #define x86_FLOAT_STATE64 5
116 #define x86_EXCEPTION_STATE64 6
117 #define x86_THREAD_STATE 7
118 #define x86_FLOAT_STATE 8
119 #define x86_EXCEPTION_STATE 9
120 #define x86_DEBUG_STATE32 10
121 #define x86_DEBUG_STATE64 11
122 #define x86_DEBUG_STATE 12
123
124
125
126 /*
127 * VALID_THREAD_STATE_FLAVOR is a platform specific macro that when passed
128 * an exception flavor will return if that is a defined flavor for that
129 * platform. The macro must be manually updated to include all of the valid
130 * exception flavors as defined above.
131 */
132 #define VALID_THREAD_STATE_FLAVOR(x) \
133 ((x == i386_NEW_THREAD_STATE) || \
134 (x == i386_FLOAT_STATE) || \
135 (x == i386_ISA_PORT_MAP_STATE) || \
136 (x == i386_V86_ASSIST_STATE) || \
137 (x == i386_REGS_SEGS_STATE) || \
138 (x == THREAD_SYSCALL_STATE) || \
139 (x == THREAD_STATE_NONE) || \
140 (x == i386_SAVED_STATE))
141
142
143 /*
144 * x86-64 compatibility
145 */
146 struct x86_state_hdr {
147 int flavor;
148 int count;
149 };
150 typedef struct x86_state_hdr x86_state_hdr_t;
151
152
153 /*
154 * This structure is used for both
155 * i386_THREAD_STATE and i386_REGS_SEGS_STATE.
156 */
157 struct i386_new_thread_state {
158 unsigned int gs;
159 unsigned int fs;
160 unsigned int es;
161 unsigned int ds;
162 unsigned int edi;
163 unsigned int esi;
164 unsigned int ebp;
165 unsigned int esp;
166 unsigned int ebx;
167 unsigned int edx;
168 unsigned int ecx;
169 unsigned int eax;
170 unsigned int eip;
171 unsigned int cs;
172 unsigned int efl;
173 unsigned int uesp;
174 unsigned int ss;
175 };
176 #define i386_NEW_THREAD_STATE_COUNT ((mach_msg_type_number_t) \
177 (sizeof (struct i386_new_thread_state)/sizeof(unsigned int)))
178
179 /*
180 * Subset of saved state stored by processor on kernel-to-kernel
181 * trap. (Used by ddb to examine state guaranteed to be present
182 * on all traps into debugger.)
183 */
184 struct i386_saved_state_from_kernel {
185 unsigned int gs;
186 unsigned int fs;
187 unsigned int es;
188 unsigned int ds;
189 unsigned int edi;
190 unsigned int esi;
191 unsigned int ebp;
192 unsigned int esp; /* kernel esp stored by pusha -
193 we save cr2 here later */
194 unsigned int ebx;
195 unsigned int edx;
196 unsigned int ecx;
197 unsigned int eax;
198 unsigned int trapno;
199 unsigned int err;
200 unsigned int eip;
201 unsigned int cs;
202 unsigned int efl;
203 };
204
205 /*
206 * The format in which thread state is saved by Mach on this machine. This
207 * state flavor is most efficient for exception RPC's to kernel-loaded
208 * servers, because copying can be avoided:
209 */
210 struct i386_saved_state {
211 unsigned int gs;
212 unsigned int fs;
213 unsigned int es;
214 unsigned int ds;
215 unsigned int edi;
216 unsigned int esi;
217 unsigned int ebp;
218 unsigned int esp; /* kernel esp stored by pusha -
219 we save cr2 here later */
220 unsigned int ebx;
221 unsigned int edx;
222 unsigned int ecx;
223 unsigned int eax;
224 unsigned int trapno;
225 unsigned int err;
226 unsigned int eip;
227 unsigned int cs;
228 unsigned int efl;
229 unsigned int uesp;
230 unsigned int ss;
231 struct v86_segs {
232 unsigned int v86_es; /* virtual 8086 segment registers */
233 unsigned int v86_ds;
234 unsigned int v86_fs;
235 unsigned int v86_gs;
236 } v86_segs;
237 #define i386_SAVED_ARGV_COUNT 7
238 unsigned int argv_status; /* Boolean flag indicating whether or
239 * not Mach copied in the args */
240 unsigned int argv[i386_SAVED_ARGV_COUNT];
241 /* The return address, and the first several
242 * function call args from the stack, for
243 * efficient syscall exceptions */
244 };
245 #define i386_SAVED_STATE_COUNT ((mach_msg_type_number_t) \
246 (sizeof (struct i386_saved_state)/sizeof(unsigned int)))
247 #define i386_REGS_SEGS_STATE_COUNT i386_SAVED_STATE_COUNT
248
249 /*
250 * Machine-independent way for servers and Mach's exception mechanism to
251 * choose the most efficient state flavor for exception RPC's:
252 */
253 #define MACHINE_THREAD_STATE i386_SAVED_STATE
254 #define MACHINE_THREAD_STATE_COUNT 144
255
256 /*
257 * Largest state on this machine:
258 * (be sure mach/machine/thread_state.h matches!)
259 */
260 #define THREAD_MACHINE_STATE_MAX THREAD_STATE_MAX
261
262 /*
263 * Floating point state.
264 *
265 * fpkind tells in what way floating point operations are supported.
266 * See the values for fp_kind in <mach/i386/fp_reg.h>.
267 *
268 * If the kind is FP_NO, then calls to set the state will fail, and
269 * thread_getstatus will return garbage for the rest of the state.
270 * If "initialized" is false, then the rest of the state is garbage.
271 * Clients can set "initialized" to false to force the coprocessor to
272 * be reset.
273 * "exc_status" is non-zero if the thread has noticed (but not
274 * proceeded from) a coprocessor exception. It contains the status
275 * word with the exception bits set. The status word in "fp_status"
276 * will have the exception bits turned off. If an exception bit in
277 * "fp_status" is turned on, then "exc_status" should be zero. This
278 * happens when the coprocessor exception is noticed after the system
279 * has context switched to some other thread.
280 *
281 * If kind is FP_387, then "state" is a i387_state. Other kinds might
282 * also use i387_state, but somebody will have to verify it (XXX).
283 * Note that the registers are ordered from top-of-stack down, not
284 * according to physical register number.
285 */
286
287 /*
288 * x86-64 compatibility
289 */
290 /* defn of 80bit x87 FPU or MMX register */
291 struct mmst_reg {
292 char mmst_reg[10];
293 char mmst_rsrv[6];
294 };
295
296
297 /* defn of 128 bit XMM regs */
298 struct xmm_reg {
299 char xmm_reg[16];
300 };
301
302 #define FP_STATE_BYTES 512
303
304 struct i386_float_state {
305 int fpkind; /* FP_NO..FP_387 (readonly) */
306 int initialized;
307 unsigned char hw_state[FP_STATE_BYTES]; /* actual "hardware" state */
308 int exc_status; /* exception status (readonly) */
309 };
310 #define i386_FLOAT_STATE_COUNT ((mach_msg_type_number_t) \
311 (sizeof(struct i386_float_state)/sizeof(unsigned int)))
312
313 /*
314 * x86-64 compatibility
315 */
316 typedef struct {
317 int fpu_reserved[2];
318 fp_control_t fpu_fcw; /* x87 FPU control word */
319 fp_status_t fpu_fsw; /* x87 FPU status word */
320 uint8_t fpu_ftw; /* x87 FPU tag word */
321 uint8_t fpu_rsrv1; /* reserved */
322 uint16_t fpu_fop; /* x87 FPU Opcode */
323 uint32_t fpu_ip; /* x87 FPU Instruction Pointer offset */
324 uint16_t fpu_cs; /* x87 FPU Instruction Pointer Selector */
325 uint16_t fpu_rsrv2; /* reserved */
326 uint32_t fpu_dp; /* x87 FPU Instruction Operand(Data) Pointer offset */
327 uint16_t fpu_ds; /* x87 FPU Instruction Operand(Data) Pointer Selector */
328 uint16_t fpu_rsrv3; /* reserved */
329 uint32_t fpu_mxcsr; /* MXCSR Register state */
330 uint32_t fpu_mxcsrmask; /* MXCSR mask */
331 struct mmst_reg fpu_stmm0; /* ST0/MM0 */
332 struct mmst_reg fpu_stmm1; /* ST1/MM1 */
333 struct mmst_reg fpu_stmm2; /* ST2/MM2 */
334 struct mmst_reg fpu_stmm3; /* ST3/MM3 */
335 struct mmst_reg fpu_stmm4; /* ST4/MM4 */
336 struct mmst_reg fpu_stmm5; /* ST5/MM5 */
337 struct mmst_reg fpu_stmm6; /* ST6/MM6 */
338 struct mmst_reg fpu_stmm7; /* ST7/MM7 */
339 struct xmm_reg fpu_xmm0; /* XMM 0 */
340 struct xmm_reg fpu_xmm1; /* XMM 1 */
341 struct xmm_reg fpu_xmm2; /* XMM 2 */
342 struct xmm_reg fpu_xmm3; /* XMM 3 */
343 struct xmm_reg fpu_xmm4; /* XMM 4 */
344 struct xmm_reg fpu_xmm5; /* XMM 5 */
345 struct xmm_reg fpu_xmm6; /* XMM 6 */
346 struct xmm_reg fpu_xmm7; /* XMM 7 */
347 char fpu_rsrv4[14*16]; /* reserved */
348 int fpu_reserved1;
349 } i386_float_state_t;
350
351
352 #define FP_old_STATE_BYTES ((mach_msg_type_number_t) \
353 (sizeof (struct i386_fp_save) + sizeof (struct i386_fp_regs)))
354
355 struct i386_old_float_state {
356 int fpkind; /* FP_NO..FP_387 (readonly) */
357 int initialized;
358 unsigned char hw_state[FP_old_STATE_BYTES]; /* actual "hardware" state */
359 int exc_status; /* exception status (readonly) */
360 };
361 #define i386_old_FLOAT_STATE_COUNT ((mach_msg_type_number_t) \
362 (sizeof(struct i386_old_float_state)/sizeof(unsigned int)))
363
364
365 #define PORT_MAP_BITS 0x400
366 struct i386_isa_port_map_state {
367 unsigned char pm[PORT_MAP_BITS>>3];
368 };
369
370 #define i386_ISA_PORT_MAP_STATE_COUNT ((mach_msg_type_number_t) \
371 (sizeof(struct i386_isa_port_map_state)/sizeof(unsigned int)))
372
373 /*
374 * V8086 assist supplies a pointer to an interrupt
375 * descriptor table in task space.
376 */
377 struct i386_v86_assist_state {
378 unsigned int int_table; /* interrupt table address */
379 int int_count; /* interrupt table size */
380 };
381
382 struct v86_interrupt_table {
383 unsigned int count; /* count of pending interrupts */
384 unsigned short mask; /* ignore this interrupt if true */
385 unsigned short vec; /* vector to take */
386 };
387
388 #define i386_V86_ASSIST_STATE_COUNT ((mach_msg_type_number_t) \
389 (sizeof(struct i386_v86_assist_state)/sizeof(unsigned int)))
390
391 struct thread_syscall_state {
392 unsigned eax;
393 unsigned edx;
394 unsigned efl;
395 unsigned eip;
396 unsigned esp;
397 };
398
399 #define i386_THREAD_SYSCALL_STATE_COUNT ((mach_msg_type_number_t) \
400 (sizeof(struct thread_syscall_state) / sizeof(unsigned int)))
401
402 /*
403 * Main thread state consists of
404 * general registers, segment registers,
405 * eip and eflags.
406 */
407
408 #define i386_THREAD_STATE -1
409
410 typedef struct {
411 unsigned int eax;
412 unsigned int ebx;
413 unsigned int ecx;
414 unsigned int edx;
415 unsigned int edi;
416 unsigned int esi;
417 unsigned int ebp;
418 unsigned int esp;
419 unsigned int ss;
420 unsigned int eflags;
421 unsigned int eip;
422 unsigned int cs;
423 unsigned int ds;
424 unsigned int es;
425 unsigned int fs;
426 unsigned int gs;
427 } i386_thread_state_t;
428
429 #define i386_THREAD_STATE_COUNT ((mach_msg_type_number_t) \
430 ( sizeof (i386_thread_state_t) / sizeof (int) ))
431
432 /*
433 * x86-64 compatibility
434 */
435 typedef i386_thread_state_t x86_thread_state32_t;
436 #define x86_THREAD_STATE32_COUNT ((mach_msg_type_number_t) \
437 ( sizeof (x86_thread_state32_t) / sizeof (int) ))
438
439
440
441
442 struct x86_thread_state64 {
443 uint64_t rax;
444 uint64_t rbx;
445 uint64_t rcx;
446 uint64_t rdx;
447 uint64_t rdi;
448 uint64_t rsi;
449 uint64_t rbp;
450 uint64_t rsp;
451 uint64_t r8;
452 uint64_t r9;
453 uint64_t r10;
454 uint64_t r11;
455 uint64_t r12;
456 uint64_t r13;
457 uint64_t r14;
458 uint64_t r15;
459 uint64_t rip;
460 uint64_t rflags;
461 uint64_t cs;
462 uint64_t fs;
463 uint64_t gs;
464 } ;
465
466
467 typedef struct x86_thread_state64 x86_thread_state64_t;
468 #define x86_THREAD_STATE64_COUNT ((mach_msg_type_number_t) \
469 ( sizeof (x86_thread_state64_t) / sizeof (int) ))
470
471
472
473
474 struct x86_thread_state {
475 x86_state_hdr_t tsh;
476 union {
477 x86_thread_state32_t ts32;
478 x86_thread_state64_t ts64;
479 } uts;
480 } ;
481
482
483 typedef struct x86_thread_state x86_thread_state_t;
484 #define x86_THREAD_STATE_COUNT ((mach_msg_type_number_t) \
485 ( sizeof (x86_thread_state_t) / sizeof (int) ))
486
487
488
489 /*
490 * Default segment register values.
491 */
492
493 #define USER_CODE_SELECTOR 0x0017
494 #define USER_DATA_SELECTOR 0x001f
495 #define KERN_CODE_SELECTOR 0x0008
496 #define KERN_DATA_SELECTOR 0x0010
497
498 /*
499 * Thread floating point state
500 * includes FPU environment as
501 * well as the register stack.
502 */
503
504 #define i386_THREAD_FPSTATE -2
505
506 typedef struct {
507 fp_env_t environ;
508 fp_stack_t stack;
509 } i386_thread_fpstate_t;
510
511 #define i386_THREAD_FPSTATE_COUNT ((mach_msg_type_number_t) \
512 ( sizeof (i386_thread_fpstate_t) / sizeof (int) ))
513
514
515 /*
516 * x86-64 compatibility
517 */
518 typedef i386_float_state_t x86_float_state32_t;
519 #define x86_FLOAT_STATE32_COUNT ((mach_msg_type_number_t) \
520 (sizeof(x86_float_state32_t)/sizeof(unsigned int)))
521
522
523 struct x86_float_state64 {
524 int fpu_reserved[2];
525 fp_control_t fpu_fcw; /* x87 FPU control word */
526 fp_status_t fpu_fsw; /* x87 FPU status word */
527 uint8_t fpu_ftw; /* x87 FPU tag word */
528 uint8_t fpu_rsrv1; /* reserved */
529 uint16_t fpu_fop; /* x87 FPU Opcode */
530 uint32_t fpu_ip; /* x87 FPU Instruction Pointer offset */
531 uint16_t fpu_cs; /* x87 FPU Instruction Pointer Selector */
532 uint16_t fpu_rsrv2; /* reserved */
533 uint32_t fpu_dp; /* x87 FPU Instruction Operand(Data) Pointer offset */
534 uint16_t fpu_ds; /* x87 FPU Instruction Operand(Data) Pointer Selector */
535 uint16_t fpu_rsrv3; /* reserved */
536 uint32_t fpu_mxcsr; /* MXCSR Register state */
537 uint32_t fpu_mxcsrmask; /* MXCSR mask */
538 struct mmst_reg fpu_stmm0; /* ST0/MM0 */
539 struct mmst_reg fpu_stmm1; /* ST1/MM1 */
540 struct mmst_reg fpu_stmm2; /* ST2/MM2 */
541 struct mmst_reg fpu_stmm3; /* ST3/MM3 */
542 struct mmst_reg fpu_stmm4; /* ST4/MM4 */
543 struct mmst_reg fpu_stmm5; /* ST5/MM5 */
544 struct mmst_reg fpu_stmm6; /* ST6/MM6 */
545 struct mmst_reg fpu_stmm7; /* ST7/MM7 */
546 struct xmm_reg fpu_xmm0; /* XMM 0 */
547 struct xmm_reg fpu_xmm1; /* XMM 1 */
548 struct xmm_reg fpu_xmm2; /* XMM 2 */
549 struct xmm_reg fpu_xmm3; /* XMM 3 */
550 struct xmm_reg fpu_xmm4; /* XMM 4 */
551 struct xmm_reg fpu_xmm5; /* XMM 5 */
552 struct xmm_reg fpu_xmm6; /* XMM 6 */
553 struct xmm_reg fpu_xmm7; /* XMM 7 */
554 struct xmm_reg fpu_xmm8; /* XMM 8 */
555 struct xmm_reg fpu_xmm9; /* XMM 9 */
556 struct xmm_reg fpu_xmm10; /* XMM 10 */
557 struct xmm_reg fpu_xmm11; /* XMM 11 */
558 struct xmm_reg fpu_xmm12; /* XMM 12 */
559 struct xmm_reg fpu_xmm13; /* XMM 13 */
560 struct xmm_reg fpu_xmm14; /* XMM 14 */
561 struct xmm_reg fpu_xmm15; /* XMM 15 */
562 char fpu_rsrv4[6*16]; /* reserved */
563 int fpu_reserved1;
564 };
565
566 typedef struct x86_float_state64 x86_float_state64_t;
567 #define x86_FLOAT_STATE64_COUNT ((mach_msg_type_number_t) \
568 (sizeof(x86_float_state64_t)/sizeof(unsigned int)))
569
570
571
572
573 struct x86_float_state {
574 x86_state_hdr_t fsh;
575 union {
576 x86_float_state32_t fs32;
577 x86_float_state64_t fs64;
578 } ufs;
579 } ;
580
581
582 typedef struct x86_float_state x86_float_state_t;
583 #define x86_FLOAT_STATE_COUNT ((mach_msg_type_number_t) \
584 ( sizeof (x86_float_state_t) / sizeof (int) ))
585
586
587
588 /*
589 * Extra state that may be
590 * useful to exception handlers.
591 */
592
593 #define i386_THREAD_EXCEPTSTATE -3
594
595 typedef struct {
596 unsigned int trapno;
597 err_code_t err;
598 } i386_thread_exceptstate_t;
599
600 #define i386_THREAD_EXCEPTSTATE_COUNT ((mach_msg_type_number_t) \
601 ( sizeof (i386_thread_exceptstate_t) / sizeof (int) ))
602
603
604 /*
605 * x86-64 compatibility
606 */
607 struct i386_exception_state {
608 unsigned int trapno;
609 unsigned int err;
610 unsigned int faultvaddr;
611 };
612
613 typedef struct i386_exception_state x86_exception_state32_t;
614 #define x86_EXCEPTION_STATE32_COUNT ((mach_msg_type_number_t) \
615 ( sizeof (x86_exception_state32_t) / sizeof (int) ))
616
617 struct x86_debug_state32 {
618 unsigned int dr0;
619 unsigned int dr1;
620 unsigned int dr2;
621 unsigned int dr3;
622 unsigned int dr4;
623 unsigned int dr5;
624 unsigned int dr6;
625 unsigned int dr7;
626 };
627
628 typedef struct x86_debug_state32 x86_debug_state32_t;
629 #define x86_DEBUG_STATE32_COUNT ((mach_msg_type_number_t) \
630 ( sizeof (x86_debug_state32_t) / sizeof (int) ))
631 #define X86_DEBUG_STATE32_COUNT x86_DEBUG_STATE32_COUNT
632
633
634 struct x86_exception_state64 {
635 unsigned int trapno;
636 unsigned int err;
637 uint64_t faultvaddr;
638 };
639
640 typedef struct x86_exception_state64 x86_exception_state64_t;
641 #define x86_EXCEPTION_STATE64_COUNT ((mach_msg_type_number_t) \
642 ( sizeof (x86_exception_state64_t) / sizeof (int) ))
643
644
645 struct x86_debug_state64 {
646 uint64_t dr0;
647 uint64_t dr1;
648 uint64_t dr2;
649 uint64_t dr3;
650 uint64_t dr4;
651 uint64_t dr5;
652 uint64_t dr6;
653 uint64_t dr7;
654 };
655
656
657 typedef struct x86_debug_state64 x86_debug_state64_t;
658 #define x86_DEBUG_STATE64_COUNT ((mach_msg_type_number_t) \
659 ( sizeof (x86_debug_state64_t) / sizeof (int) ))
660
661 #define X86_DEBUG_STATE64_COUNT x86_DEBUG_STATE64_COUNT
662
663
664
665 struct x86_exception_state {
666 x86_state_hdr_t esh;
667 union {
668 x86_exception_state32_t es32;
669 x86_exception_state64_t es64;
670 } ues;
671 } ;
672
673
674 typedef struct x86_exception_state x86_exception_state_t;
675 #define x86_EXCEPTION_STATE_COUNT ((mach_msg_type_number_t) \
676 ( sizeof (x86_exception_state_t) / sizeof (int) ))
677
678 struct x86_debug_state {
679 x86_state_hdr_t dsh;
680 union {
681 x86_debug_state32_t ds32;
682 x86_debug_state64_t ds64;
683 } uds;
684 };
685
686
687
688 typedef struct x86_debug_state x86_debug_state_t;
689 #define x86_DEBUG_STATE_COUNT ((mach_msg_type_number_t) \
690 (sizeof(x86_debug_state_t)/sizeof(unsigned int)))
691
692
693 /*
694 * Per-thread variable used
695 * to store 'self' id for cthreads.
696 */
697
698 #define i386_THREAD_CTHREADSTATE -4
699
700 typedef struct {
701 unsigned int self;
702 } i386_thread_cthreadstate_t;
703
704 #define i386_THREAD_CTHREADSTATE_COUNT ((mach_msg_type_number_t) \
705 ( sizeof (i386_thread_cthreadstate_t) / sizeof (int) ))
706
707 #endif /* _MACH_I386_THREAD_STATUS_H_ */