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34 * Mach Operating System
35 * Copyright (c) 1991,1990,1989 Carnegie Mellon University
36 * All Rights Reserved.
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39 * documentation is hereby granted, provided that both the copyright
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61 * File: thread_status.h
62 * Author: Avadis Tevanian, Jr.
65 * This file contains the structure definitions for the thread
66 * state as applied to I386 processors.
69 #ifndef _MACH_I386_THREAD_STATUS_H_
70 #define _MACH_I386_THREAD_STATUS_H_
72 #include <mach/message.h>
73 #include <mach/i386/fp_reg.h>
74 #include <mach/i386/thread_state.h>
75 #include <architecture/i386/frame.h> /* FIXME */
76 #include <architecture/i386/fpu.h> /* FIXME */
78 * i386_thread_state this is the structure that is exported
79 * to user threads for use in status/mutate
80 * calls. This structure should never
83 * i386_float_state exported to use threads for access to
84 * floating point registers. Try not to
85 * change this one, either.
87 * i386_isa_port_map_state exported to user threads to allow
88 * selective in/out operations
90 * i386_v86_assist_state
92 * thread_syscall_state
95 /* THREAD_STATE_FLAVOR_LIST 0 */
96 #define i386_NEW_THREAD_STATE 1 /* used to be i386_THREAD_STATE */
97 #define i386_FLOAT_STATE 2
98 #define i386_ISA_PORT_MAP_STATE 3
99 #define i386_V86_ASSIST_STATE 4
100 #define i386_REGS_SEGS_STATE 5
101 #define THREAD_SYSCALL_STATE 6
102 #define THREAD_STATE_NONE 7
103 #define i386_SAVED_STATE 8
107 * x86-64 compatibility
108 * THREAD_STATE_FLAVOR_LIST 0
109 * these are the supported flavors
111 #define x86_THREAD_STATE32 1
112 #define x86_FLOAT_STATE32 2
113 #define x86_EXCEPTION_STATE32 3
114 #define x86_THREAD_STATE64 4
115 #define x86_FLOAT_STATE64 5
116 #define x86_EXCEPTION_STATE64 6
117 #define x86_THREAD_STATE 7
118 #define x86_FLOAT_STATE 8
119 #define x86_EXCEPTION_STATE 9
120 #define x86_DEBUG_STATE32 10
121 #define x86_DEBUG_STATE64 11
122 #define x86_DEBUG_STATE 12
127 * VALID_THREAD_STATE_FLAVOR is a platform specific macro that when passed
128 * an exception flavor will return if that is a defined flavor for that
129 * platform. The macro must be manually updated to include all of the valid
130 * exception flavors as defined above.
132 #define VALID_THREAD_STATE_FLAVOR(x) \
133 ((x == i386_NEW_THREAD_STATE) || \
134 (x == i386_FLOAT_STATE) || \
135 (x == i386_ISA_PORT_MAP_STATE) || \
136 (x == i386_V86_ASSIST_STATE) || \
137 (x == i386_REGS_SEGS_STATE) || \
138 (x == THREAD_SYSCALL_STATE) || \
139 (x == THREAD_STATE_NONE) || \
140 (x == i386_SAVED_STATE))
144 * x86-64 compatibility
146 struct x86_state_hdr
{
150 typedef struct x86_state_hdr x86_state_hdr_t
;
154 * This structure is used for both
155 * i386_THREAD_STATE and i386_REGS_SEGS_STATE.
157 struct i386_new_thread_state
{
176 #define i386_NEW_THREAD_STATE_COUNT ((mach_msg_type_number_t) \
177 (sizeof (struct i386_new_thread_state)/sizeof(unsigned int)))
180 * Subset of saved state stored by processor on kernel-to-kernel
181 * trap. (Used by ddb to examine state guaranteed to be present
182 * on all traps into debugger.)
184 struct i386_saved_state_from_kernel
{
192 unsigned int esp
; /* kernel esp stored by pusha -
193 we save cr2 here later */
206 * The format in which thread state is saved by Mach on this machine. This
207 * state flavor is most efficient for exception RPC's to kernel-loaded
208 * servers, because copying can be avoided:
210 struct i386_saved_state
{
218 unsigned int esp
; /* kernel esp stored by pusha -
219 we save cr2 here later */
232 unsigned int v86_es
; /* virtual 8086 segment registers */
237 #define i386_SAVED_ARGV_COUNT 7
238 unsigned int argv_status
; /* Boolean flag indicating whether or
239 * not Mach copied in the args */
240 unsigned int argv
[i386_SAVED_ARGV_COUNT
];
241 /* The return address, and the first several
242 * function call args from the stack, for
243 * efficient syscall exceptions */
245 #define i386_SAVED_STATE_COUNT ((mach_msg_type_number_t) \
246 (sizeof (struct i386_saved_state)/sizeof(unsigned int)))
247 #define i386_REGS_SEGS_STATE_COUNT i386_SAVED_STATE_COUNT
250 * Machine-independent way for servers and Mach's exception mechanism to
251 * choose the most efficient state flavor for exception RPC's:
253 #define MACHINE_THREAD_STATE i386_SAVED_STATE
254 #define MACHINE_THREAD_STATE_COUNT 144
257 * Largest state on this machine:
258 * (be sure mach/machine/thread_state.h matches!)
260 #define THREAD_MACHINE_STATE_MAX THREAD_STATE_MAX
263 * Floating point state.
265 * fpkind tells in what way floating point operations are supported.
266 * See the values for fp_kind in <mach/i386/fp_reg.h>.
268 * If the kind is FP_NO, then calls to set the state will fail, and
269 * thread_getstatus will return garbage for the rest of the state.
270 * If "initialized" is false, then the rest of the state is garbage.
271 * Clients can set "initialized" to false to force the coprocessor to
273 * "exc_status" is non-zero if the thread has noticed (but not
274 * proceeded from) a coprocessor exception. It contains the status
275 * word with the exception bits set. The status word in "fp_status"
276 * will have the exception bits turned off. If an exception bit in
277 * "fp_status" is turned on, then "exc_status" should be zero. This
278 * happens when the coprocessor exception is noticed after the system
279 * has context switched to some other thread.
281 * If kind is FP_387, then "state" is a i387_state. Other kinds might
282 * also use i387_state, but somebody will have to verify it (XXX).
283 * Note that the registers are ordered from top-of-stack down, not
284 * according to physical register number.
288 * x86-64 compatibility
290 /* defn of 80bit x87 FPU or MMX register */
297 /* defn of 128 bit XMM regs */
302 #define FP_STATE_BYTES 512
304 struct i386_float_state
{
305 int fpkind
; /* FP_NO..FP_387 (readonly) */
307 unsigned char hw_state
[FP_STATE_BYTES
]; /* actual "hardware" state */
308 int exc_status
; /* exception status (readonly) */
310 #define i386_FLOAT_STATE_COUNT ((mach_msg_type_number_t) \
311 (sizeof(struct i386_float_state)/sizeof(unsigned int)))
314 * x86-64 compatibility
318 fp_control_t fpu_fcw
; /* x87 FPU control word */
319 fp_status_t fpu_fsw
; /* x87 FPU status word */
320 uint8_t fpu_ftw
; /* x87 FPU tag word */
321 uint8_t fpu_rsrv1
; /* reserved */
322 uint16_t fpu_fop
; /* x87 FPU Opcode */
323 uint32_t fpu_ip
; /* x87 FPU Instruction Pointer offset */
324 uint16_t fpu_cs
; /* x87 FPU Instruction Pointer Selector */
325 uint16_t fpu_rsrv2
; /* reserved */
326 uint32_t fpu_dp
; /* x87 FPU Instruction Operand(Data) Pointer offset */
327 uint16_t fpu_ds
; /* x87 FPU Instruction Operand(Data) Pointer Selector */
328 uint16_t fpu_rsrv3
; /* reserved */
329 uint32_t fpu_mxcsr
; /* MXCSR Register state */
330 uint32_t fpu_mxcsrmask
; /* MXCSR mask */
331 struct mmst_reg fpu_stmm0
; /* ST0/MM0 */
332 struct mmst_reg fpu_stmm1
; /* ST1/MM1 */
333 struct mmst_reg fpu_stmm2
; /* ST2/MM2 */
334 struct mmst_reg fpu_stmm3
; /* ST3/MM3 */
335 struct mmst_reg fpu_stmm4
; /* ST4/MM4 */
336 struct mmst_reg fpu_stmm5
; /* ST5/MM5 */
337 struct mmst_reg fpu_stmm6
; /* ST6/MM6 */
338 struct mmst_reg fpu_stmm7
; /* ST7/MM7 */
339 struct xmm_reg fpu_xmm0
; /* XMM 0 */
340 struct xmm_reg fpu_xmm1
; /* XMM 1 */
341 struct xmm_reg fpu_xmm2
; /* XMM 2 */
342 struct xmm_reg fpu_xmm3
; /* XMM 3 */
343 struct xmm_reg fpu_xmm4
; /* XMM 4 */
344 struct xmm_reg fpu_xmm5
; /* XMM 5 */
345 struct xmm_reg fpu_xmm6
; /* XMM 6 */
346 struct xmm_reg fpu_xmm7
; /* XMM 7 */
347 char fpu_rsrv4
[14*16]; /* reserved */
349 } i386_float_state_t
;
352 #define FP_old_STATE_BYTES ((mach_msg_type_number_t) \
353 (sizeof (struct i386_fp_save) + sizeof (struct i386_fp_regs)))
355 struct i386_old_float_state
{
356 int fpkind
; /* FP_NO..FP_387 (readonly) */
358 unsigned char hw_state
[FP_old_STATE_BYTES
]; /* actual "hardware" state */
359 int exc_status
; /* exception status (readonly) */
361 #define i386_old_FLOAT_STATE_COUNT ((mach_msg_type_number_t) \
362 (sizeof(struct i386_old_float_state)/sizeof(unsigned int)))
365 #define PORT_MAP_BITS 0x400
366 struct i386_isa_port_map_state
{
367 unsigned char pm
[PORT_MAP_BITS
>>3];
370 #define i386_ISA_PORT_MAP_STATE_COUNT ((mach_msg_type_number_t) \
371 (sizeof(struct i386_isa_port_map_state)/sizeof(unsigned int)))
374 * V8086 assist supplies a pointer to an interrupt
375 * descriptor table in task space.
377 struct i386_v86_assist_state
{
378 unsigned int int_table
; /* interrupt table address */
379 int int_count
; /* interrupt table size */
382 struct v86_interrupt_table
{
383 unsigned int count
; /* count of pending interrupts */
384 unsigned short mask
; /* ignore this interrupt if true */
385 unsigned short vec
; /* vector to take */
388 #define i386_V86_ASSIST_STATE_COUNT ((mach_msg_type_number_t) \
389 (sizeof(struct i386_v86_assist_state)/sizeof(unsigned int)))
391 struct thread_syscall_state
{
399 #define i386_THREAD_SYSCALL_STATE_COUNT ((mach_msg_type_number_t) \
400 (sizeof(struct thread_syscall_state) / sizeof(unsigned int)))
403 * Main thread state consists of
404 * general registers, segment registers,
408 #define i386_THREAD_STATE -1
427 } i386_thread_state_t
;
429 #define i386_THREAD_STATE_COUNT ((mach_msg_type_number_t) \
430 ( sizeof (i386_thread_state_t) / sizeof (int) ))
433 * x86-64 compatibility
435 typedef i386_thread_state_t x86_thread_state32_t
;
436 #define x86_THREAD_STATE32_COUNT ((mach_msg_type_number_t) \
437 ( sizeof (x86_thread_state32_t) / sizeof (int) ))
442 struct x86_thread_state64
{
467 typedef struct x86_thread_state64 x86_thread_state64_t
;
468 #define x86_THREAD_STATE64_COUNT ((mach_msg_type_number_t) \
469 ( sizeof (x86_thread_state64_t) / sizeof (int) ))
474 struct x86_thread_state
{
477 x86_thread_state32_t ts32
;
478 x86_thread_state64_t ts64
;
483 typedef struct x86_thread_state x86_thread_state_t
;
484 #define x86_THREAD_STATE_COUNT ((mach_msg_type_number_t) \
485 ( sizeof (x86_thread_state_t) / sizeof (int) ))
490 * Default segment register values.
493 #define USER_CODE_SELECTOR 0x0017
494 #define USER_DATA_SELECTOR 0x001f
495 #define KERN_CODE_SELECTOR 0x0008
496 #define KERN_DATA_SELECTOR 0x0010
499 * Thread floating point state
500 * includes FPU environment as
501 * well as the register stack.
504 #define i386_THREAD_FPSTATE -2
509 } i386_thread_fpstate_t
;
511 #define i386_THREAD_FPSTATE_COUNT ((mach_msg_type_number_t) \
512 ( sizeof (i386_thread_fpstate_t) / sizeof (int) ))
516 * x86-64 compatibility
518 typedef i386_float_state_t x86_float_state32_t
;
519 #define x86_FLOAT_STATE32_COUNT ((mach_msg_type_number_t) \
520 (sizeof(x86_float_state32_t)/sizeof(unsigned int)))
523 struct x86_float_state64
{
525 fp_control_t fpu_fcw
; /* x87 FPU control word */
526 fp_status_t fpu_fsw
; /* x87 FPU status word */
527 uint8_t fpu_ftw
; /* x87 FPU tag word */
528 uint8_t fpu_rsrv1
; /* reserved */
529 uint16_t fpu_fop
; /* x87 FPU Opcode */
530 uint32_t fpu_ip
; /* x87 FPU Instruction Pointer offset */
531 uint16_t fpu_cs
; /* x87 FPU Instruction Pointer Selector */
532 uint16_t fpu_rsrv2
; /* reserved */
533 uint32_t fpu_dp
; /* x87 FPU Instruction Operand(Data) Pointer offset */
534 uint16_t fpu_ds
; /* x87 FPU Instruction Operand(Data) Pointer Selector */
535 uint16_t fpu_rsrv3
; /* reserved */
536 uint32_t fpu_mxcsr
; /* MXCSR Register state */
537 uint32_t fpu_mxcsrmask
; /* MXCSR mask */
538 struct mmst_reg fpu_stmm0
; /* ST0/MM0 */
539 struct mmst_reg fpu_stmm1
; /* ST1/MM1 */
540 struct mmst_reg fpu_stmm2
; /* ST2/MM2 */
541 struct mmst_reg fpu_stmm3
; /* ST3/MM3 */
542 struct mmst_reg fpu_stmm4
; /* ST4/MM4 */
543 struct mmst_reg fpu_stmm5
; /* ST5/MM5 */
544 struct mmst_reg fpu_stmm6
; /* ST6/MM6 */
545 struct mmst_reg fpu_stmm7
; /* ST7/MM7 */
546 struct xmm_reg fpu_xmm0
; /* XMM 0 */
547 struct xmm_reg fpu_xmm1
; /* XMM 1 */
548 struct xmm_reg fpu_xmm2
; /* XMM 2 */
549 struct xmm_reg fpu_xmm3
; /* XMM 3 */
550 struct xmm_reg fpu_xmm4
; /* XMM 4 */
551 struct xmm_reg fpu_xmm5
; /* XMM 5 */
552 struct xmm_reg fpu_xmm6
; /* XMM 6 */
553 struct xmm_reg fpu_xmm7
; /* XMM 7 */
554 struct xmm_reg fpu_xmm8
; /* XMM 8 */
555 struct xmm_reg fpu_xmm9
; /* XMM 9 */
556 struct xmm_reg fpu_xmm10
; /* XMM 10 */
557 struct xmm_reg fpu_xmm11
; /* XMM 11 */
558 struct xmm_reg fpu_xmm12
; /* XMM 12 */
559 struct xmm_reg fpu_xmm13
; /* XMM 13 */
560 struct xmm_reg fpu_xmm14
; /* XMM 14 */
561 struct xmm_reg fpu_xmm15
; /* XMM 15 */
562 char fpu_rsrv4
[6*16]; /* reserved */
566 typedef struct x86_float_state64 x86_float_state64_t
;
567 #define x86_FLOAT_STATE64_COUNT ((mach_msg_type_number_t) \
568 (sizeof(x86_float_state64_t)/sizeof(unsigned int)))
573 struct x86_float_state
{
576 x86_float_state32_t fs32
;
577 x86_float_state64_t fs64
;
582 typedef struct x86_float_state x86_float_state_t
;
583 #define x86_FLOAT_STATE_COUNT ((mach_msg_type_number_t) \
584 ( sizeof (x86_float_state_t) / sizeof (int) ))
589 * Extra state that may be
590 * useful to exception handlers.
593 #define i386_THREAD_EXCEPTSTATE -3
598 } i386_thread_exceptstate_t
;
600 #define i386_THREAD_EXCEPTSTATE_COUNT ((mach_msg_type_number_t) \
601 ( sizeof (i386_thread_exceptstate_t) / sizeof (int) ))
605 * x86-64 compatibility
607 struct i386_exception_state
{
610 unsigned int faultvaddr
;
613 typedef struct i386_exception_state x86_exception_state32_t
;
614 #define x86_EXCEPTION_STATE32_COUNT ((mach_msg_type_number_t) \
615 ( sizeof (x86_exception_state32_t) / sizeof (int) ))
617 struct x86_debug_state32
{
628 typedef struct x86_debug_state32 x86_debug_state32_t
;
629 #define x86_DEBUG_STATE32_COUNT ((mach_msg_type_number_t) \
630 ( sizeof (x86_debug_state32_t) / sizeof (int) ))
631 #define X86_DEBUG_STATE32_COUNT x86_DEBUG_STATE32_COUNT
634 struct x86_exception_state64
{
640 typedef struct x86_exception_state64 x86_exception_state64_t
;
641 #define x86_EXCEPTION_STATE64_COUNT ((mach_msg_type_number_t) \
642 ( sizeof (x86_exception_state64_t) / sizeof (int) ))
645 struct x86_debug_state64
{
657 typedef struct x86_debug_state64 x86_debug_state64_t
;
658 #define x86_DEBUG_STATE64_COUNT ((mach_msg_type_number_t) \
659 ( sizeof (x86_debug_state64_t) / sizeof (int) ))
661 #define X86_DEBUG_STATE64_COUNT x86_DEBUG_STATE64_COUNT
665 struct x86_exception_state
{
668 x86_exception_state32_t es32
;
669 x86_exception_state64_t es64
;
674 typedef struct x86_exception_state x86_exception_state_t
;
675 #define x86_EXCEPTION_STATE_COUNT ((mach_msg_type_number_t) \
676 ( sizeof (x86_exception_state_t) / sizeof (int) ))
678 struct x86_debug_state
{
681 x86_debug_state32_t ds32
;
682 x86_debug_state64_t ds64
;
688 typedef struct x86_debug_state x86_debug_state_t
;
689 #define x86_DEBUG_STATE_COUNT ((mach_msg_type_number_t) \
690 (sizeof(x86_debug_state_t)/sizeof(unsigned int)))
694 * Per-thread variable used
695 * to store 'self' id for cthreads.
698 #define i386_THREAD_CTHREADSTATE -4
702 } i386_thread_cthreadstate_t
;
704 #define i386_THREAD_CTHREADSTATE_COUNT ((mach_msg_type_number_t) \
705 ( sizeof (i386_thread_cthreadstate_t) / sizeof (int) ))
707 #endif /* _MACH_I386_THREAD_STATUS_H_ */