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24 * clock_speed_asm.s - Uses the Via timer, decrementer, and counter
25 * to determine the clock and bus rates.
27 * (c) Apple Computer, Inc. 1998-9
29 * Writen by: Josh de Cesare
35 // constants for the via
36 #define CountLow 0x800
37 #define CountHigh 0xa00
38 #define LatchLow 0xc00
39 #define LatchHigh 0xe00
42 // void pe_run_clock_test(clock_test_data *data)
44 // data points to the base address of the via and two longs
45 // for storing the via and dec results.
47 // The basic idea is this...
48 // Use the counter register to execute a loop that will take
49 // 10,000,000 processor clocks. Time it using both the via counter
50 // and the time base. Return the number of ticks for both so the
51 // raw values for processor and bus speed can be calculated.
52 ENTRY(pe_run_clock_test, TAG_NO_FRAME_USED)
54 li r4, 1 ; flag for cache load
55 li r5, 1 ; Only once through this time
56 lwz r9, 0(r3) ; r9 is the via addr
59 mtctr r5 ; set the count
60 li r5, 0xff ; Start the counter at 0xffff
61 stb r5, CountLow(r9) ; clear the via counter
65 mftb r10 ; save starting value of the time base
69 addi r5, r5, 1 ; 8 adds for 8 cycles
70 addi r5, r5, 2 ; the bdnz should be 0 cycles
80 mftb r5 ; save the raw time base value
81 lbz r6, CountHigh(r9) ; get the via counter values
88 cmpi cr0, r4, 1 ; see if the was the cache run
89 bne L_finish_up ; nope, we are done.
91 li r4, 0 ; set flag for the real test
92 li r5, 0x12d0 ; set the initial count to 1.25e+6
97 cmpi cr0, r7, 0 ; if L1 is zero then H1 is good.
98 beq L_use_H1 ; else H2 will be good.
100 mr r6, r8 ; use H2 instead.
103 rlwimi r7, r6, 8, 16, 23
104 not r6, r7 ; neg - 1 is not
106 stw r6, 4(r3) ; save via ticks
108 sub r5, r5, r10 ; r5 is the number of time base ticks
109 stw r5, 8(r3) ; save time base ticks