osfmk/mach/ppc/thread_status.h

   1 /*
   2  * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * The contents of this file constitute Original Code as defined in and
   7  * are subject to the Apple Public Source License Version 1.1 (the
   8  * "License").  You may not use this file except in compliance with the
   9  * License.  Please obtain a copy of the License at
  10  * http://www.apple.com/publicsource and read it before using this file.
  11  *
  12  * This Original Code and all software distributed under the License are
  13  * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  14  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  15  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
  17  * License for the specific language governing rights and limitations
  18  * under the License.
  19  *
  20  * @APPLE_LICENSE_HEADER_END@
  21  */
  22 /*
  23  * @OSF_COPYRIGHT@
  24  */
  25
  26 #ifndef _MACH_PPC_THREAD_STATUS_H_
  27 #define _MACH_PPC_THREAD_STATUS_H_
  28
  29 /*
  30  * ppc_thread_state is the structure that is exported to user threads for
  31  * use in status/mutate calls.  This structure should never change.
  32  *
  33  */
  34
  35 #define PPC_THREAD_STATE        1
  36 #define PPC_FLOAT_STATE         2
  37 #define PPC_EXCEPTION_STATE             3
  38 #define PPC_VECTOR_STATE                4
  39 #define THREAD_STATE_NONE               7
  40
  41 /*
  42  * VALID_THREAD_STATE_FLAVOR is a platform specific macro that when passed
  43  * an exception flavor will return whether that is a defined flavor for
  44  * that platform.
  45  * The macro must be manually updated to include all of the valid exception
  46  * flavors as defined above.
  47  */
  48 #define VALID_THREAD_STATE_FLAVOR(x)       \
  49         ((x == PPC_THREAD_STATE)        || \
  50          (x == PPC_FLOAT_STATE)         || \
  51          (x == PPC_EXCEPTION_STATE)     || \
  52          (x == PPC_VECTOR_STATE)        || \
  53          (x == THREAD_STATE_NONE))
  54
  55 typedef struct ppc_thread_state {
  56         unsigned int srr0;      /* Instruction address register (PC) */
  57         unsigned int srr1;      /* Machine state register (supervisor) */
  58         unsigned int r0;
  59         unsigned int r1;
  60         unsigned int r2;
  61         unsigned int r3;
  62         unsigned int r4;
  63         unsigned int r5;
  64         unsigned int r6;
  65         unsigned int r7;
  66         unsigned int r8;
  67         unsigned int r9;
  68         unsigned int r10;
  69         unsigned int r11;
  70         unsigned int r12;
  71         unsigned int r13;
  72         unsigned int r14;
  73         unsigned int r15;
  74         unsigned int r16;
  75         unsigned int r17;
  76         unsigned int r18;
  77         unsigned int r19;
  78         unsigned int r20;
  79         unsigned int r21;
  80         unsigned int r22;
  81         unsigned int r23;
  82         unsigned int r24;
  83         unsigned int r25;
  84         unsigned int r26;
  85         unsigned int r27;
  86         unsigned int r28;
  87         unsigned int r29;
  88         unsigned int r30;
  89         unsigned int r31;
  90
  91         unsigned int cr;        /* Condition register */
  92         unsigned int xer;       /* User's integer exception register */
  93         unsigned int lr;        /* Link register */
  94         unsigned int ctr;       /* Count register */
  95         unsigned int mq;        /* MQ register (601 only) */
  96
  97         unsigned int vrsave;    /* Vector Save Register */
  98 } ppc_thread_state_t;
  99
 100 /* This structure should be double-word aligned for performance */
 101
 102 typedef struct ppc_float_state {
 103         double  fpregs[32];
 104
 105         unsigned int fpscr_pad; /* fpscr is 64 bits, 32 bits of rubbish */
 106         unsigned int fpscr;     /* floating point status register */
 107 } ppc_float_state_t;
 108
 109 typedef struct ppc_vector_state {
 110         unsigned long   save_vr[32][4];
 111         unsigned long   save_vscr[4];
 112         unsigned int    save_pad5[4];
 113         unsigned int    save_vrvalid;                   /* VRs that have been saved */
 114         unsigned int    save_pad6[7];
 115 } ppc_vector_state_t;
 116
 117 /*
 118  * saved state structure
 119  *
 120  * This structure corresponds to the state of the user registers as saved
 121  * on the stack upon kernel entry (saved in pcb). On interrupts and exceptions
 122  * we save all registers. On system calls we only save the registers not
 123  * saved by the caller.
 124  *
 125  */
 126
 127 typedef struct ppc_saved_state {
 128         unsigned int srr0;      /* Instruction address register (PC) */
 129         unsigned int srr1;      /* Machine state register (supervisor) */
 130         unsigned int r0;
 131         unsigned int r1;
 132         unsigned int r2;
 133         unsigned int r3;
 134         unsigned int r4;
 135         unsigned int r5;
 136         unsigned int r6;
 137         unsigned int r7;
 138         unsigned int r8;
 139         unsigned int r9;
 140         unsigned int r10;
 141         unsigned int r11;
 142         unsigned int r12;
 143         unsigned int r13;
 144         unsigned int r14;
 145         unsigned int r15;
 146         unsigned int r16;
 147         unsigned int r17;
 148         unsigned int r18;
 149         unsigned int r19;
 150         unsigned int r20;
 151         unsigned int r21;
 152         unsigned int r22;
 153         unsigned int r23;
 154         unsigned int r24;
 155         unsigned int r25;
 156         unsigned int r26;
 157         unsigned int r27;
 158         unsigned int r28;
 159         unsigned int r29;
 160         unsigned int r30;
 161         unsigned int r31;
 162
 163         unsigned int cr;        /* Condition register */
 164         unsigned int xer;               /* User's integer exception register */
 165         unsigned int lr;                /* Link register */
 166         unsigned int ctr;               /* Count register */
 167         unsigned int mq;                /* MQ register (601 only) */
 168         unsigned int vrsave;    /* Vector Register Save */
 169
 170 /*      These are extra.  Remove them from the count */
 171
 172         unsigned int sr_copyin; /* SR_COPYIN is used for remapping */
 173         unsigned int pad2[7];   /* struct alignment */
 174 } ppc_saved_state_t;
 175
 176 /*
 177  * ppc_exception_state
 178  *
 179  * This structure corresponds to some additional state of the user
 180  * registers as saved in the PCB upon kernel entry. They are only
 181  * available if an exception is passed out of the kernel, and even
 182  * then not all are guaranteed to be updated.
 183  *
 184  * Some padding is included in this structure which allows space for
 185  * servers to store temporary values if need be, to maintain binary
 186  * compatiblity.
 187  */
 188
 189 typedef struct ppc_exception_state {
 190         unsigned long dar;      /* Fault registers for coredump */
 191         unsigned long dsisr;
 192         unsigned long exception;/* number of powerpc exception taken */
 193         unsigned long pad0;     /* align to 16 bytes */
 194
 195         unsigned long pad1[4];  /* space in PCB "just in case" */
 196 } ppc_exception_state_t;
 197
 198 /*
 199  * Save State Flags
 200  */
 201
 202 #define PPC_THREAD_STATE_COUNT \
 203    (sizeof(struct ppc_thread_state) / sizeof(int))
 204
 205 #define PPC_EXCEPTION_STATE_COUNT \
 206    (sizeof(struct ppc_exception_state) / sizeof(int))
 207
 208 #define PPC_FLOAT_STATE_COUNT \
 209    (sizeof(struct ppc_float_state) / sizeof(int))
 210
 211 #define PPC_VECTOR_STATE_COUNT \
 212    (sizeof(struct ppc_vector_state) / sizeof(int))
 213
 214 /*
 215  * Machine-independent way for servers and Mach's exception mechanism to
 216  * choose the most efficient state flavor for exception RPC's:
 217  */
 218 #define MACHINE_THREAD_STATE            PPC_THREAD_STATE
 219 #define MACHINE_THREAD_STATE_COUNT      PPC_THREAD_STATE_COUNT
 220
 221 /*
 222  * Largest state on this machine:
 223  */
 224 #define THREAD_MACHINE_STATE_MAX        PPC_VECTOR_STATE_COUNT
 225
 226 #endif /* _MACH_PPC_THREAD_STATUS_H_ */