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1 /*
2 * Copyright (c) 2003 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved.
7 *
8 * This file contains Original Code and/or Modifications of Original Code
9 * as defined in and that are subject to the Apple Public Source License
10 * Version 2.0 (the 'License'). You may not use this file except in
11 * compliance with the License. Please obtain a copy of the License at
12 * http://www.opensource.apple.com/apsl/ and read it before using this
13 * file.
14 *
15 * The Original Code and all software distributed under the License are
16 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
17 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
18 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
20 * Please see the License for the specific language governing rights and
21 * limitations under the License.
22 *
23 * @APPLE_LICENSE_HEADER_END@
24 */
25
26 #define ASSEMBLER
27 #include <ppc/chud/chud_spr.h>
28 #include <ppc/asm.h>
29 #include <mach/kern_return.h>
30
31 .text
32 .align 5
33 .globl EXT(chudxnu_mfsrr0_64)
34 EXT(chudxnu_mfsrr0_64):
35 mfspr r5,chud_ppc_srr0
36 std r5,0(r3)
37 blr
38
39 .align 5
40 .globl EXT(chudxnu_mfsrr1_64)
41 EXT(chudxnu_mfsrr1_64):
42 mfspr r5,chud_ppc_srr1
43 std r5,0(r3)
44 blr
45
46 .align 5
47 .globl EXT(chudxnu_mfdar_64)
48 EXT(chudxnu_mfdar_64):
49 mfspr r5,chud_ppc_dar
50 std r5,0(r3)
51 blr
52
53 .align 5
54 .globl EXT(chudxnu_mfsdr1_64)
55 EXT(chudxnu_mfsdr1_64):
56 mfspr r5,chud_ppc_sdr1
57 std r5,0(r3)
58 blr
59
60 .align 5
61 .globl EXT(chudxnu_mfsprg0_64)
62 EXT(chudxnu_mfsprg0_64):
63 mfspr r5,chud_ppc_sprg0
64 std r5,0(r3)
65 blr
66
67 .align 5
68 .globl EXT(chudxnu_mfsprg1_64)
69 EXT(chudxnu_mfsprg1_64):
70 mfspr r5,chud_ppc_sprg1
71 std r5,0(r3)
72 blr
73
74 .align 5
75 .globl EXT(chudxnu_mfsprg2_64)
76 EXT(chudxnu_mfsprg2_64):
77 mfspr r5,chud_ppc_sprg2
78 std r5,0(r3)
79 blr
80
81 .align 5
82 .globl EXT(chudxnu_mfsprg3_64)
83 EXT(chudxnu_mfsprg3_64):
84 mfspr r5,chud_ppc_sprg3
85 std r5,0(r3)
86 blr
87
88 .align 5
89 .globl EXT(chudxnu_mfasr_64)
90 EXT(chudxnu_mfasr_64):
91 mfspr r5,chud_ppc64_asr
92 std r5,0(r3)
93 blr
94
95 .align 5
96 .globl EXT(chudxnu_mfdabr_64)
97 EXT(chudxnu_mfdabr_64):
98 mfspr r5,chud_ppc_dabr
99 std r5,0(r3)
100 blr
101
102 .align 5
103 .globl EXT(chudxnu_mfhid0_64)
104 EXT(chudxnu_mfhid0_64):
105 mfspr r5,chud_970_hid0
106 std r5,0(r3)
107 blr
108
109 .align 5
110 .globl EXT(chudxnu_mfhid1_64)
111 EXT(chudxnu_mfhid1_64):
112 mfspr r5,chud_970_hid1
113 std r5,0(r3)
114 blr
115
116 .align 5
117 .globl EXT(chudxnu_mfhid4_64)
118 EXT(chudxnu_mfhid4_64):
119 mfspr r5,chud_970_hid4
120 std r5,0(r3)
121 blr
122
123 .align 5
124 .globl EXT(chudxnu_mfhid5_64)
125 EXT(chudxnu_mfhid5_64):
126 mfspr r5,chud_970_hid5
127 std r5,0(r3)
128 blr
129
130 .align 5
131 .globl EXT(chudxnu_mfmmcr0_64)
132 EXT(chudxnu_mfmmcr0_64):
133 mfspr r5,chud_970_mmcr0
134 std r5,0(r3)
135 blr
136
137 .align 5
138 .globl EXT(chudxnu_mfmmcr1_64)
139 EXT(chudxnu_mfmmcr1_64):
140 mfspr r5,chud_970_mmcr1
141 std r5,0(r3)
142 blr
143
144 .align 5
145 .globl EXT(chudxnu_mfmmcra_64)
146 EXT(chudxnu_mfmmcra_64):
147 mfspr r5,chud_970_mmcra
148 std r5,0(r3)
149 blr
150
151 .align 5
152 .globl EXT(chudxnu_mfsiar_64)
153 EXT(chudxnu_mfsiar_64):
154 mfspr r5,chud_970_siar
155 std r5,0(r3)
156 blr
157
158 .align 5
159 .globl EXT(chudxnu_mfsdar_64)
160 EXT(chudxnu_mfsdar_64):
161 mfspr r5,chud_970_sdar
162 std r5,0(r3)
163 blr
164
165 .align 5
166 .globl EXT(chudxnu_mfimc_64)
167 EXT(chudxnu_mfimc_64):
168 mfspr r5,chud_970_imc
169 std r5,0(r3)
170 blr
171
172 .align 5
173 .globl EXT(chudxnu_mfrmor_64)
174 EXT(chudxnu_mfrmor_64):
175 mfspr r5,chud_970_rmor
176 std r5,0(r3)
177 blr
178
179 .align 5
180 .globl EXT(chudxnu_mfhrmor_64)
181 EXT(chudxnu_mfhrmor_64):
182 mfspr r5,chud_970_hrmor
183 std r5,0(r3)
184 blr
185
186 .align 5
187 .globl EXT(chudxnu_mfhior_64)
188 EXT(chudxnu_mfhior_64):
189 mfspr r5,chud_970_hior
190 std r5,0(r3)
191 blr
192
193 .align 5
194 .globl EXT(chudxnu_mflpidr_64)
195 EXT(chudxnu_mflpidr_64):
196 mfspr r5,chud_970_lpidr
197 std r5,0(r3)
198 blr
199
200 .align 5
201 .globl EXT(chudxnu_mflpcr_64)
202 EXT(chudxnu_mflpcr_64):
203 mfspr r5,chud_970_lpcr
204 std r5,0(r3)
205 blr
206
207 .align 5
208 .globl EXT(chudxnu_mfdabrx_64)
209 EXT(chudxnu_mfdabrx_64):
210 mfspr r5,chud_970_dabrx
211 std r5,0(r3)
212 blr
213
214 .align 5
215 .globl EXT(chudxnu_mfhsprg0_64)
216 EXT(chudxnu_mfhsprg0_64):
217 mfspr r5,chud_970_hsprg0
218 std r5,0(r3)
219 blr
220
221 .align 5
222 .globl EXT(chudxnu_mfhsprg1_64)
223 EXT(chudxnu_mfhsprg1_64):
224 mfspr r5,chud_970_hsprg1
225 std r5,0(r3)
226 blr
227
228 .align 5
229 .globl EXT(chudxnu_mfhsrr0_64)
230 EXT(chudxnu_mfhsrr0_64):
231 mfspr r5,chud_970_hsrr0
232 std r5,0(r3)
233 blr
234
235 .align 5
236 .globl EXT(chudxnu_mfhsrr1_64)
237 EXT(chudxnu_mfhsrr1_64):
238 mfspr r5,chud_970_hsrr1
239 std r5,0(r3)
240 blr
241
242 .align 5
243 .globl EXT(chudxnu_mfhdec_64)
244 EXT(chudxnu_mfhdec_64):
245 mfspr r5,chud_970_hdec
246 std r5,0(r3)
247 blr
248
249 .align 5
250 .globl EXT(chudxnu_mftrig0_64)
251 EXT(chudxnu_mftrig0_64):
252 mfspr r5,chud_970_trig0
253 std r5,0(r3)
254 blr
255
256 .align 5
257 .globl EXT(chudxnu_mftrig1_64)
258 EXT(chudxnu_mftrig1_64):
259 mfspr r5,chud_970_trig1
260 std r5,0(r3)
261 blr
262
263 .align 5
264 .globl EXT(chudxnu_mftrig2_64)
265 EXT(chudxnu_mftrig2_64):
266 mfspr r5,chud_970_trig2
267 std r5,0(r3)
268 blr
269
270 .align 5
271 .globl EXT(chudxnu_mfaccr_64)
272 EXT(chudxnu_mfaccr_64):
273 mfspr r5,chud_ppc64_accr
274 std r5,0(r3)
275 blr
276
277 .align 5
278 .globl EXT(chudxnu_mfscomc_64)
279 EXT(chudxnu_mfscomc_64):
280 mfspr r5,chud_970_scomc
281 std r5,0(r3)
282 blr
283
284 .align 5
285 .globl EXT(chudxnu_mfscomd_64)
286 EXT(chudxnu_mfscomd_64):
287 mfspr r5,chud_970_scomd
288 std r5,0(r3)
289 blr
290
291 .align 5
292 .globl EXT(chudxnu_mtsrr0_64)
293 EXT(chudxnu_mtsrr0_64):
294 ld r5,0(r4)
295 mtspr chud_ppc_srr0,r5
296 blr
297
298 .align 5
299 .globl EXT(chudxnu_mtsrr1_64)
300 EXT(chudxnu_mtsrr1_64):
301 ld r5,0(r4)
302 mtspr chud_ppc_srr1,r5
303 blr
304
305 .align 5
306 .globl EXT(chudxnu_mtdar_64)
307 EXT(chudxnu_mtdar_64):
308 ld r5,0(r4)
309 mtspr chud_ppc_dar,r5
310 blr
311
312 .align 5
313 .globl EXT(chudxnu_mtsdr1_64)
314 EXT(chudxnu_mtsdr1_64):
315 ld r5,0(r4)
316 mtspr chud_ppc_sdr1,r5
317 blr
318
319 .align 5
320 .globl EXT(chudxnu_mtsprg0_64)
321 EXT(chudxnu_mtsprg0_64):
322 ld r5,0(r4)
323 mtspr chud_ppc_sprg0,r5
324 blr
325
326 .align 5
327 .globl EXT(chudxnu_mtsprg1_64)
328 EXT(chudxnu_mtsprg1_64):
329 ld r5,0(r4)
330 mtspr chud_ppc_sprg1,r5
331 blr
332
333 .align 5
334 .globl EXT(chudxnu_mtsprg2_64)
335 EXT(chudxnu_mtsprg2_64):
336 ld r5,0(r4)
337 mtspr chud_ppc_sprg2,r5
338 blr
339
340 .align 5
341 .globl EXT(chudxnu_mtsprg3_64)
342 EXT(chudxnu_mtsprg3_64):
343 ld r5,0(r4)
344 mtspr chud_ppc_sprg3,r5
345 blr
346
347 .align 5
348 .globl EXT(chudxnu_mtasr_64)
349 EXT(chudxnu_mtasr_64):
350 ld r5,0(r4)
351 mtspr chud_ppc64_asr,r5
352 blr
353
354 .align 5
355 .globl EXT(chudxnu_mtdabr_64)
356 EXT(chudxnu_mtdabr_64):
357 ld r5,0(r4)
358 mtspr chud_ppc_dabr,r5
359 blr
360
361 .align 5
362 .globl EXT(chudxnu_mthid0_64)
363 EXT(chudxnu_mthid0_64):
364 ld r5,0(r4)
365 sync
366 mtspr chud_970_hid0,r5
367 mfspr r5,chud_970_hid0 /* syncronization requirements */
368 mfspr r5,chud_970_hid0
369 mfspr r5,chud_970_hid0
370 mfspr r5,chud_970_hid0
371 mfspr r5,chud_970_hid0
372 mfspr r5,chud_970_hid0
373 blr
374
375 .align 5
376 .globl EXT(chudxnu_mthid1_64)
377 EXT(chudxnu_mthid1_64):
378 ld r5,0(r4)
379 mtspr chud_970_hid1,r5 /* tell you twice */
380 mtspr chud_970_hid1,r5
381 isync
382 blr
383
384 .align 5
385 .globl EXT(chudxnu_mthid4_64)
386 EXT(chudxnu_mthid4_64):
387 ld r5,0(r4)
388 sync /* syncronization requirements */
389 mtspr chud_970_hid4,r5
390 isync
391 blr
392
393 .align 5
394 .globl EXT(chudxnu_mthid5_64)
395 EXT(chudxnu_mthid5_64):
396 ld r5,0(r4)
397 mtspr chud_970_hid5,r5
398 blr
399
400 .align 5
401 .globl EXT(chudxnu_mtmmcr0_64)
402 EXT(chudxnu_mtmmcr0_64):
403 ld r5,0(r4)
404 mtspr chud_970_mmcr0,r5
405 blr
406
407 .align 5
408 .globl EXT(chudxnu_mtmmcr1_64)
409 EXT(chudxnu_mtmmcr1_64):
410 ld r5,0(r4)
411 mtspr chud_970_mmcr1,r5
412 blr
413
414 .align 5
415 .globl EXT(chudxnu_mtmmcra_64)
416 EXT(chudxnu_mtmmcra_64):
417 ld r5,0(r4)
418 mtspr chud_970_mmcra,r5
419 blr
420
421 .align 5
422 .globl EXT(chudxnu_mtsiar_64)
423 EXT(chudxnu_mtsiar_64):
424 ld r5,0(r4)
425 mtspr chud_970_siar,r5
426 blr
427
428 .align 5
429 .globl EXT(chudxnu_mtsdar_64)
430 EXT(chudxnu_mtsdar_64):
431 ld r5,0(r4)
432 mtspr chud_970_sdar,r5
433 blr
434
435 .align 5
436 .globl EXT(chudxnu_mtimc_64)
437 EXT(chudxnu_mtimc_64):
438 ld r5,0(r4)
439 mtspr chud_970_imc,r5
440 blr
441
442 .align 5
443 .globl EXT(chudxnu_mtrmor_64)
444 EXT(chudxnu_mtrmor_64):
445 ld r5,0(r4)
446 mtspr chud_970_rmor,r5
447 blr
448
449 .align 5
450 .globl EXT(chudxnu_mthrmor_64)
451 EXT(chudxnu_mthrmor_64):
452 ld r5,0(r4)
453 mtspr chud_970_hrmor,r5
454 blr
455
456 .align 5
457 .globl EXT(chudxnu_mthior_64)
458 EXT(chudxnu_mthior_64):
459 ld r5,0(r4)
460 mtspr chud_970_hior,r5
461 blr
462
463 .align 5
464 .globl EXT(chudxnu_mtlpidr_64)
465 EXT(chudxnu_mtlpidr_64):
466 ld r5,0(r4)
467 mtspr chud_970_lpidr,r5
468 blr
469
470 .align 5
471 .globl EXT(chudxnu_mtlpcr_64)
472 EXT(chudxnu_mtlpcr_64):
473 ld r5,0(r4)
474 mtspr chud_970_lpcr,r5
475 blr
476
477 .align 5
478 .globl EXT(chudxnu_mtdabrx_64)
479 EXT(chudxnu_mtdabrx_64):
480 ld r5,0(r4)
481 mtspr chud_970_lpcr,r5
482 blr
483
484 .align 5
485 .globl EXT(chudxnu_mthsprg0_64)
486 EXT(chudxnu_mthsprg0_64):
487 ld r5,0(r4)
488 mtspr chud_970_hsprg0,r5
489 blr
490
491 .align 5
492 .globl EXT(chudxnu_mthsprg1_64)
493 EXT(chudxnu_mthsprg1_64):
494 ld r5,0(r4)
495 mtspr chud_970_hsprg1,r5
496 blr
497
498 .align 5
499 .globl EXT(chudxnu_mthsrr0_64)
500 EXT(chudxnu_mthsrr0_64):
501 ld r5,0(r4)
502 mtspr chud_970_hsrr0,r5
503 blr
504
505 .align 5
506 .globl EXT(chudxnu_mthsrr1_64)
507 EXT(chudxnu_mthsrr1_64):
508 ld r5,0(r4)
509 mtspr chud_970_hsrr1,r5
510 blr
511
512 .align 5
513 .globl EXT(chudxnu_mthdec_64)
514 EXT(chudxnu_mthdec_64):
515 ld r5,0(r4)
516 mtspr chud_970_hdec,r5
517 blr
518
519 .align 5
520 .globl EXT(chudxnu_mttrig0_64)
521 EXT(chudxnu_mttrig0_64):
522 ld r5,0(r4)
523 mtspr chud_970_trig0,r5
524 blr
525
526 .align 5
527 .globl EXT(chudxnu_mttrig1_64)
528 EXT(chudxnu_mttrig1_64):
529 ld r5,0(r4)
530 mtspr chud_970_trig1,r5
531 blr
532
533 .align 5
534 .globl EXT(chudxnu_mttrig2_64)
535 EXT(chudxnu_mttrig2_64):
536 ld r5,0(r4)
537 mtspr chud_970_trig2,r5
538 blr
539
540 .align 5
541 .globl EXT(chudxnu_mtaccr_64)
542 EXT(chudxnu_mtaccr_64):
543 ld r5,0(r4)
544 mtspr chud_ppc64_accr,r5
545 blr
546
547 .align 5
548 .globl EXT(chudxnu_mtscomc_64)
549 EXT(chudxnu_mtscomc_64):
550 ld r5,0(r4)
551 mtspr chud_970_scomc,r5
552 blr
553
554 .align 5
555 .globl EXT(chudxnu_mtscomd_64)
556 EXT(chudxnu_mtscomd_64):
557 ld r5,0(r4)
558 mtspr chud_970_scomd,r5
559
560 .align 5
561 .globl EXT(chudxnu_mfmsr_64)
562 EXT(chudxnu_mfmsr_64):
563 mfmsr r5
564 std r5,0(r3)
565 blr
566
567 .align 5
568 .globl EXT(chudxnu_mtmsr_64)
569 EXT(chudxnu_mtmsr_64):
570 ld r5,0(r3)
571 mtmsrd r5
572 blr
573