pexpert/i386/pe_serial.c

   1 /*
   2  * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
   7  * as defined in and that are subject to the Apple Public Source License
   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License. Please obtain a copy of the License at
  10  * http://www.opensource.apple.com/apsl/ and read it before using this
  11  * file.
  12  *
  13  * The Original Code and all software distributed under the License are
  14  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  15  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  16  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  18  * Please see the License for the specific language governing rights and
  19  * limitations under the License.
  20  *
  21  * @APPLE_LICENSE_HEADER_END@
  22  */
  23
  24 /*
  25  * file: pe_serial.c
  26  *       Polled-mode 16x50 UART driver.
  27  */
  28
  29 #include <pexpert/protos.h>
  30 #include <pexpert/pexpert.h>
  31
  32 void    serial_putc(char);
  33 int     serial_getc(void);
  34 int     serial_init(void);
  35
  36 /* standard port addresses */
  37 enum {
  38     COM1_PORT_ADDR = 0x3f8,
  39     COM2_PORT_ADDR = 0x2f8
  40 };
  41
  42 /* UART register offsets */
  43 enum {
  44     UART_RBR = 0,  /* receive buffer Register   (R) */
  45     UART_THR = 0,  /* transmit holding register (W) */
  46     UART_DLL = 0,  /* DLAB = 1, divisor latch (LSB) */
  47     UART_IER = 1,  /* interrupt enable register     */
  48     UART_DLM = 1,  /* DLAB = 1, divisor latch (MSB) */
  49     UART_IIR = 2,  /* interrupt ident register (R)  */
  50     UART_FCR = 2,  /* fifo control register (W)     */
  51     UART_LCR = 3,  /* line control register         */
  52     UART_MCR = 4,  /* modem control register        */
  53     UART_LSR = 5,  /* line status register          */
  54     UART_MSR = 6   /* modem status register         */
  55 };
  56
  57 enum {
  58     UART_LCR_8BITS = 0x03,
  59     UART_LCR_DLAB  = 0x80
  60 };
  61
  62 enum {
  63     UART_MCR_DTR   = 0x01,
  64     UART_MCR_RTS   = 0x02,
  65     UART_MCR_OUT1  = 0x04,
  66     UART_MCR_OUT2  = 0x08,
  67     UART_MCR_LOOP  = 0x10
  68 };
  69
  70 enum {
  71     UART_LSR_THRE  = 0x20
  72 };
  73
  74 #define UART_BAUD_RATE  115200
  75 #define UART_PORT_ADDR  COM1_PORT_ADDR
  76
  77 #define WRITE(r, v)  outb(UART_PORT_ADDR + UART_##r, v)
  78 #define READ(r)      inb(UART_PORT_ADDR + UART_##r)
  79 #define DELAY(x)     { volatile int _d_; for (_d_ = 0; _d_ < (10000*x); _d_++) ; }
  80
  81 static int uart_initted = 0;   /* 1 if init'ed */
  82
  83 static int
  84 uart_probe( void )
  85 {
  86     /* Verify that the Divisor Register is accessible */
  87
  88     WRITE( LCR, UART_LCR_DLAB );
  89     WRITE( DLL, 0x5a );
  90     if (READ(DLL) != 0x5a) return 0;
  91     WRITE( DLL, 0xa5 );
  92     if (READ(DLL) != 0xa5) return 0;
  93     WRITE( LCR, 0x00 );
  94     return 1;
  95 }
  96
  97 static void
  98 uart_set_baud_rate( unsigned long baud_rate )
  99 {
 100     #define UART_CLOCK  1843200   /* 1.8432 MHz clock */
 101
 102     const unsigned char lcr = READ( LCR );
 103     unsigned long       div;
 104
 105     if (baud_rate == 0) baud_rate = 9600;
 106     div = UART_CLOCK / 16 / baud_rate;
 107     WRITE( LCR, lcr | UART_LCR_DLAB );
 108     WRITE( DLM, (unsigned char)(div >> 8) );
 109     WRITE( DLL, (unsigned char) div );
 110     WRITE( LCR, lcr & ~UART_LCR_DLAB);
 111 }
 112
 113 static void
 114 uart_putc( char c )
 115 {
 116     if (!uart_initted) return;
 117
 118     /* Wait for THR empty */
 119     while ( !(READ(LSR) & UART_LSR_THRE) ) DELAY(1);
 120
 121     WRITE( THR, c );
 122 }
 123
 124 int serial_init( void )
 125 {
 126     if ( /*uart_initted ||*/ uart_probe() == 0 ) return 0;
 127
 128     /* Disable hardware interrupts */
 129
 130     WRITE( MCR, 0 );
 131     WRITE( IER, 0 );
 132
 133     /* Disable FIFO's for 16550 devices */
 134
 135     WRITE( FCR, 0 );
 136
 137     /* Set for 8-bit, no parity, DLAB bit cleared */
 138
 139     WRITE( LCR, UART_LCR_8BITS );
 140
 141     /* Set baud rate */
 142
 143     uart_set_baud_rate( UART_BAUD_RATE );
 144
 145     /* Assert DTR# and RTS# lines (OUT2?) */
 146
 147     WRITE( MCR, UART_MCR_DTR | UART_MCR_RTS );
 148
 149     /* Clear any garbage in the input buffer */
 150
 151     READ( RBR );
 152
 153     uart_initted = 1;
 154
 155     return 1;
 156 }
 157
 158 void serial_putc( char c )
 159 {
 160     uart_putc(c);
 161     if (c == '\n') uart_putc('\r');
 162 }
 163
 164 int serial_getc( void )
 165 {
 166     return 0;  /* not supported */
 167 }