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1 /*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
11 *
12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
18 * under the License.
19 *
20 * @APPLE_LICENSE_HEADER_END@
21 */
22 /*
23 AltiAssist.s
24
25 Do the VMX assists
26
27 Lovingly crafted by Bill Angell using traditional methods and only natural or recycled materials.
28 No animal products are used other than rendered otter bile and deep fried pork lard.
29
30 */
31
32 #include <cpus.h>
33 #include <ppc/asm.h>
34 #include <ppc/proc_reg.h>
35 #include <ppc/exception.h>
36 #include <mach/machine/vm_param.h>
37 #include <assym.s>
38
39 #define kernAccess 31
40
41 ;
42 ;
43 ; General stuff what happens here:
44 ; 1) All general context saved, interrupts off, translation off
45 ; 2) Vector and floating point disabled, but there may be live context.
46 ; This code is responsible for saving and restoring what is used. This
47 ; includes exception states, java mode, etc.
48 ; 3) No attempt is made to resolve page faults. PTE misses are handled
49 ; automatically, but actual faults (ala copyin/copyout) are not. If
50 ; a fault does occur, the exception that caused entry to the emulation
51 ; routine is remapped to either an instruction or data miss (depending
52 ; upon the stage detected) and redriven through the exception handler.
53 ; The only time that an instruction fault can happen is when a different
54 ; processor removes a mapping between our original fault and when we
55 ; fetch the assisted instruction. For an assisted instruction, data
56 ; faults should not occur (except in the MP case). For a purely
57 ; emulated instruction, faults can occur.
58 ;
59 ; Emulation algorithms cloned from MacOS 9 code.
60 ;
61 ; Assumes that R2 = per_proc_area
62 ;
63 ;
64
65
66 .align 5
67 .globl EXT(AltivecAssist)
68
69 LEXT(AltivecAssist)
70
71 mfmsr r20 ; Get the current MSR
72 li r10,emvr0 ; Point to the vector savearea
73 oris r20,r20,hi16(MASK(MSR_VEC)) ; Turn on vector
74 mtmsr r20 ; Turn on vector
75 isync
76
77 li r11,emvr1 ; Another savearea
78 stvxl v0,r10,r2 ; Save V0
79 stvxl v1,r11,r2 ; Save V1
80 vspltisw v0,1 ; Set a 1 in V0
81 vspltisw v1,8 ; Get half of the shift
82 vslw v0,v0,v1 ; Shift half way
83 vslw v0,v0,v1 ; Shift the rest of the way (we now have 0x00010000)
84 mfvscr v1 ; Get the VSCR
85 vor v1,v1,v0 ; Turn off Java mode
86 lvxl v0,r10,r2 ; Restore V0
87 mtvscr v1 ; Set Java mode off
88 lvxl v1,r11,r2 ; Restore V1
89
90 li r11,T_IN_VAIN ; We are all done
91 b EXT(EmulExit) ; We are done, no tracing on...
92
93
94
95