osfmk/ppc/AltiAssist.s

   1 /*
   2  * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * Copyright (c) 1999-2003 Apple Computer, Inc.  All Rights Reserved.
   7  *
   8  * This file contains Original Code and/or Modifications of Original Code
   9  * as defined in and that are subject to the Apple Public Source License
  10  * Version 2.0 (the 'License'). You may not use this file except in
  11  * compliance with the License. Please obtain a copy of the License at
  12  * http://www.opensource.apple.com/apsl/ and read it before using this
  13  * file.
  14  *
  15  * The Original Code and all software distributed under the License are
  16  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  17  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  18  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  20  * Please see the License for the specific language governing rights and
  21  * limitations under the License.
  22  *
  23  * @APPLE_LICENSE_HEADER_END@
  24  */
  25 /*
  26         AltiAssist.s
  27
  28         Do the VMX assists
  29
  30         Lovingly crafted by Bill Angell using traditional methods and only natural or recycled materials.
  31         No animal products are used other than rendered otter bile and deep fried pork lard.
  32
  33 */
  34
  35 #include <cpus.h>
  36 #include <ppc/asm.h>
  37 #include <ppc/proc_reg.h>
  38 #include <ppc/exception.h>
  39 #include <mach/machine/vm_param.h>
  40 #include <assym.s>
  41
  42 #define kernAccess 31
  43
  44 ;
  45 ;
  46 ;                       General stuff what happens here:
  47 ;                               1)      All general context saved, interrupts off, translation off
  48 ;                               2)      Vector and floating point disabled, but there may be live context.
  49 ;                                       This code is responsible for saving and restoring what is used. This
  50 ;                                       includes exception states, java mode, etc.
  51 ;                               3)      No attempt is made to resolve page faults.  PTE misses are handled
  52 ;                                       automatically, but actual faults (ala copyin/copyout) are not. If
  53 ;                                       a fault does occur, the exception that caused entry to the emulation
  54 ;                                       routine is remapped to either an instruction or data miss (depending
  55 ;                                       upon the stage detected) and redriven through the exception handler.
  56 ;                                       The only time that an instruction fault can happen is when a different
  57 ;                                       processor removes a mapping between our original fault and when we
  58 ;                                       fetch the assisted instruction. For an assisted instruction, data
  59 ;                                       faults should not occur (except in the MP case).  For a purely
  60 ;                                       emulated instruction, faults can occur.
  61 ;
  62 ;                       Emulation algorithms cloned from MacOS 9 code.
  63 ;
  64 ;                       Assumes that R2 = per_proc_area
  65 ;
  66 ;
  67
  68
  69                         .align  5
  70                         .globl  EXT(AltivecAssist)
  71
  72 LEXT(AltivecAssist)
  73
  74                         mfmsr           r20                                                     ; Get the current MSR
  75                         li                      r10,emvr0                                       ; Point to the vector savearea
  76                         oris            r20,r20,hi16(MASK(MSR_VEC))     ; Turn on vector
  77                         mtmsr           r20                                                     ; Turn on vector
  78                         isync
  79
  80                         li                      r11,emvr1                                       ; Another savearea
  81                         stvxl           v0,r10,r2                                       ; Save V0
  82                         stvxl           v1,r11,r2                                       ; Save V1
  83                         vspltisw        v0,1                                            ; Set a 1 in V0
  84                         vspltisw        v1,8                                            ; Get half of the shift
  85                         vslw            v0,v0,v1                                        ; Shift half way
  86                         vslw            v0,v0,v1                                        ; Shift the rest of the way (we now have 0x00010000)
  87                         mfvscr          v1                                                      ; Get the VSCR
  88                         vor                     v1,v1,v0                                        ; Turn off Java mode
  89                         lvxl            v0,r10,r2                                       ; Restore V0
  90                         mtvscr          v1                                                      ; Set Java mode off
  91                         lvxl            v1,r11,r2                                       ; Restore V1
  92
  93                         li                      r11,T_IN_VAIN                           ; We are all done
  94                         b                       EXT(EmulExit)                           ; We are done, no tracing on...
  95
  96
  97
  98