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1 /*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_OSREFERENCE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the
10 * License may not be used to create, or enable the creation or
11 * redistribution of, unlawful or unlicensed copies of an Apple operating
12 * system, or to circumvent, violate, or enable the circumvention or
13 * violation of, any terms of an Apple operating system software license
14 * agreement.
15 *
16 * Please obtain a copy of the License at
17 * http://www.opensource.apple.com/apsl/ and read it before using this
18 * file.
19 *
20 * The Original Code and all software distributed under the License are
21 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
22 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
23 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
25 * Please see the License for the specific language governing rights and
26 * limitations under the License.
27 *
28 * @APPLE_LICENSE_OSREFERENCE_HEADER_END@
29 */
30 /*
31 * @OSF_COPYRIGHT@
32 */
33
34 /*
35 * Mach Operating System
36 * Copyright (c) 1991,1990 Carnegie Mellon University
37 * All Rights Reserved.
38 *
39 * Permission to use, copy, modify and distribute this software and its
40 * documentation is hereby granted, provided that both the copyright
41 * notice and this permission notice appear in all copies of the
42 * software, derivative works or modified versions, and any portions
43 * thereof, and that both notices appear in supporting documentation.
44 *
45 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
46 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
47 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
48 *
49 * Carnegie Mellon requests users of this software to return to
50 *
51 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
52 * School of Computer Science
53 * Carnegie Mellon University
54 * Pittsburgh PA 15213-3890
55 *
56 * any improvements or extensions that they make and grant Carnegie Mellon
57 * the rights to redistribute these changes.
58 */
59
60 #include <i386/asm.h>
61 #include <i386/mp_slave_boot.h>
62 #include <i386/postcode.h>
63
64 #define CR0_PE_ON 0x1
65 #define CR0_PE_OFF 0xfffffffe
66
67 .file "slave_boot.s"
68
69 .text
70 .align 12 // Page align for single bcopy_phys()
71
72 #define operand_size_prefix .byte 0x66
73 #define address_size_prefix .byte 0x67
74
75 #define LJMP(segment,address) \
76 operand_size_prefix ;\
77 .byte 0xea ;\
78 .long address-EXT(slave_boot_base) ;\
79 .word segment
80
81 #define LGDT(address) \
82 address_size_prefix ;\
83 operand_size_prefix ;\
84 .word 0x010f ;\
85 .byte 0x15 ;\
86 .long address-EXT(slave_boot_base)
87
88 Entry(slave_boot_base)
89 /* code is loaded at 0x0:0x1000 */
90 /* ljmp to the next instruction to set up %cs */
91 LJMP(MP_BOOTSEG, EXT(slave_rstart))
92
93 Entry(slave_rstart)
94 /* set up %ds */
95 mov %cs, %ax
96 mov %ax, %ds
97
98 POSTCODE(SLAVE_RSTART_ENTRY);
99
100 /* set up %ss and %esp */
101 mov %cs, %ax
102 mov %ax, %ss
103 mov $(MP_BOOTSTACK), %esp
104
105 /*set up %es */
106 mov %ax, %es
107
108 /* change to protected mode */
109 operand_size_prefix
110 call EXT(slave_real_to_prot)
111
112 push MP_MACH_START
113 call EXT(slave_startprog)
114
115 /*
116 slave_real_to_prot()
117 transfer from real mode to protected mode.
118 */
119
120 Entry(slave_real_to_prot)
121 /* guarantee that interrupt is disabled when in prot mode */
122 cli
123
124 POSTCODE(SLAVE_REAL_TO_PROT_ENTRY);
125
126 /* load the gdtr */
127 LGDT(EXT(gdtr))
128
129 /* load the gdtr */
130 /* set the PE bit of CR0 */
131 mov %cr0, %eax
132 or $(CR0_PE_ON), %eax
133 mov %eax, %cr0
134
135 /* make intrasegment jump to flush the processor pipeline and */
136 /* reload CS register */
137 LJMP(0x08, xprot)
138 xprot:
139
140 /* we are in USE32 mode now */
141 /* set up the protective mode segment registers : DS, SS, ES */
142 mov $0x10, %eax
143 movw %ax, %ds
144 movw %ax, %ss
145 movw %ax, %es
146
147 POSTCODE(SLAVE_REAL_TO_PROT_EXIT);
148
149 ret
150
151 /*
152 slave_startprog(phyaddr)
153 start the program on protected mode where phyaddr is the entry point
154 */
155
156 Entry(slave_startprog)
157 push %ebp
158 movl %esp, %ebp
159
160 POSTCODE(SLAVE_STARTPROG_ENTRY);
161
162 movl 0x8(%ebp), %ecx /* entry offset */
163 movl $0x28, %ebx /* segment */
164 push %ebx
165 push %ecx
166
167 /* set up %ds and %es */
168 movl $0x20, %ebx
169 movw %bx, %ds
170 movw %bx, %es
171
172 POSTCODE(SLAVE_STARTPROG_EXIT);
173
174 lret
175
176
177 . = MP_BOOTGDT-MP_BOOT /* GDT location */
178 Entry(Gdt)
179
180 /* Segment Descriptor
181 *
182 * 31 24 19 16 7 0
183 * ------------------------------------------------------------
184 * | | |B| |A| | | |1|0|E|W|A| |
185 * | BASE 31..24 |G|/|0|V| LIMIT |P|DPL| TYPE | BASE 23:16 |
186 * | | |D| |L| 19..16| | |1|1|C|R|A| |
187 * ------------------------------------------------------------
188 * | | |
189 * | BASE 15..0 | LIMIT 15..0 |
190 * | | |
191 * ------------------------------------------------------------
192 */
193 .word 0,0 /* 0x0 : null */
194 .byte 0,0,0,0
195
196 .word 0xffff,MP_BOOT /* 0x8 : boot code */
197 .byte 0,0x9e,0xcf,0
198
199 .word 0xffff,MP_BOOT /* 0x10 : boot data */
200 .byte 0,0x92,0xcf,0
201
202 .word 0xffff,MP_BOOT /* 0x18 : boot code, 16 bits */
203 .byte 0,0x9e,0x0,0
204
205 .word 0xffff,0 /* 0x20 : init data */
206 .byte 0,0x9f,0xcf,0
207
208 .word 0xffff,0 /* 0x28 : init code */
209 .byte 0,0x9f,0xcf,0
210
211 Entry(gdtr)
212 .short 48 /* limit (8*6 segs) */
213 .short MP_BOOTGDT /* base low */
214 .short 0 /* base high */
215
216 Entry(slave_boot_end)
217
218
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