2 * Copyright (c) 2000-2012 Apple Inc. All rights reserved.
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
34 #include <mach_ldebug.h>
37 #include <mach/mach_types.h>
38 #include <mach/kern_return.h>
40 #include <kern/kern_types.h>
41 #include <kern/startup.h>
42 #include <kern/timer_queue.h>
43 #include <kern/processor.h>
44 #include <kern/cpu_number.h>
45 #include <kern/cpu_data.h>
46 #include <kern/assert.h>
47 #include <kern/machine.h>
49 #include <kern/misc_protos.h>
50 #include <kern/timer_call.h>
51 #include <kern/kalloc.h>
52 #include <kern/queue.h>
54 #include <vm/vm_map.h>
55 #include <vm/vm_kern.h>
57 #include <profiling/profile-mk.h>
59 #include <i386/proc_reg.h>
60 #include <i386/cpu_threads.h>
61 #include <i386/mp_desc.h>
62 #include <i386/misc_protos.h>
63 #include <i386/trap.h>
64 #include <i386/postcode.h>
65 #include <i386/machine_routines.h>
67 #include <i386/mp_events.h>
68 #include <i386/lapic.h>
69 #include <i386/cpuid.h>
71 #include <i386/machine_cpu.h>
72 #include <i386/pmCPU.h>
74 #include <i386/machine_check.h>
76 #include <i386/acpi.h>
78 #include <chud/chud_xnu.h>
79 #include <chud/chud_xnu_private.h>
81 #include <sys/kdebug.h>
83 #include <console/serial_protos.h>
86 #define PAUSE delay(1000000)
87 #define DBG(x...) kprintf(x)
93 /* Debugging/test trace events: */
94 #define TRACE_MP_TLB_FLUSH MACHDBG_CODE(DBG_MACH_MP, 0)
95 #define TRACE_MP_CPUS_CALL MACHDBG_CODE(DBG_MACH_MP, 1)
96 #define TRACE_MP_CPUS_CALL_LOCAL MACHDBG_CODE(DBG_MACH_MP, 2)
97 #define TRACE_MP_CPUS_CALL_ACTION MACHDBG_CODE(DBG_MACH_MP, 3)
98 #define TRACE_MP_CPUS_CALL_NOBUF MACHDBG_CODE(DBG_MACH_MP, 4)
99 #define TRACE_MP_CPU_FAST_START MACHDBG_CODE(DBG_MACH_MP, 5)
100 #define TRACE_MP_CPU_START MACHDBG_CODE(DBG_MACH_MP, 6)
101 #define TRACE_MP_CPU_DEACTIVATE MACHDBG_CODE(DBG_MACH_MP, 7)
103 #define ABS(v) (((v) > 0)?(v):-(v))
105 void slave_boot_init(void);
106 void i386_cpu_IPI(int cpu
);
109 static void mp_kdp_wait(boolean_t flush
, boolean_t isNMI
);
110 #endif /* MACH_KDP */
111 static void mp_rendezvous_action(void);
112 static void mp_broadcast_action(void);
115 static boolean_t
cpu_signal_pending(int cpu
, mp_event_t event
);
116 #endif /* MACH_KDP */
117 static int NMIInterruptHandler(x86_saved_state_t
*regs
);
119 boolean_t smp_initialized
= FALSE
;
120 uint32_t TSC_sync_margin
= 0xFFF;
121 volatile boolean_t force_immediate_debugger_NMI
= FALSE
;
122 volatile boolean_t pmap_tlb_flush_timeout
= FALSE
;
123 decl_simple_lock_data(,mp_kdp_lock
);
125 decl_lck_mtx_data(static, mp_cpu_boot_lock
);
126 lck_mtx_ext_t mp_cpu_boot_lock_ext
;
128 /* Variables needed for MP rendezvous. */
129 decl_simple_lock_data(,mp_rv_lock
);
130 static void (*mp_rv_setup_func
)(void *arg
);
131 static void (*mp_rv_action_func
)(void *arg
);
132 static void (*mp_rv_teardown_func
)(void *arg
);
133 static void *mp_rv_func_arg
;
134 static volatile int mp_rv_ncpus
;
135 /* Cache-aligned barriers: */
136 static volatile long mp_rv_entry
__attribute__((aligned(64)));
137 static volatile long mp_rv_exit
__attribute__((aligned(64)));
138 static volatile long mp_rv_complete
__attribute__((aligned(64)));
140 volatile uint64_t debugger_entry_time
;
141 volatile uint64_t debugger_exit_time
;
144 extern int kdp_snapshot
;
145 static struct _kdp_xcpu_call_func
{
146 kdp_x86_xcpu_func_t func
;
149 volatile uint16_t cpu
;
150 } kdp_xcpu_call_func
= {
156 /* Variables needed for MP broadcast. */
157 static void (*mp_bc_action_func
)(void *arg
);
158 static void *mp_bc_func_arg
;
159 static int mp_bc_ncpus
;
160 static volatile long mp_bc_count
;
161 decl_lck_mtx_data(static, mp_bc_lock
);
162 lck_mtx_ext_t mp_bc_lock_ext
;
163 static volatile int debugger_cpu
= -1;
164 volatile long NMIPI_acks
= 0;
165 volatile long NMI_count
= 0;
167 extern void NMI_cpus(void);
169 static void mp_cpus_call_init(void);
170 static void mp_cpus_call_cpu_init(void);
171 static void mp_cpus_call_action(void);
172 static void mp_call_PM(void);
174 char mp_slave_stack
[PAGE_SIZE
] __attribute__((aligned(PAGE_SIZE
))); // Temp stack for slave init
176 /* PAL-related routines */
177 boolean_t
i386_smp_init(int nmi_vector
, i386_intr_func_t nmi_handler
,
178 int ipi_vector
, i386_intr_func_t ipi_handler
);
179 void i386_start_cpu(int lapic_id
, int cpu_num
);
180 void i386_send_NMI(int cpu
);
184 * Initialize dummy structs for profiling. These aren't used but
185 * allows hertz_tick() to be built with GPROF defined.
187 struct profile_vars _profile_vars
;
188 struct profile_vars
*_profile_vars_cpus
[MAX_CPUS
] = { &_profile_vars
};
189 #define GPROF_INIT() \
193 /* Hack to initialize pointers to unused profiling structs */ \
194 for (i = 1; i < MAX_CPUS; i++) \
195 _profile_vars_cpus[i] = &_profile_vars; \
201 static lck_grp_t smp_lck_grp
;
202 static lck_grp_attr_t smp_lck_grp_attr
;
204 #define NUM_CPU_WARM_CALLS 20
205 struct timer_call cpu_warm_call_arr
[NUM_CPU_WARM_CALLS
];
206 queue_head_t cpu_warm_call_list
;
207 decl_simple_lock_data(static, cpu_warm_lock
);
209 typedef struct cpu_warm_data
{
210 timer_call_t cwd_call
;
211 uint64_t cwd_deadline
;
215 static void cpu_prewarm_init(void);
216 static void cpu_warm_timer_call_func(call_entry_param_t p0
, call_entry_param_t p1
);
217 static void _cpu_warm_setup(void *arg
);
218 static timer_call_t
grab_warm_timer_call(void);
219 static void free_warm_timer_call(timer_call_t call
);
224 simple_lock_init(&mp_kdp_lock
, 0);
225 simple_lock_init(&mp_rv_lock
, 0);
226 lck_grp_attr_setdefault(&smp_lck_grp_attr
);
227 lck_grp_init(&smp_lck_grp
, "i386_smp", &smp_lck_grp_attr
);
228 lck_mtx_init_ext(&mp_cpu_boot_lock
, &mp_cpu_boot_lock_ext
, &smp_lck_grp
, LCK_ATTR_NULL
);
229 lck_mtx_init_ext(&mp_bc_lock
, &mp_bc_lock_ext
, &smp_lck_grp
, LCK_ATTR_NULL
);
232 if(!i386_smp_init(LAPIC_NMI_INTERRUPT
, NMIInterruptHandler
,
233 LAPIC_VECTOR(INTERPROCESSOR
), cpu_signal_handler
))
239 DBGLOG_CPU_INIT(master_cpu
);
242 mp_cpus_call_cpu_init();
244 if (PE_parse_boot_argn("TSC_sync_margin",
245 &TSC_sync_margin
, sizeof(TSC_sync_margin
))) {
246 kprintf("TSC sync Margin 0x%x\n", TSC_sync_margin
);
247 } else if (cpuid_vmm_present()) {
248 kprintf("TSC sync margin disabled\n");
251 smp_initialized
= TRUE
;
262 } processor_start_info_t
;
263 static processor_start_info_t start_info
__attribute__((aligned(64)));
266 * Cache-alignment is to avoid cross-cpu false-sharing interference.
268 static volatile long tsc_entry_barrier
__attribute__((aligned(64)));
269 static volatile long tsc_exit_barrier
__attribute__((aligned(64)));
270 static volatile uint64_t tsc_target
__attribute__((aligned(64)));
273 * Poll a CPU to see when it has marked itself as running.
276 mp_wait_for_cpu_up(int slot_num
, unsigned int iters
, unsigned int usecdelay
)
278 while (iters
-- > 0) {
279 if (cpu_datap(slot_num
)->cpu_running
)
286 * Quickly bring a CPU back online which has been halted.
289 intel_startCPU_fast(int slot_num
)
294 * Try to perform a fast restart
296 rc
= pmCPUExitHalt(slot_num
);
297 if (rc
!= KERN_SUCCESS
)
299 * The CPU was not eligible for a fast restart.
303 KERNEL_DEBUG_CONSTANT(
304 TRACE_MP_CPU_FAST_START
| DBG_FUNC_START
,
305 slot_num
, 0, 0, 0, 0);
308 * Wait until the CPU is back online.
310 mp_disable_preemption();
313 * We use short pauses (1us) for low latency. 30,000 iterations is
314 * longer than a full restart would require so it should be more
318 mp_wait_for_cpu_up(slot_num
, 30000, 1);
319 mp_enable_preemption();
321 KERNEL_DEBUG_CONSTANT(
322 TRACE_MP_CPU_FAST_START
| DBG_FUNC_END
,
323 slot_num
, cpu_datap(slot_num
)->cpu_running
, 0, 0, 0);
326 * Check to make sure that the CPU is really running. If not,
327 * go through the slow path.
329 if (cpu_datap(slot_num
)->cpu_running
)
330 return(KERN_SUCCESS
);
332 return(KERN_FAILURE
);
338 /* Here on the started cpu with cpu_running set TRUE */
340 if (TSC_sync_margin
&&
341 start_info
.target_cpu
== cpu_number()) {
343 * I've just started-up, synchronize again with the starter cpu
344 * and then snap my TSC.
347 atomic_decl(&tsc_entry_barrier
, 1);
348 while (tsc_entry_barrier
!= 0)
349 ; /* spin for starter and target at barrier */
350 tsc_target
= rdtsc64();
351 atomic_decl(&tsc_exit_barrier
, 1);
359 processor_start_info_t
*psip
= (processor_start_info_t
*) arg
;
361 /* Ignore this if the current processor is not the starter */
362 if (cpu_number() != psip
->starter_cpu
)
365 DBG("start_cpu(%p) about to start cpu %d, lapic %d\n",
366 arg
, psip
->target_cpu
, psip
->target_lapic
);
368 KERNEL_DEBUG_CONSTANT(
369 TRACE_MP_CPU_START
| DBG_FUNC_START
,
371 psip
->target_lapic
, 0, 0, 0);
373 i386_start_cpu(psip
->target_lapic
, psip
->target_cpu
);
375 #ifdef POSTCODE_DELAY
376 /* Wait much longer if postcodes are displayed for a delay period. */
379 DBG("start_cpu(%p) about to wait for cpu %d\n",
380 arg
, psip
->target_cpu
);
382 mp_wait_for_cpu_up(psip
->target_cpu
, i
*100, 100);
384 KERNEL_DEBUG_CONSTANT(
385 TRACE_MP_CPU_START
| DBG_FUNC_END
,
387 cpu_datap(psip
->target_cpu
)->cpu_running
, 0, 0, 0);
389 if (TSC_sync_margin
&&
390 cpu_datap(psip
->target_cpu
)->cpu_running
) {
392 * Compare the TSC from the started processor with ours.
393 * Report and log/panic if it diverges by more than
394 * TSC_sync_margin (TSC_SYNC_MARGIN) ticks. This margin
395 * can be overriden by boot-arg (with 0 meaning no checking).
397 uint64_t tsc_starter
;
399 atomic_decl(&tsc_entry_barrier
, 1);
400 while (tsc_entry_barrier
!= 0)
401 ; /* spin for both processors at barrier */
402 tsc_starter
= rdtsc64();
403 atomic_decl(&tsc_exit_barrier
, 1);
404 while (tsc_exit_barrier
!= 0)
405 ; /* spin for target to store its TSC */
406 tsc_delta
= tsc_target
- tsc_starter
;
407 kprintf("TSC sync for cpu %d: 0x%016llx delta 0x%llx (%lld)\n",
408 psip
->target_cpu
, tsc_target
, tsc_delta
, tsc_delta
);
409 if (ABS(tsc_delta
) > (int64_t) TSC_sync_margin
) {
415 "Unsynchronized TSC for cpu %d: "
416 "0x%016llx, delta 0x%llx\n",
417 psip
->target_cpu
, tsc_target
, tsc_delta
);
426 int lapic
= cpu_to_lapic
[slot_num
];
431 DBGLOG_CPU_INIT(slot_num
);
433 DBG("intel_startCPU(%d) lapic_id=%d\n", slot_num
, lapic
);
434 DBG("IdlePTD(%p): 0x%x\n", &IdlePTD
, (int) (uintptr_t)IdlePTD
);
437 * Initialize (or re-initialize) the descriptor tables for this cpu.
438 * Propagate processor mode to slave.
440 cpu_desc_init64(cpu_datap(slot_num
));
442 /* Serialize use of the slave boot stack, etc. */
443 lck_mtx_lock(&mp_cpu_boot_lock
);
445 istate
= ml_set_interrupts_enabled(FALSE
);
446 if (slot_num
== get_cpu_number()) {
447 ml_set_interrupts_enabled(istate
);
448 lck_mtx_unlock(&mp_cpu_boot_lock
);
452 start_info
.starter_cpu
= cpu_number();
453 start_info
.target_cpu
= slot_num
;
454 start_info
.target_lapic
= lapic
;
455 tsc_entry_barrier
= 2;
456 tsc_exit_barrier
= 2;
459 * Perform the processor startup sequence with all running
460 * processors rendezvous'ed. This is required during periods when
461 * the cache-disable bit is set for MTRR/PAT initialization.
463 mp_rendezvous_no_intrs(start_cpu
, (void *) &start_info
);
465 start_info
.target_cpu
= 0;
467 ml_set_interrupts_enabled(istate
);
468 lck_mtx_unlock(&mp_cpu_boot_lock
);
470 if (!cpu_datap(slot_num
)->cpu_running
) {
471 kprintf("Failed to start CPU %02d\n", slot_num
);
472 printf("Failed to start CPU %02d, rebooting...\n", slot_num
);
477 kprintf("Started cpu %d (lapic id %08x)\n", slot_num
, lapic
);
483 cpu_signal_event_log_t
*cpu_signal
[MAX_CPUS
];
484 cpu_signal_event_log_t
*cpu_handle
[MAX_CPUS
];
486 MP_EVENT_NAME_DECL();
488 #endif /* MP_DEBUG */
491 cpu_signal_handler(x86_saved_state_t
*regs
)
494 #pragma unused (regs)
495 #endif /* !MACH_KDP */
497 volatile int *my_word
;
499 SCHED_STATS_IPI(current_processor());
501 my_cpu
= cpu_number();
502 my_word
= &cpu_data_ptr
[my_cpu
]->cpu_signals
;
503 /* Store the initial set of signals for diagnostics. New
504 * signals could arrive while these are being processed
505 * so it's no more than a hint.
508 cpu_data_ptr
[my_cpu
]->cpu_prior_signals
= *my_word
;
512 if (i_bit(MP_KDP
, my_word
) && regs
!= NULL
) {
513 DBGLOG(cpu_handle
,my_cpu
,MP_KDP
);
514 i_bit_clear(MP_KDP
, my_word
);
515 /* Ensure that the i386_kernel_state at the base of the
516 * current thread's stack (if any) is synchronized with the
517 * context at the moment of the interrupt, to facilitate
518 * access through the debugger.
520 sync_iss_to_iks(regs
);
521 if (pmsafe_debug
&& !kdp_snapshot
)
522 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_SAFE
);
523 mp_kdp_wait(TRUE
, FALSE
);
524 if (pmsafe_debug
&& !kdp_snapshot
)
525 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_NORMAL
);
527 #endif /* MACH_KDP */
528 if (i_bit(MP_TLB_FLUSH
, my_word
)) {
529 DBGLOG(cpu_handle
,my_cpu
,MP_TLB_FLUSH
);
530 i_bit_clear(MP_TLB_FLUSH
, my_word
);
531 pmap_update_interrupt();
532 } else if (i_bit(MP_AST
, my_word
)) {
533 DBGLOG(cpu_handle
,my_cpu
,MP_AST
);
534 i_bit_clear(MP_AST
, my_word
);
535 ast_check(cpu_to_processor(my_cpu
));
536 } else if (i_bit(MP_RENDEZVOUS
, my_word
)) {
537 DBGLOG(cpu_handle
,my_cpu
,MP_RENDEZVOUS
);
538 i_bit_clear(MP_RENDEZVOUS
, my_word
);
539 mp_rendezvous_action();
540 } else if (i_bit(MP_BROADCAST
, my_word
)) {
541 DBGLOG(cpu_handle
,my_cpu
,MP_BROADCAST
);
542 i_bit_clear(MP_BROADCAST
, my_word
);
543 mp_broadcast_action();
544 } else if (i_bit(MP_CHUD
, my_word
)) {
545 DBGLOG(cpu_handle
,my_cpu
,MP_CHUD
);
546 i_bit_clear(MP_CHUD
, my_word
);
547 chudxnu_cpu_signal_handler();
548 } else if (i_bit(MP_CALL
, my_word
)) {
549 DBGLOG(cpu_handle
,my_cpu
,MP_CALL
);
550 i_bit_clear(MP_CALL
, my_word
);
551 mp_cpus_call_action();
552 } else if (i_bit(MP_CALL_PM
, my_word
)) {
553 DBGLOG(cpu_handle
,my_cpu
,MP_CALL_PM
);
554 i_bit_clear(MP_CALL_PM
, my_word
);
563 NMIInterruptHandler(x86_saved_state_t
*regs
)
567 if (panic_active() && !panicDebugging
) {
569 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_SAFE
);
574 atomic_incl(&NMIPI_acks
, 1);
575 atomic_incl(&NMI_count
, 1);
576 sync_iss_to_iks_unconditionally(regs
);
577 __asm__
volatile("movq %%rbp, %0" : "=m" (stackptr
));
579 if (cpu_number() == debugger_cpu
)
582 if (spinlock_timed_out
) {
584 snprintf(&pstr
[0], sizeof(pstr
), "Panic(CPU %d): NMIPI for spinlock acquisition timeout, spinlock: %p, spinlock owner: %p, current_thread: %p, spinlock_owner_cpu: 0x%x\n", cpu_number(), spinlock_timed_out
, (void *) spinlock_timed_out
->interlock
.lock_data
, current_thread(), spinlock_owner_cpu
);
585 panic_i386_backtrace(stackptr
, 64, &pstr
[0], TRUE
, regs
);
586 } else if (pmap_tlb_flush_timeout
== TRUE
) {
588 snprintf(&pstr
[0], sizeof(pstr
), "Panic(CPU %d): Unresponsive processor (this CPU did not acknowledge interrupts) TLB state:0x%x\n", cpu_number(), current_cpu_datap()->cpu_tlb_invalid
);
589 panic_i386_backtrace(stackptr
, 48, &pstr
[0], TRUE
, regs
);
593 if (pmsafe_debug
&& !kdp_snapshot
)
594 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_SAFE
);
595 current_cpu_datap()->cpu_NMI_acknowledged
= TRUE
;
596 i_bit_clear(MP_KDP
, ¤t_cpu_datap()->cpu_signals
);
597 mp_kdp_wait(FALSE
, pmap_tlb_flush_timeout
|| spinlock_timed_out
|| panic_active());
598 if (pmsafe_debug
&& !kdp_snapshot
)
599 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_NORMAL
);
607 * cpu_interrupt is really just to be used by the scheduler to
608 * get a CPU's attention it may not always issue an IPI. If an
609 * IPI is always needed then use i386_cpu_IPI.
612 cpu_interrupt(int cpu
)
614 boolean_t did_IPI
= FALSE
;
617 && pmCPUExitIdle(cpu_datap(cpu
))) {
622 KERNEL_DEBUG_CONSTANT(MACHDBG_CODE(DBG_MACH_SCHED
, MACH_REMOTE_AST
), cpu
, did_IPI
, 0, 0, 0);
626 * Send a true NMI via the local APIC to the specified CPU.
629 cpu_NMI_interrupt(int cpu
)
631 if (smp_initialized
) {
640 boolean_t intrs_enabled
;
641 uint64_t tsc_timeout
;
643 intrs_enabled
= ml_set_interrupts_enabled(FALSE
);
645 for (cpu
= 0; cpu
< real_ncpus
; cpu
++) {
646 if (!cpu_datap(cpu
)->cpu_running
)
648 cpu_datap(cpu
)->cpu_NMI_acknowledged
= FALSE
;
649 cpu_NMI_interrupt(cpu
);
650 tsc_timeout
= !machine_timeout_suspended() ?
651 rdtsc64() + (1000 * 1000 * 1000 * 10ULL) :
653 while (!cpu_datap(cpu
)->cpu_NMI_acknowledged
) {
654 handle_pending_TLB_flushes();
656 if (rdtsc64() > tsc_timeout
)
657 panic("NMI_cpus() timeout cpu %d", cpu
);
659 cpu_datap(cpu
)->cpu_NMI_acknowledged
= FALSE
;
662 ml_set_interrupts_enabled(intrs_enabled
);
665 static void (* volatile mp_PM_func
)(void) = NULL
;
670 assert(!ml_get_interrupts_enabled());
672 if (mp_PM_func
!= NULL
)
677 cpu_PM_interrupt(int cpu
)
679 assert(!ml_get_interrupts_enabled());
681 if (mp_PM_func
!= NULL
) {
682 if (cpu
== cpu_number())
685 i386_signal_cpu(cpu
, MP_CALL_PM
, ASYNC
);
690 PM_interrupt_register(void (*fn
)(void))
696 i386_signal_cpu(int cpu
, mp_event_t event
, mp_sync_t mode
)
698 volatile int *signals
= &cpu_datap(cpu
)->cpu_signals
;
699 uint64_t tsc_timeout
;
702 if (!cpu_datap(cpu
)->cpu_running
)
705 if (event
== MP_TLB_FLUSH
)
706 KERNEL_DEBUG(TRACE_MP_TLB_FLUSH
| DBG_FUNC_START
, cpu
, 0, 0, 0, 0);
708 DBGLOG(cpu_signal
, cpu
, event
);
710 i_bit_set(event
, signals
);
714 tsc_timeout
= !machine_timeout_suspended() ?
715 rdtsc64() + (1000*1000*1000) :
717 while (i_bit(event
, signals
) && rdtsc64() < tsc_timeout
) {
720 if (i_bit(event
, signals
)) {
721 DBG("i386_signal_cpu(%d, 0x%x, SYNC) timed out\n",
726 if (event
== MP_TLB_FLUSH
)
727 KERNEL_DEBUG(TRACE_MP_TLB_FLUSH
| DBG_FUNC_END
, cpu
, 0, 0, 0, 0);
731 * Send event to all running cpus.
732 * Called with the topology locked.
735 i386_signal_cpus(mp_event_t event
, mp_sync_t mode
)
738 unsigned int my_cpu
= cpu_number();
740 assert(hw_lock_held((hw_lock_t
)&x86_topo_lock
));
742 for (cpu
= 0; cpu
< real_ncpus
; cpu
++) {
743 if (cpu
== my_cpu
|| !cpu_datap(cpu
)->cpu_running
)
745 i386_signal_cpu(cpu
, event
, mode
);
750 * Return the number of running cpus.
751 * Called with the topology locked.
754 i386_active_cpus(void)
757 unsigned int ncpus
= 0;
759 assert(hw_lock_held((hw_lock_t
)&x86_topo_lock
));
761 for (cpu
= 0; cpu
< real_ncpus
; cpu
++) {
762 if (cpu_datap(cpu
)->cpu_running
)
769 * Helper function called when busy-waiting: panic if too long
770 * a TSC-based time has elapsed since the start of the spin.
773 mp_spin_timeout_check(uint64_t tsc_start
, const char *msg
)
775 uint64_t tsc_timeout
;
778 if (machine_timeout_suspended())
782 * The timeout is 4 * the spinlock timeout period
783 * unless we have serial console printing (kprintf) enabled
784 * in which case we allow an even greater margin.
786 tsc_timeout
= disable_serial_output
? (uint64_t) LockTimeOutTSC
<< 2
787 : (uint64_t) LockTimeOutTSC
<< 4;
788 if (rdtsc64() > tsc_start
+ tsc_timeout
)
789 panic("%s: spin timeout", msg
);
793 * All-CPU rendezvous:
794 * - CPUs are signalled,
795 * - all execute the setup function (if specified),
796 * - rendezvous (i.e. all cpus reach a barrier),
797 * - all execute the action function (if specified),
798 * - rendezvous again,
799 * - execute the teardown function (if specified), and then
802 * Note that the supplied external functions _must_ be reentrant and aware
803 * that they are running in parallel and in an unknown lock context.
807 mp_rendezvous_action(void)
809 boolean_t intrs_enabled
;
810 uint64_t tsc_spin_start
;
813 if (mp_rv_setup_func
!= NULL
)
814 mp_rv_setup_func(mp_rv_func_arg
);
816 intrs_enabled
= ml_get_interrupts_enabled();
818 /* spin on entry rendezvous */
819 atomic_incl(&mp_rv_entry
, 1);
820 tsc_spin_start
= rdtsc64();
821 while (mp_rv_entry
< mp_rv_ncpus
) {
822 /* poll for pesky tlb flushes if interrupts disabled */
824 handle_pending_TLB_flushes();
825 mp_spin_timeout_check(tsc_spin_start
,
826 "mp_rendezvous_action() entry");
829 /* action function */
830 if (mp_rv_action_func
!= NULL
)
831 mp_rv_action_func(mp_rv_func_arg
);
833 /* spin on exit rendezvous */
834 atomic_incl(&mp_rv_exit
, 1);
835 tsc_spin_start
= rdtsc64();
836 while (mp_rv_exit
< mp_rv_ncpus
) {
838 handle_pending_TLB_flushes();
839 mp_spin_timeout_check(tsc_spin_start
,
840 "mp_rendezvous_action() exit");
843 /* teardown function */
844 if (mp_rv_teardown_func
!= NULL
)
845 mp_rv_teardown_func(mp_rv_func_arg
);
847 /* Bump completion count */
848 atomic_incl(&mp_rv_complete
, 1);
852 mp_rendezvous(void (*setup_func
)(void *),
853 void (*action_func
)(void *),
854 void (*teardown_func
)(void *),
857 uint64_t tsc_spin_start
;
859 if (!smp_initialized
) {
860 if (setup_func
!= NULL
)
862 if (action_func
!= NULL
)
864 if (teardown_func
!= NULL
)
869 /* obtain rendezvous lock */
870 simple_lock(&mp_rv_lock
);
872 /* set static function pointers */
873 mp_rv_setup_func
= setup_func
;
874 mp_rv_action_func
= action_func
;
875 mp_rv_teardown_func
= teardown_func
;
876 mp_rv_func_arg
= arg
;
883 * signal other processors, which will call mp_rendezvous_action()
884 * with interrupts disabled
886 simple_lock(&x86_topo_lock
);
887 mp_rv_ncpus
= i386_active_cpus();
888 i386_signal_cpus(MP_RENDEZVOUS
, ASYNC
);
889 simple_unlock(&x86_topo_lock
);
891 /* call executor function on this cpu */
892 mp_rendezvous_action();
895 * Spin for everyone to complete.
896 * This is necessary to ensure that all processors have proceeded
897 * from the exit barrier before we release the rendezvous structure.
899 tsc_spin_start
= rdtsc64();
900 while (mp_rv_complete
< mp_rv_ncpus
) {
901 mp_spin_timeout_check(tsc_spin_start
, "mp_rendezvous()");
905 mp_rv_setup_func
= NULL
;
906 mp_rv_action_func
= NULL
;
907 mp_rv_teardown_func
= NULL
;
908 mp_rv_func_arg
= NULL
;
911 simple_unlock(&mp_rv_lock
);
915 mp_rendezvous_break_lock(void)
917 simple_lock_init(&mp_rv_lock
, 0);
921 setup_disable_intrs(__unused
void * param_not_used
)
923 /* disable interrupts before the first barrier */
924 boolean_t intr
= ml_set_interrupts_enabled(FALSE
);
926 current_cpu_datap()->cpu_iflag
= intr
;
927 DBG("CPU%d: %s\n", get_cpu_number(), __FUNCTION__
);
931 teardown_restore_intrs(__unused
void * param_not_used
)
933 /* restore interrupt flag following MTRR changes */
934 ml_set_interrupts_enabled(current_cpu_datap()->cpu_iflag
);
935 DBG("CPU%d: %s\n", get_cpu_number(), __FUNCTION__
);
939 * A wrapper to mp_rendezvous() to call action_func() with interrupts disabled.
940 * This is exported for use by kexts.
943 mp_rendezvous_no_intrs(
944 void (*action_func
)(void *),
947 mp_rendezvous(setup_disable_intrs
,
949 teardown_restore_intrs
,
955 queue_chain_t link
; /* queue linkage */
956 void (*func
)(void *,void *); /* routine to call */
957 void *arg0
; /* routine's 1st arg */
958 void *arg1
; /* routine's 2nd arg */
959 volatile long *countp
; /* completion counter */
965 decl_simple_lock_data(, lock
);
967 #define MP_CPUS_CALL_BUFS_PER_CPU MAX_CPUS
968 static mp_call_queue_t mp_cpus_call_freelist
;
969 static mp_call_queue_t mp_cpus_call_head
[MAX_CPUS
];
971 static inline boolean_t
972 mp_call_head_lock(mp_call_queue_t
*cqp
)
974 boolean_t intrs_enabled
;
976 intrs_enabled
= ml_set_interrupts_enabled(FALSE
);
977 simple_lock(&cqp
->lock
);
979 return intrs_enabled
;
982 static inline boolean_t
983 mp_call_head_is_locked(mp_call_queue_t
*cqp
)
985 return !ml_get_interrupts_enabled() &&
986 hw_lock_held((hw_lock_t
)&cqp
->lock
);
990 mp_call_head_unlock(mp_call_queue_t
*cqp
, boolean_t intrs_enabled
)
992 simple_unlock(&cqp
->lock
);
993 ml_set_interrupts_enabled(intrs_enabled
);
996 static inline mp_call_t
*
999 mp_call_t
*callp
= NULL
;
1000 boolean_t intrs_enabled
;
1001 mp_call_queue_t
*cqp
= &mp_cpus_call_freelist
;
1003 intrs_enabled
= mp_call_head_lock(cqp
);
1004 if (!queue_empty(&cqp
->queue
))
1005 queue_remove_first(&cqp
->queue
, callp
, typeof(callp
), link
);
1006 mp_call_head_unlock(cqp
, intrs_enabled
);
1012 mp_call_free(mp_call_t
*callp
)
1014 boolean_t intrs_enabled
;
1015 mp_call_queue_t
*cqp
= &mp_cpus_call_freelist
;
1017 intrs_enabled
= mp_call_head_lock(cqp
);
1018 queue_enter_first(&cqp
->queue
, callp
, typeof(callp
), link
);
1019 mp_call_head_unlock(cqp
, intrs_enabled
);
1022 static inline mp_call_t
*
1023 mp_call_dequeue_locked(mp_call_queue_t
*cqp
)
1025 mp_call_t
*callp
= NULL
;
1027 assert(mp_call_head_is_locked(cqp
));
1028 if (!queue_empty(&cqp
->queue
))
1029 queue_remove_first(&cqp
->queue
, callp
, typeof(callp
), link
);
1034 mp_call_enqueue_locked(
1035 mp_call_queue_t
*cqp
,
1038 queue_enter(&cqp
->queue
, callp
, typeof(callp
), link
);
1041 /* Called on the boot processor to initialize global structures */
1043 mp_cpus_call_init(void)
1045 mp_call_queue_t
*cqp
= &mp_cpus_call_freelist
;
1047 DBG("mp_cpus_call_init()\n");
1048 simple_lock_init(&cqp
->lock
, 0);
1049 queue_init(&cqp
->queue
);
1053 * Called by each processor to add call buffers to the free list
1054 * and to initialize the per-cpu call queue.
1055 * Also called but ignored on slave processors on re-start/wake.
1058 mp_cpus_call_cpu_init(void)
1061 mp_call_queue_t
*cqp
= &mp_cpus_call_head
[cpu_number()];
1064 if (cqp
->queue
.next
!= NULL
)
1065 return; /* restart/wake case: called already */
1067 simple_lock_init(&cqp
->lock
, 0);
1068 queue_init(&cqp
->queue
);
1069 for (i
= 0; i
< MP_CPUS_CALL_BUFS_PER_CPU
; i
++) {
1070 callp
= (mp_call_t
*) kalloc(sizeof(mp_call_t
));
1071 mp_call_free(callp
);
1074 DBG("mp_cpus_call_init() done on cpu %d\n", cpu_number());
1078 * This is called from cpu_signal_handler() to process an MP_CALL signal.
1079 * And also from i386_deactivate_cpu() when a cpu is being taken offline.
1082 mp_cpus_call_action(void)
1084 mp_call_queue_t
*cqp
;
1085 boolean_t intrs_enabled
;
1089 assert(!ml_get_interrupts_enabled());
1090 cqp
= &mp_cpus_call_head
[cpu_number()];
1091 intrs_enabled
= mp_call_head_lock(cqp
);
1092 while ((callp
= mp_call_dequeue_locked(cqp
)) != NULL
) {
1093 /* Copy call request to the stack to free buffer */
1095 mp_call_free(callp
);
1096 if (call
.func
!= NULL
) {
1097 mp_call_head_unlock(cqp
, intrs_enabled
);
1098 KERNEL_DEBUG_CONSTANT(
1099 TRACE_MP_CPUS_CALL_ACTION
,
1100 call
.func
, call
.arg0
, call
.arg1
, call
.countp
, 0);
1101 call
.func(call
.arg0
, call
.arg1
);
1102 (void) mp_call_head_lock(cqp
);
1104 if (call
.countp
!= NULL
)
1105 atomic_incl(call
.countp
, 1);
1107 mp_call_head_unlock(cqp
, intrs_enabled
);
1111 * mp_cpus_call() runs a given function on cpus specified in a given cpu mask.
1112 * Possible modes are:
1113 * SYNC: function is called serially on target cpus in logical cpu order
1114 * waiting for each call to be acknowledged before proceeding
1115 * ASYNC: function call is queued to the specified cpus
1116 * waiting for all calls to complete in parallel before returning
1117 * NOSYNC: function calls are queued
1118 * but we return before confirmation of calls completing.
1119 * The action function may be NULL.
1120 * The cpu mask may include the local cpu. Offline cpus are ignored.
1121 * The return value is the number of cpus on which the call was made or queued.
1127 void (*action_func
)(void *),
1130 return mp_cpus_call1(
1133 (void (*)(void *,void *))action_func
,
1141 mp_cpus_call_wait(boolean_t intrs_enabled
,
1142 long mp_cpus_signals
,
1143 volatile long *mp_cpus_calls
)
1145 mp_call_queue_t
*cqp
;
1146 uint64_t tsc_spin_start
;
1148 cqp
= &mp_cpus_call_head
[cpu_number()];
1150 tsc_spin_start
= rdtsc64();
1151 while (*mp_cpus_calls
< mp_cpus_signals
) {
1152 if (!intrs_enabled
) {
1153 /* Sniffing w/o locking */
1154 if (!queue_empty(&cqp
->queue
))
1155 mp_cpus_call_action();
1156 handle_pending_TLB_flushes();
1158 mp_spin_timeout_check(tsc_spin_start
, "mp_cpus_call_wait()");
1166 void (*action_func
)(void *, void *),
1169 cpumask_t
*cpus_calledp
,
1170 cpumask_t
*cpus_notcalledp
)
1173 boolean_t intrs_enabled
= FALSE
;
1174 boolean_t call_self
= FALSE
;
1175 cpumask_t cpus_called
= 0;
1176 cpumask_t cpus_notcalled
= 0;
1177 long mp_cpus_signals
= 0;
1178 volatile long mp_cpus_calls
= 0;
1179 uint64_t tsc_spin_start
;
1181 KERNEL_DEBUG_CONSTANT(
1182 TRACE_MP_CPUS_CALL
| DBG_FUNC_START
,
1183 cpus
, mode
, VM_KERNEL_UNSLIDE(action_func
), arg0
, arg1
);
1185 if (!smp_initialized
) {
1186 if ((cpus
& CPUMASK_SELF
) == 0)
1188 if (action_func
!= NULL
) {
1189 intrs_enabled
= ml_set_interrupts_enabled(FALSE
);
1190 action_func(arg0
, arg1
);
1191 ml_set_interrupts_enabled(intrs_enabled
);
1198 * Queue the call for each non-local requested cpu.
1199 * The topo lock is not taken. Instead we sniff the cpu_running state
1200 * and then re-check it after taking the call lock. A cpu being taken
1201 * offline runs the action function after clearing the cpu_running.
1203 mp_disable_preemption(); /* interrupts may be enabled */
1204 tsc_spin_start
= rdtsc64();
1205 for (cpu
= 0; cpu
< (cpu_t
) real_ncpus
; cpu
++) {
1206 if (((cpu_to_cpumask(cpu
) & cpus
) == 0) ||
1207 !cpu_datap(cpu
)->cpu_running
)
1209 if (cpu
== (cpu_t
) cpu_number()) {
1211 * We don't IPI ourself and if calling asynchronously,
1212 * we defer our call until we have signalled all others.
1215 cpus_called
|= cpu_to_cpumask(cpu
);
1216 if (mode
== SYNC
&& action_func
!= NULL
) {
1217 KERNEL_DEBUG_CONSTANT(
1218 TRACE_MP_CPUS_CALL_LOCAL
,
1219 VM_KERNEL_UNSLIDE(action_func
),
1221 action_func(arg0
, arg1
);
1225 * Here to queue a call to cpu and IPI.
1226 * Spinning for request buffer unless NOSYNC.
1228 mp_call_t
*callp
= NULL
;
1229 mp_call_queue_t
*cqp
= &mp_cpus_call_head
[cpu
];
1233 callp
= mp_call_alloc();
1234 intrs_enabled
= mp_call_head_lock(cqp
);
1235 if (!cpu_datap(cpu
)->cpu_running
) {
1236 mp_call_head_unlock(cqp
, intrs_enabled
);
1239 if (mode
== NOSYNC
) {
1240 if (callp
== NULL
) {
1241 cpus_notcalled
|= cpu_to_cpumask(cpu
);
1242 mp_call_head_unlock(cqp
, intrs_enabled
);
1243 KERNEL_DEBUG_CONSTANT(
1244 TRACE_MP_CPUS_CALL_NOBUF
,
1248 callp
->countp
= NULL
;
1250 if (callp
== NULL
) {
1251 mp_call_head_unlock(cqp
, intrs_enabled
);
1252 KERNEL_DEBUG_CONSTANT(
1253 TRACE_MP_CPUS_CALL_NOBUF
,
1255 if (!intrs_enabled
) {
1256 /* Sniffing w/o locking */
1257 if (!queue_empty(&cqp
->queue
))
1258 mp_cpus_call_action();
1259 handle_pending_TLB_flushes();
1261 mp_spin_timeout_check(
1266 callp
->countp
= &mp_cpus_calls
;
1268 callp
->func
= action_func
;
1271 mp_call_enqueue_locked(cqp
, callp
);
1273 cpus_called
|= cpu_to_cpumask(cpu
);
1274 i386_signal_cpu(cpu
, MP_CALL
, ASYNC
);
1275 mp_call_head_unlock(cqp
, intrs_enabled
);
1277 mp_cpus_call_wait(intrs_enabled
, mp_cpus_signals
, &mp_cpus_calls
);
1282 /* Call locally if mode not SYNC */
1283 if (mode
!= SYNC
&& call_self
) {
1284 KERNEL_DEBUG_CONSTANT(
1285 TRACE_MP_CPUS_CALL_LOCAL
,
1286 VM_KERNEL_UNSLIDE(action_func
), arg0
, arg1
, 0, 0);
1287 if (action_func
!= NULL
) {
1288 ml_set_interrupts_enabled(FALSE
);
1289 action_func(arg0
, arg1
);
1290 ml_set_interrupts_enabled(intrs_enabled
);
1294 /* Safe to allow pre-emption now */
1295 mp_enable_preemption();
1297 /* For ASYNC, now wait for all signaled cpus to complete their calls */
1298 if (mode
== ASYNC
) {
1299 mp_cpus_call_wait(intrs_enabled
, mp_cpus_signals
, &mp_cpus_calls
);
1303 cpu
= (cpu_t
) mp_cpus_signals
+ (call_self
? 1 : 0);
1306 *cpus_calledp
= cpus_called
;
1307 if (cpus_notcalledp
)
1308 *cpus_notcalledp
= cpus_notcalled
;
1310 KERNEL_DEBUG_CONSTANT(
1311 TRACE_MP_CPUS_CALL
| DBG_FUNC_END
,
1312 cpu
, cpus_called
, cpus_notcalled
, 0, 0);
1319 mp_broadcast_action(void)
1321 /* call action function */
1322 if (mp_bc_action_func
!= NULL
)
1323 mp_bc_action_func(mp_bc_func_arg
);
1325 /* if we're the last one through, wake up the instigator */
1326 if (atomic_decl_and_test(&mp_bc_count
, 1))
1327 thread_wakeup(((event_t
)(uintptr_t) &mp_bc_count
));
1331 * mp_broadcast() runs a given function on all active cpus.
1332 * The caller blocks until the functions has run on all cpus.
1333 * The caller will also block if there is another pending braodcast.
1337 void (*action_func
)(void *),
1340 if (!smp_initialized
) {
1341 if (action_func
!= NULL
)
1346 /* obtain broadcast lock */
1347 lck_mtx_lock(&mp_bc_lock
);
1349 /* set static function pointers */
1350 mp_bc_action_func
= action_func
;
1351 mp_bc_func_arg
= arg
;
1353 assert_wait((event_t
)(uintptr_t)&mp_bc_count
, THREAD_UNINT
);
1356 * signal other processors, which will call mp_broadcast_action()
1358 simple_lock(&x86_topo_lock
);
1359 mp_bc_ncpus
= i386_active_cpus(); /* total including this cpu */
1360 mp_bc_count
= mp_bc_ncpus
;
1361 i386_signal_cpus(MP_BROADCAST
, ASYNC
);
1363 /* call executor function on this cpu */
1364 mp_broadcast_action();
1365 simple_unlock(&x86_topo_lock
);
1367 /* block for all cpus to have run action_func */
1368 if (mp_bc_ncpus
> 1)
1369 thread_block(THREAD_CONTINUE_NULL
);
1371 clear_wait(current_thread(), THREAD_AWAKENED
);
1374 lck_mtx_unlock(&mp_bc_lock
);
1378 i386_activate_cpu(void)
1380 cpu_data_t
*cdp
= current_cpu_datap();
1382 assert(!ml_get_interrupts_enabled());
1384 if (!smp_initialized
) {
1385 cdp
->cpu_running
= TRUE
;
1389 simple_lock(&x86_topo_lock
);
1390 cdp
->cpu_running
= TRUE
;
1392 simple_unlock(&x86_topo_lock
);
1397 i386_deactivate_cpu(void)
1399 cpu_data_t
*cdp
= current_cpu_datap();
1401 assert(!ml_get_interrupts_enabled());
1403 KERNEL_DEBUG_CONSTANT(
1404 TRACE_MP_CPU_DEACTIVATE
| DBG_FUNC_START
,
1407 simple_lock(&x86_topo_lock
);
1408 cdp
->cpu_running
= FALSE
;
1409 simple_unlock(&x86_topo_lock
);
1412 * Move all of this cpu's timers to the master/boot cpu,
1413 * and poke it in case there's a sooner deadline for it to schedule.
1415 timer_queue_shutdown(&cdp
->rtclock_timer
.queue
);
1416 mp_cpus_call(cpu_to_cpumask(master_cpu
), ASYNC
, timer_queue_expire_local
, NULL
);
1419 * Open an interrupt window
1420 * and ensure any pending IPI or timer is serviced
1422 mp_disable_preemption();
1423 ml_set_interrupts_enabled(TRUE
);
1425 while (cdp
->cpu_signals
&& x86_lcpu()->rtcDeadline
!= EndOfAllTime
)
1428 * Ensure there's no remaining timer deadline set
1429 * - AICPM may have left one active.
1433 ml_set_interrupts_enabled(FALSE
);
1434 mp_enable_preemption();
1436 KERNEL_DEBUG_CONSTANT(
1437 TRACE_MP_CPU_DEACTIVATE
| DBG_FUNC_END
,
1441 int pmsafe_debug
= 1;
1444 volatile boolean_t mp_kdp_trap
= FALSE
;
1445 volatile unsigned long mp_kdp_ncpus
;
1446 boolean_t mp_kdp_state
;
1453 unsigned int ncpus
= 0;
1454 unsigned int my_cpu
;
1455 uint64_t tsc_timeout
;
1457 DBG("mp_kdp_enter()\n");
1460 if (!smp_initialized
)
1461 simple_lock_init(&mp_kdp_lock
, 0);
1465 * Here to enter the debugger.
1466 * In case of races, only one cpu is allowed to enter kdp after
1469 mp_kdp_state
= ml_set_interrupts_enabled(FALSE
);
1470 my_cpu
= cpu_number();
1472 if (my_cpu
== (unsigned) debugger_cpu
) {
1473 kprintf("\n\nRECURSIVE DEBUGGER ENTRY DETECTED\n\n");
1478 cpu_datap(my_cpu
)->debugger_entry_time
= mach_absolute_time();
1479 simple_lock(&mp_kdp_lock
);
1481 if (pmsafe_debug
&& !kdp_snapshot
)
1482 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_SAFE
);
1484 while (mp_kdp_trap
) {
1485 simple_unlock(&mp_kdp_lock
);
1486 DBG("mp_kdp_enter() race lost\n");
1488 mp_kdp_wait(TRUE
, FALSE
);
1490 simple_lock(&mp_kdp_lock
);
1492 debugger_cpu
= my_cpu
;
1494 mp_kdp_ncpus
= 1; /* self */
1496 debugger_entry_time
= cpu_datap(my_cpu
)->debugger_entry_time
;
1497 simple_unlock(&mp_kdp_lock
);
1500 * Deliver a nudge to other cpus, counting how many
1502 DBG("mp_kdp_enter() signaling other processors\n");
1503 if (force_immediate_debugger_NMI
== FALSE
) {
1504 for (cpu
= 0; cpu
< real_ncpus
; cpu
++) {
1505 if (cpu
== my_cpu
|| !cpu_datap(cpu
)->cpu_running
)
1508 i386_signal_cpu(cpu
, MP_KDP
, ASYNC
);
1511 * Wait other processors to synchronize
1513 DBG("mp_kdp_enter() waiting for (%d) processors to suspend\n", ncpus
);
1516 * This timeout is rather arbitrary; we don't want to NMI
1517 * processors that are executing at potentially
1518 * "unsafe-to-interrupt" points such as the trampolines,
1519 * but neither do we want to lose state by waiting too long.
1521 tsc_timeout
= rdtsc64() + (ncpus
* 1000 * 1000 * 10ULL);
1524 tsc_timeout
= ~0ULL;
1526 while (mp_kdp_ncpus
!= ncpus
&& rdtsc64() < tsc_timeout
) {
1528 * A TLB shootdown request may be pending--this would
1529 * result in the requesting processor waiting in
1530 * PMAP_UPDATE_TLBS() until this processor deals with it.
1531 * Process it, so it can now enter mp_kdp_wait()
1533 handle_pending_TLB_flushes();
1536 /* If we've timed out, and some processor(s) are still unresponsive,
1537 * interrupt them with an NMI via the local APIC.
1539 if (mp_kdp_ncpus
!= ncpus
) {
1540 for (cpu
= 0; cpu
< real_ncpus
; cpu
++) {
1541 if (cpu
== my_cpu
|| !cpu_datap(cpu
)->cpu_running
)
1543 if (cpu_signal_pending(cpu
, MP_KDP
))
1544 cpu_NMI_interrupt(cpu
);
1549 for (cpu
= 0; cpu
< real_ncpus
; cpu
++) {
1550 if (cpu
== my_cpu
|| !cpu_datap(cpu
)->cpu_running
)
1552 cpu_NMI_interrupt(cpu
);
1555 DBG("mp_kdp_enter() %d processors done %s\n",
1556 (int)mp_kdp_ncpus
, (mp_kdp_ncpus
== ncpus
) ? "OK" : "timed out");
1558 postcode(MP_KDP_ENTER
);
1562 cpu_signal_pending(int cpu
, mp_event_t event
)
1564 volatile int *signals
= &cpu_datap(cpu
)->cpu_signals
;
1565 boolean_t retval
= FALSE
;
1567 if (i_bit(event
, signals
))
1572 long kdp_x86_xcpu_invoke(const uint16_t lcpu
, kdp_x86_xcpu_func_t func
,
1573 void *arg0
, void *arg1
)
1575 if (lcpu
> (real_ncpus
- 1))
1581 kdp_xcpu_call_func
.func
= func
;
1582 kdp_xcpu_call_func
.ret
= -1;
1583 kdp_xcpu_call_func
.arg0
= arg0
;
1584 kdp_xcpu_call_func
.arg1
= arg1
;
1585 kdp_xcpu_call_func
.cpu
= lcpu
;
1586 DBG("Invoking function %p on CPU %d\n", func
, (int32_t)lcpu
);
1587 while (kdp_xcpu_call_func
.cpu
!= KDP_XCPU_NONE
)
1589 return kdp_xcpu_call_func
.ret
;
1593 kdp_x86_xcpu_poll(void)
1595 if ((uint16_t)cpu_number() == kdp_xcpu_call_func
.cpu
) {
1596 kdp_xcpu_call_func
.ret
=
1597 kdp_xcpu_call_func
.func(kdp_xcpu_call_func
.arg0
,
1598 kdp_xcpu_call_func
.arg1
,
1600 kdp_xcpu_call_func
.cpu
= KDP_XCPU_NONE
;
1605 mp_kdp_wait(boolean_t flush
, boolean_t isNMI
)
1607 DBG("mp_kdp_wait()\n");
1608 /* If an I/O port has been specified as a debugging aid, issue a read */
1609 panic_io_port_read();
1610 current_cpu_datap()->debugger_ipi_time
= mach_absolute_time();
1612 /* If we've trapped due to a machine-check, save MCA registers */
1616 atomic_incl((volatile long *)&mp_kdp_ncpus
, 1);
1617 while (mp_kdp_trap
|| (isNMI
== TRUE
)) {
1619 * A TLB shootdown request may be pending--this would result
1620 * in the requesting processor waiting in PMAP_UPDATE_TLBS()
1621 * until this processor handles it.
1622 * Process it, so it can now enter mp_kdp_wait()
1625 handle_pending_TLB_flushes();
1627 kdp_x86_xcpu_poll();
1631 atomic_decl((volatile long *)&mp_kdp_ncpus
, 1);
1632 DBG("mp_kdp_wait() done\n");
1638 DBG("mp_kdp_exit()\n");
1640 atomic_decl((volatile long *)&mp_kdp_ncpus
, 1);
1642 debugger_exit_time
= mach_absolute_time();
1644 mp_kdp_trap
= FALSE
;
1647 /* Wait other processors to stop spinning. XXX needs timeout */
1648 DBG("mp_kdp_exit() waiting for processors to resume\n");
1649 while (mp_kdp_ncpus
> 0) {
1651 * a TLB shootdown request may be pending... this would result in the requesting
1652 * processor waiting in PMAP_UPDATE_TLBS() until this processor deals with it.
1653 * Process it, so it can now enter mp_kdp_wait()
1655 handle_pending_TLB_flushes();
1660 if (pmsafe_debug
&& !kdp_snapshot
)
1661 pmSafeMode(¤t_cpu_datap()->lcpu
, PM_SAFE_FL_NORMAL
);
1663 debugger_exit_time
= mach_absolute_time();
1665 DBG("mp_kdp_exit() done\n");
1666 (void) ml_set_interrupts_enabled(mp_kdp_state
);
1669 #endif /* MACH_KDP */
1672 mp_recent_debugger_activity() {
1673 uint64_t abstime
= mach_absolute_time();
1674 return (((abstime
- debugger_entry_time
) < LastDebuggerEntryAllowance
) ||
1675 ((abstime
- debugger_exit_time
) < LastDebuggerEntryAllowance
));
1681 __unused processor_t processor
)
1687 processor_t processor
)
1689 int cpu
= processor
->cpu_id
;
1691 if (cpu
!= cpu_number()) {
1692 i386_signal_cpu(cpu
, MP_AST
, ASYNC
);
1693 KERNEL_DEBUG_CONSTANT(MACHDBG_CODE(DBG_MACH_SCHED
, MACH_REMOTE_AST
), cpu
, 1, 0, 0, 0);
1698 slave_machine_init(void *param
)
1701 * Here in process context, but with interrupts disabled.
1703 DBG("slave_machine_init() CPU%d\n", get_cpu_number());
1705 if (param
== FULL_SLAVE_INIT
) {
1710 cpu_machine_init(); /* Interrupts enabled hereafter */
1711 mp_cpus_call_cpu_init();
1713 cpu_machine_init(); /* Interrupts enabled hereafter */
1718 int cpu_number(void)
1720 return get_cpu_number();
1728 simple_lock_init(&cpu_warm_lock
, 0);
1729 queue_init(&cpu_warm_call_list
);
1730 for (i
= 0; i
< NUM_CPU_WARM_CALLS
; i
++) {
1731 enqueue_head(&cpu_warm_call_list
, (queue_entry_t
)&cpu_warm_call_arr
[i
]);
1736 grab_warm_timer_call()
1739 timer_call_t call
= NULL
;
1742 simple_lock(&cpu_warm_lock
);
1743 if (!queue_empty(&cpu_warm_call_list
)) {
1744 call
= (timer_call_t
) dequeue_head(&cpu_warm_call_list
);
1746 simple_unlock(&cpu_warm_lock
);
1753 free_warm_timer_call(timer_call_t call
)
1758 simple_lock(&cpu_warm_lock
);
1759 enqueue_head(&cpu_warm_call_list
, (queue_entry_t
)call
);
1760 simple_unlock(&cpu_warm_lock
);
1765 * Runs in timer call context (interrupts disabled).
1768 cpu_warm_timer_call_func(
1769 call_entry_param_t p0
,
1770 __unused call_entry_param_t p1
)
1772 free_warm_timer_call((timer_call_t
)p0
);
1777 * Runs with interrupts disabled on the CPU we wish to warm (i.e. CPU 0).
1783 cpu_warm_data_t cwdp
= (cpu_warm_data_t
)arg
;
1785 timer_call_enter(cwdp
->cwd_call
, cwdp
->cwd_deadline
, TIMER_CALL_SYS_CRITICAL
| TIMER_CALL_LOCAL
);
1786 cwdp
->cwd_result
= 0;
1792 * Not safe to call with interrupts disabled.
1795 ml_interrupt_prewarm(
1798 struct cpu_warm_data cwd
;
1802 if (ml_get_interrupts_enabled() == FALSE
) {
1803 panic("%s: Interrupts disabled?\n", __FUNCTION__
);
1807 * If the platform doesn't need our help, say that we succeeded.
1809 if (!ml_get_interrupt_prewake_applicable()) {
1810 return KERN_SUCCESS
;
1814 * Grab a timer call to use.
1816 call
= grab_warm_timer_call();
1818 return KERN_RESOURCE_SHORTAGE
;
1821 timer_call_setup(call
, cpu_warm_timer_call_func
, call
);
1822 cwd
.cwd_call
= call
;
1823 cwd
.cwd_deadline
= deadline
;
1827 * For now, non-local interrupts happen on the master processor.
1829 ct
= mp_cpus_call(cpu_to_cpumask(master_cpu
), SYNC
, _cpu_warm_setup
, &cwd
);
1831 free_warm_timer_call(call
);
1832 return KERN_FAILURE
;
1834 return cwd
.cwd_result
;