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1 /*
2 * Copyright (c) 2003-2005 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
11 *
12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
18 * under the License.
19 *
20 * @APPLE_LICENSE_HEADER_END@
21 */
22 /*
23 * @OSF_COPYRIGHT@
24 */
25 /*
26 * Mach Operating System
27 * Copyright (c) 1991,1990,1989, 1988 Carnegie Mellon University
28 * All Rights Reserved.
29 *
30 * Permission to use, copy, modify and distribute this software and its
31 * documentation is hereby granted, provided that both the copyright
32 * notice and this permission notice appear in all copies of the
33 * software, derivative works or modified versions, and any portions
34 * thereof, and that both notices appear in supporting documentation.
35 *
36 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
37 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
38 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
39 *
40 * Carnegie Mellon requests users of this software to return to
41 *
42 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
43 * School of Computer Science
44 * Carnegie Mellon University
45 * Pittsburgh PA 15213-3890
46 *
47 * any improvements or extensions that they make and grant Carnegie Mellon
48 * the rights to redistribute these changes.
49 */
50
51 #include <platforms.h>
52 #include <mach_kdb.h>
53
54 #include <mach/i386/vm_param.h>
55
56 #include <string.h>
57 #include <mach/vm_param.h>
58 #include <mach/vm_prot.h>
59 #include <mach/machine.h>
60 #include <mach/time_value.h>
61 #include <kern/spl.h>
62 #include <kern/assert.h>
63 #include <kern/debug.h>
64 #include <kern/misc_protos.h>
65 #include <kern/startup.h>
66 #include <kern/clock.h>
67 #include <kern/pms.h>
68 #include <kern/xpr.h>
69 #include <kern/cpu_data.h>
70 #include <kern/processor.h>
71 #include <console/serial_protos.h>
72 #include <vm/vm_page.h>
73 #include <vm/pmap.h>
74 #include <vm/vm_kern.h>
75 #include <i386/fpu.h>
76 #include <i386/pmap.h>
77 #include <i386/ipl.h>
78 #include <i386/misc_protos.h>
79 #include <i386/cpuid.h>
80 #include <i386/mp.h>
81 #include <i386/mp_desc.h>
82 #include <i386/machine_routines.h>
83 #include <i386/postcode.h>
84 #include <i386/Diagnostics.h>
85 #include <i386/pmCPU.h>
86 #include <i386/tsc.h>
87 #include <i386/hpet.h>
88 #if MACH_KDB
89 #include <ddb/db_aout.h>
90 #endif /* MACH_KDB */
91 #include <ddb/tr.h>
92
93 static boot_args *kernelBootArgs;
94
95 extern int disableConsoleOutput;
96 extern const char version[];
97 extern const char version_variant[];
98 extern int nx_enabled;
99
100 extern int noVMX; /* if set, rosetta should not emulate altivec */
101
102 void cpu_stack_set(void);
103
104
105 /*
106 * Cpu initialization. Running virtual, but without MACH VM
107 * set up. First C routine called.
108 */
109 void
110 i386_init(vm_offset_t boot_args_start)
111 {
112 unsigned int maxmem;
113 uint64_t maxmemtouse;
114 unsigned int cpus;
115 boolean_t legacy_mode;
116
117 postcode(I386_INIT_ENTRY);
118
119 i386_macho_zerofill();
120
121 /*
122 * Setup boot args given the physical start address.
123 */
124 kernelBootArgs = (boot_args *)
125 ml_static_ptovirt(boot_args_start);
126 kernelBootArgs->MemoryMap = (uint32_t)
127 ml_static_ptovirt((vm_offset_t)kernelBootArgs->MemoryMap);
128 kernelBootArgs->deviceTreeP = (uint32_t)
129 ml_static_ptovirt((vm_offset_t)kernelBootArgs->deviceTreeP);
130
131 master_cpu = 0;
132 (void) cpu_data_alloc(TRUE);
133 cpu_init();
134 postcode(CPU_INIT_D);
135
136 /* init processor performance control */
137 pmsInit();
138
139 PE_init_platform(FALSE, kernelBootArgs);
140 postcode(PE_INIT_PLATFORM_D);
141
142 printf_init(); /* Init this in case we need debugger */
143 panic_init(); /* Init this in case we need debugger */
144
145 /* setup debugging output if one has been chosen */
146 PE_init_kprintf(FALSE);
147
148 if (!PE_parse_boot_arg("diag", &dgWork.dgFlags))
149 dgWork.dgFlags = 0;
150
151 serialmode = 0;
152 if(PE_parse_boot_arg("serial", &serialmode)) {
153 /* We want a serial keyboard and/or console */
154 kprintf("Serial mode specified: %08X\n", serialmode);
155 }
156 if(serialmode & 1) {
157 (void)switch_to_serial_console();
158 disableConsoleOutput = FALSE; /* Allow printfs to happen */
159 }
160
161 /* setup console output */
162 PE_init_printf(FALSE);
163
164 kprintf("version_variant = %s\n", version_variant);
165 kprintf("version = %s\n", version);
166
167 /*
168 * VM initialization, after this we're using page tables...
169 * The maximum number of cpus must be set beforehand.
170 */
171 if (!PE_parse_boot_arg("maxmem", &maxmem))
172 maxmemtouse=0;
173 else
174 maxmemtouse = ((uint64_t)maxmem) * (uint64_t)(1024 * 1024);
175
176 if (PE_parse_boot_arg("cpus", &cpus)) {
177 if ((0 < cpus) && (cpus < max_ncpus))
178 max_ncpus = cpus;
179 }
180
181 /*
182 * debug support for > 4G systems
183 */
184 if (!PE_parse_boot_arg("himemory_mode", &vm_himemory_mode))
185 vm_himemory_mode = 0;
186
187 /*
188 * At this point we check whether we are a 64-bit processor
189 * and that we're not restricted to legacy mode, 32-bit operation.
190 */
191 boolean_t IA32e = FALSE;
192 if (cpuid_extfeatures() & CPUID_EXTFEATURE_EM64T) {
193 kprintf("EM64T supported");
194 if (PE_parse_boot_arg("-legacy", &legacy_mode)) {
195 kprintf(" but legacy mode forced\n");
196 } else {
197 IA32e = TRUE;
198 kprintf(" and will be enabled\n");
199 }
200 }
201 if (!(cpuid_extfeatures() & CPUID_EXTFEATURE_XD))
202 nx_enabled = 0;
203
204 i386_vm_init(maxmemtouse, IA32e, kernelBootArgs);
205
206 if ( ! PE_parse_boot_arg("novmx", &noVMX))
207 noVMX = 0; /* OK to support Altivec in rosetta? */
208
209 tsc_init();
210 hpet_init();
211 power_management_init();
212
213 PE_init_platform(TRUE, kernelBootArgs);
214
215 /* create the console for verbose or pretty mode */
216 PE_create_console();
217
218 processor_bootstrap();
219 thread_bootstrap();
220
221 machine_startup();
222
223 }