pexpert/i386/pe_serial.c

   1 /*
   2  * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_OSREFERENCE_HEADER_START@
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
   7  * as defined in and that are subject to the Apple Public Source License
   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License.  The rights granted to you under the
  10  * License may not be used to create, or enable the creation or
  11  * redistribution of, unlawful or unlicensed copies of an Apple operating
  12  * system, or to circumvent, violate, or enable the circumvention or
  13  * violation of, any terms of an Apple operating system software license
  14  * agreement.
  15  *
  16  * Please obtain a copy of the License at
  17  * http://www.opensource.apple.com/apsl/ and read it before using this
  18  * file.
  19  *
  20  * The Original Code and all software distributed under the License are
  21  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  22  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  23  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  24  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  25  * Please see the License for the specific language governing rights and
  26  * limitations under the License.
  27  *
  28  * @APPLE_LICENSE_OSREFERENCE_HEADER_END@
  29  */
  30
  31 /*
  32  * file: pe_serial.c
  33  *       Polled-mode 16x50 UART driver.
  34  */
  35
  36 #include <pexpert/protos.h>
  37 #include <pexpert/pexpert.h>
  38
  39 void    serial_putc(char);
  40 int     serial_getc(void);
  41 int     serial_init(void);
  42
  43 /* standard port addresses */
  44 enum {
  45     COM1_PORT_ADDR = 0x3f8,
  46     COM2_PORT_ADDR = 0x2f8
  47 };
  48
  49 /* UART register offsets */
  50 enum {
  51     UART_RBR = 0,  /* receive buffer Register   (R) */
  52     UART_THR = 0,  /* transmit holding register (W) */
  53     UART_DLL = 0,  /* DLAB = 1, divisor latch (LSB) */
  54     UART_IER = 1,  /* interrupt enable register     */
  55     UART_DLM = 1,  /* DLAB = 1, divisor latch (MSB) */
  56     UART_IIR = 2,  /* interrupt ident register (R)  */
  57     UART_FCR = 2,  /* fifo control register (W)     */
  58     UART_LCR = 3,  /* line control register         */
  59     UART_MCR = 4,  /* modem control register        */
  60     UART_LSR = 5,  /* line status register          */
  61     UART_MSR = 6   /* modem status register         */
  62 };
  63
  64 enum {
  65     UART_LCR_8BITS = 0x03,
  66     UART_LCR_DLAB  = 0x80
  67 };
  68
  69 enum {
  70     UART_MCR_DTR   = 0x01,
  71     UART_MCR_RTS   = 0x02,
  72     UART_MCR_OUT1  = 0x04,
  73     UART_MCR_OUT2  = 0x08,
  74     UART_MCR_LOOP  = 0x10
  75 };
  76
  77 enum {
  78     UART_LSR_THRE  = 0x20
  79 };
  80
  81 #define UART_BAUD_RATE  115200
  82 #define UART_PORT_ADDR  COM1_PORT_ADDR
  83
  84 #define WRITE(r, v)  outb(UART_PORT_ADDR + UART_##r, v)
  85 #define READ(r)      inb(UART_PORT_ADDR + UART_##r)
  86 #define DELAY(x)     { volatile int _d_; for (_d_ = 0; _d_ < (10000*x); _d_++) ; }
  87
  88 static int uart_initted = 0;   /* 1 if init'ed */
  89
  90 static int
  91 uart_probe( void )
  92 {
  93     /* Verify that the Divisor Register is accessible */
  94
  95     WRITE( LCR, UART_LCR_DLAB );
  96     WRITE( DLL, 0x5a );
  97     if (READ(DLL) != 0x5a) return 0;
  98     WRITE( DLL, 0xa5 );
  99     if (READ(DLL) != 0xa5) return 0;
 100     WRITE( LCR, 0x00 );
 101     return 1;
 102 }
 103
 104 static void
 105 uart_set_baud_rate( unsigned long baud_rate )
 106 {
 107     #define UART_CLOCK  1843200   /* 1.8432 MHz clock */
 108
 109     const unsigned char lcr = READ( LCR );
 110     unsigned long       div;
 111
 112     if (baud_rate == 0) baud_rate = 9600;
 113     div = UART_CLOCK / 16 / baud_rate;
 114     WRITE( LCR, lcr | UART_LCR_DLAB );
 115     WRITE( DLM, (unsigned char)(div >> 8) );
 116     WRITE( DLL, (unsigned char) div );
 117     WRITE( LCR, lcr & ~UART_LCR_DLAB);
 118 }
 119
 120 static void
 121 uart_putc( char c )
 122 {
 123     if (!uart_initted) return;
 124
 125     /* Wait for THR empty */
 126     while ( !(READ(LSR) & UART_LSR_THRE) ) DELAY(1);
 127
 128     WRITE( THR, c );
 129 }
 130
 131 int serial_init( void )
 132 {
 133     if ( /*uart_initted ||*/ uart_probe() == 0 ) return 0;
 134
 135     /* Disable hardware interrupts */
 136
 137     WRITE( MCR, 0 );
 138     WRITE( IER, 0 );
 139
 140     /* Disable FIFO's for 16550 devices */
 141
 142     WRITE( FCR, 0 );
 143
 144     /* Set for 8-bit, no parity, DLAB bit cleared */
 145
 146     WRITE( LCR, UART_LCR_8BITS );
 147
 148     /* Set baud rate */
 149
 150     uart_set_baud_rate( UART_BAUD_RATE );
 151
 152     /* Assert DTR# and RTS# lines (OUT2?) */
 153
 154     WRITE( MCR, UART_MCR_DTR | UART_MCR_RTS );
 155
 156     /* Clear any garbage in the input buffer */
 157
 158     READ( RBR );
 159
 160     uart_initted = 1;
 161
 162     return 1;
 163 }
 164
 165 void serial_putc( char c )
 166 {
 167     uart_putc(c);
 168     if (c == '\n') uart_putc('\r');
 169 }
 170
 171 int serial_getc( void )
 172 {
 173     return 0;  /* not supported */
 174 }