]> git.saurik.com Git - apple/xnu.git/blob - osfmk/ppc/Diagnostics.c
43f57a9082668a7d91cdc9d1eefa660524d184ce
[apple/xnu.git] / osfmk / ppc / Diagnostics.c
1 /*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved.
7 *
8 * This file contains Original Code and/or Modifications of Original Code
9 * as defined in and that are subject to the Apple Public Source License
10 * Version 2.0 (the 'License'). You may not use this file except in
11 * compliance with the License. Please obtain a copy of the License at
12 * http://www.opensource.apple.com/apsl/ and read it before using this
13 * file.
14 *
15 * The Original Code and all software distributed under the License are
16 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
17 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
18 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
20 * Please see the License for the specific language governing rights and
21 * limitations under the License.
22 *
23 * @APPLE_LICENSE_HEADER_END@
24 */
25 /*
26 * @OSF_FREE_COPYRIGHT@
27 */
28 /*
29 * @APPLE_FREE_COPYRIGHT@
30 */
31
32 /*
33 * Author: Bill Angell, Apple
34 * Date: 9/auht-aught
35 *
36 * Random diagnostics
37 */
38
39
40 #include <kern/machine.h>
41 #include <kern/processor.h>
42 #include <mach/machine.h>
43 #include <mach/processor_info.h>
44 #include <mach/mach_types.h>
45 #include <mach/boolean.h>
46 #include <kern/thread.h>
47 #include <kern/task.h>
48 #include <mach/vm_param.h>
49 #include <vm/vm_kern.h>
50 #include <vm/vm_map.h>
51 #include <vm/vm_page.h>
52 #include <vm/pmap.h>
53 #include <ppc/exception.h>
54 #include <ppc/Firmware.h>
55 #include <ppc/low_trace.h>
56 #include <ppc/db_low_trace.h>
57 #include <ppc/mappings.h>
58 #include <ppc/pmap.h>
59 #include <ppc/mem.h>
60 #include <ppc/pmap_internals.h>
61 #include <ppc/savearea.h>
62 #include <ppc/Diagnostics.h>
63 #include <ppc/machine_cpu.h>
64 #include <pexpert/pexpert.h>
65 #include <ppc/POWERMAC/video_console.h>
66 #include <ppc/trap.h>
67
68 extern struct vc_info vinfo;
69
70 kern_return_t testPerfTrap(int trapno, struct savearea *ss,
71 unsigned int dsisr, unsigned int dar);
72
73 int diagCall(struct savearea *save) {
74
75 union {
76 unsigned long long tbase;
77 unsigned int tb[2];
78 } ttt, adj;
79 natural_t tbu, tbu2, tbl;
80 struct per_proc_info *per_proc; /* Area for my per_proc address */
81 int cpu;
82 unsigned int tstrt, tend, temp, temp2;
83
84 if(!(dgWork.dgFlags & enaDiagSCs)) return 0; /* If not enabled, cause an exception */
85
86 switch(save->save_r3) { /* Select the routine */
87
88 /*
89 * Adjust the timebase for drift recovery testing
90 */
91 case dgAdjTB: /* Adjust the timebase */
92
93 adj.tb[0] = 0; /* Clear high part */
94 adj.tb[1] = save->save_r4; /* Set low order */
95 if(adj.tb[1] & 0x80000000) adj.tb[0] = 0xFFFFFFFF; /* Propagate sign bit */
96
97 do { /* Read current time */
98 asm volatile(" mftbu %0" : "=r" (tbu));
99 asm volatile(" mftb %0" : "=r" (tbl));
100 asm volatile(" mftbu %0" : "=r" (tbu2));
101 } while (tbu != tbu2);
102
103 ttt.tb[0] = tbu; /* Set high */
104 ttt.tb[1] = tbl; /* Set low */
105
106 ttt.tbase = ttt.tbase + adj.tbase; /* Increment or decrement the TB */
107
108 tbu = ttt.tb[0]; /* Save in regular variable */
109 tbl = ttt.tb[1]; /* Save in regular variable */
110
111 mttb(0); /* Set low to keep from ticking */
112 mttbu(tbu); /* Set adjusted high */
113 mttb(tbl); /* Set adjusted low */
114
115 return -1; /* Return no AST checking... */
116
117 /*
118 * Return physical address of a page
119 */
120 case dgLRA:
121
122 save->save_r3 = pmap_extract(current_act()->map->pmap, save->save_r4); /* Get read address */
123
124 return -1; /* Return no AST checking... */
125
126 /*
127 * Copy physical to virtual
128 */
129 case dgpcpy:
130
131 #if 0
132 save->save_r3 = copyp2v(save->save_r4, save->save_r5, save->save_r6); /* Copy the physical page */
133 #endif
134 return 1; /* Return and check for ASTs... */
135
136
137 /*
138 * Soft reset processor
139 */
140 case dgreset:
141
142 cpu = save->save_r4; /* Get the requested CPU number */
143
144 if(cpu >= NCPUS) { /* Check for bogus cpu */
145 save->save_r3 = KERN_FAILURE; /* Set failure */
146 return 1;
147 }
148
149 if(!machine_slot[cpu].running) return KERN_FAILURE; /* It is not running */
150
151 per_proc = &per_proc_info[cpu]; /* Point to the processor */
152
153 (void)PE_cpu_start(per_proc->cpu_id,
154 per_proc->start_paddr, (vm_offset_t)per_proc);
155
156 save->save_r3 = KERN_SUCCESS; /* Set scuuess */
157
158 return 1; /* Return and check for ASTs... */
159
160 /*
161 * Force cache flush
162 */
163 case dgFlush:
164
165 #if 1
166 cacheInit(); /* Blow cache */
167 #else
168 asm volatile(" mftb %0" : "=r" (tstrt));
169 tend = tstrt;
170 while((tend - tstrt) < 0x000A2837) {
171 asm volatile(" mftb %0" : "=r" (tend));
172 }
173
174 #endif
175 return 1; /* Return and check for ASTs... */
176
177 /*
178 * various hack tests
179 */
180 case dgtest:
181
182 if(save->save_r4) perfTrapHook = testPerfTrap;
183 else perfTrapHook = 0;
184
185 return 1; /* Return and check for ASTs... */
186
187
188
189 /*
190 * Create a physical block map into the current task
191 * Don't bother to check for any errors.
192 * parms - vaddr, paddr, size, prot, attributes
193 */
194 case dgBMphys:
195
196 pmap_map_block(current_act()->map->pmap, save->save_r4, save->save_r5, save->save_r6, /* Map in the block */
197 save->save_r7, save->save_r8, 0);
198
199 return 1; /* Return and check for ASTs... */
200
201
202 /*
203 * Remove any mapping from the current task
204 * Don't bother to check for any errors.
205 * parms - vaddr
206 */
207 case dgUnMap:
208
209 (void)mapping_remove(current_act()->map->pmap, save->save_r4); /* Remove mapping */
210 return 1; /* Return and check for ASTs... */
211
212
213 /*
214 * Allows direct control of alignment handling.
215 *
216 * The bottom two bits of the parameter are used to set the two control bits:
217 * 0b00 - !trapUnalignbit - !notifyUnalignbit - default - instruction is emulated
218 * 0b01 - !trapUnalignbit - notifyUnalignbit - emulation is done, but traps afterwards
219 * 0b10 - trapUnalignbit - !notifyUnalignbit - no emulation - causes exception
220 * 0b11 - trapUnalignbit - notifyUnalignbit - no emulation - causes exception
221 */
222 case dgAlign:
223
224 temp = current_act()->mact.specFlags; /* Save the old values */
225
226 temp = ((current_act()->mact.specFlags >> (31 - trapUnalignbit - 1)) /* Reformat them to pass back */
227 | (current_act()->mact.specFlags >> (31 - notifyUnalignbit))) & 3;
228
229 temp2 = ((save->save_r4 << (31 - trapUnalignbit - 1)) & trapUnalign) /* Move parms into flag format */
230 | ((save->save_r4 << (31 - notifyUnalignbit)) & notifyUnalign);
231
232 current_act()->mact.specFlags &= ~(trapUnalign | notifyUnalign); /* Clean the old ones */
233 current_act()->mact.specFlags |= temp2; /* Set the new ones */
234
235 per_proc_info[cpu_number()].spcFlags = current_act()->mact.specFlags;
236
237 save->save_r3 = temp;
238
239 return 1; /* Return and check for ASTs... */
240
241 /*
242 * Return info for boot screen
243 */
244 case dgBootScreen:
245
246 #if 0
247 ml_set_interrupts_enabled(1);
248 (void)copyout((char *)&vinfo, (char *)save->save_r4, sizeof(struct vc_info)); /* Copy out the video info */
249 ml_set_interrupts_enabled(0);
250 #endif
251 return 1; /* Return and check for ASTs... */
252
253
254 default: /* Handle invalid ones */
255 return 0; /* Return an exception */
256
257 }
258
259 };
260
261 kern_return_t testPerfTrap(int trapno, struct savearea *ss,
262 unsigned int dsisr, unsigned int dar) {
263
264 if(trapno != T_ALIGNMENT) return KERN_FAILURE;
265
266 kprintf("alignment exception at %08X, srr1 = %08X, dsisr = %08X, dar = %08X\n", ss->save_srr0,
267 ss->save_srr1, dsisr, dar);
268
269 return KERN_SUCCESS;
270
271 }