iokit/IOKit/pci/IOPCIDevice.h

   1 /*
   2  * Copyright (c) 1998-2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * The contents of this file constitute Original Code as defined in and
   7  * are subject to the Apple Public Source License Version 1.1 (the
   8  * "License").  You may not use this file except in compliance with the
   9  * License.  Please obtain a copy of the License at
  10  * http://www.apple.com/publicsource and read it before using this file.
  11  *
  12  * This Original Code and all software distributed under the License are
  13  * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  14  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  15  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
  17  * License for the specific language governing rights and limitations
  18  * under the License.
  19  *
  20  * @APPLE_LICENSE_HEADER_END@
  21  */
  22 /*
  23  * Copyright (c) 1998 Apple Computer, Inc.  All rights reserved.
  24  *
  25  * HISTORY
  26  *
  27  */
  28
  29
  30 #ifndef _IOKIT_IOPCIDEVICE_H
  31 #define _IOKIT_IOPCIDEVICE_H
  32
  33 #include <IOKit/IOService.h>
  34
  35 /* Definitions of PCI Config Registers */
  36 enum {
  37     kIOPCIConfigVendorID                = 0x00,
  38     kIOPCIConfigDeviceID                = 0x02,
  39     kIOPCIConfigCommand                 = 0x04,
  40     kIOPCIConfigStatus                  = 0x06,
  41     kIOPCIConfigRevisionID              = 0x08,
  42     kIOPCIConfigClassCode               = 0x09,
  43     kIOPCIConfigCacheLineSize           = 0x0C,
  44     kIOPCIConfigLatencyTimer            = 0x0D,
  45     kIOPCIConfigHeaderType              = 0x0E,
  46     kIOPCIConfigBIST                    = 0x0F,
  47     kIOPCIConfigBaseAddress0            = 0x10,
  48     kIOPCIConfigBaseAddress1            = 0x14,
  49     kIOPCIConfigBaseAddress2            = 0x18,
  50     kIOPCIConfigBaseAddress3            = 0x1C,
  51     kIOPCIConfigBaseAddress4            = 0x20,
  52     kIOPCIConfigBaseAddress5            = 0x24,
  53     kIOPCIConfigCardBusCISPtr           = 0x28,
  54     kIOPCIConfigSubSystemVendorID       = 0x2C,
  55     kIOPCIConfigSubSystemID             = 0x2E,
  56     kIOPCIConfigExpansionROMBase        = 0x30,
  57     kIOPCIConfigCapabilitiesPtr         = 0x34,
  58     kIOPCIConfigInterruptLine           = 0x3C,
  59     kIOPCIConfigInterruptPin            = 0x3D,
  60     kIOPCIConfigMinimumGrant            = 0x3E,
  61     kIOPCIConfigMaximumLatency          = 0x3F
  62 };
  63
  64 /* Definitions of Capabilities PCI Config Register */
  65 enum {
  66     kIOPCICapabilityIDOffset            = 0x00,
  67     kIOPCINextCapabilityOffset          = 0x01,
  68     kIOPCIPowerManagementCapability     = 0x01,
  69     kIOPCIAGPCapability                 = 0x02
  70 };
  71
  72 /* Space definitions */
  73 enum {
  74     kIOPCIConfigSpace           = 0,
  75     kIOPCIIOSpace               = 1,
  76     kIOPCI32BitMemorySpace      = 2,
  77     kIOPCI64BitMemorySpace      = 3
  78 };
  79
  80 /* Command register definitions */
  81 enum {
  82     kIOPCICommandIOSpace                = 0x0001,
  83     kIOPCICommandMemorySpace            = 0x0002,
  84     kIOPCICommandBusMaster              = 0x0004,
  85     kIOPCICommandSpecialCycles          = 0x0008,
  86     kIOPCICommandMemWrInvalidate        = 0x0010,
  87     kIOPCICommandPaletteSnoop           = 0x0020,
  88     kIOPCICommandParityError            = 0x0040,
  89     kIOPCICommandAddressStepping        = 0x0080,
  90     kIOPCICommandSERR                   = 0x0100,
  91     kIOPCICommandFastBack2Back          = 0x0200
  92 };
  93
  94 /* Status register definitions */
  95 enum {
  96     kIOPCIStatusCapabilities            = 0x0010,
  97     kIOPCIStatusPCI66                   = 0x0020,
  98     kIOPCIStatusUDF                     = 0x0040,
  99     kIOPCIStatusFastBack2Back           = 0x0080,
 100     kIOPCIStatusDevSel0                 = 0x0000,
 101     kIOPCIStatusDevSel1                 = 0x0200,
 102     kIOPCIStatusDevSel2                 = 0x0400,
 103     kIOPCIStatusDevSel3                 = 0x0600,
 104     kIOPCIStatusTargetAbortCapable      = 0x0800,
 105     kIOPCIStatusTargetAbortActive       = 0x1000,
 106     kIOPCIStatusMasterAbortActive       = 0x2000,
 107     kIOPCIStatusSERRActive              = 0x4000,
 108     kIOPCIStatusParityErrActive         = 0x8000
 109 };
 110
 111 union IOPCIAddressSpace {
 112     UInt32              bits;
 113     struct {
 114 #if __BIG_ENDIAN__
 115         unsigned int    reloc:1;
 116         unsigned int    prefetch:1;
 117         unsigned int    t:1;
 118         unsigned int    resv:3;
 119         unsigned int    space:2;
 120         unsigned int    busNum:8;
 121         unsigned int    deviceNum:5;
 122         unsigned int    functionNum:3;
 123         unsigned int    registerNum:8;
 124 #elif __LITTLE_ENDIAN__
 125         unsigned int    registerNum:8;
 126         unsigned int    functionNum:3;
 127         unsigned int    deviceNum:5;
 128         unsigned int    busNum:8;
 129         unsigned int    space:2;
 130         unsigned int    resv:3;
 131         unsigned int    t:1;
 132         unsigned int    prefetch:1;
 133         unsigned int    reloc:1;
 134 #endif
 135     } s;
 136 };
 137
 138 struct IOPCIPhysicalAddress {
 139     IOPCIAddressSpace   physHi;
 140     UInt32              physMid;
 141     UInt32              physLo;
 142     UInt32              lengthHi;
 143     UInt32              lengthLo;
 144 };
 145
 146 // IOPCIDevice matching property names
 147 #define kIOPCIMatchKey                  "IOPCIMatch"
 148 #define kIOPCIPrimaryMatchKey           "IOPCIPrimaryMatch"
 149 #define kIOPCISecondaryMatchKey         "IOPCISecondaryMatch"
 150 #define kIOPCIClassMatchKey             "IOPCIClassMatch"
 151
 152
 153 /*! @class IOPCIDevice : public IOService
 154     @abstract An IOService class representing a PCI device.
 155     @discussion The discovery of an PCI device by the PCI bus family results in an instance of the IOPCIDevice being created and published. It provides services for looking up and mapping memory mapped hardware, and access to the PCI configuration and I/O spaces.
 156
 157 <br><br>Matching Supported by IOPCIDevice<br><br>
 158
 159 Two types of matching are available, OpenFirmware name matching and PCI register matching. Currently, only one of these two matching schemes can be used in the same property table.
 160
 161 <br><br>OpenFirmware Name Matching<br><br>
 162
 163 IOService performs matching based on the IONameMatch property (see IOService). IOPCIDevices created with OpenFirmware device tree entries will name match based on the standard OpenFirmware name matching properties.
 164
 165 <br><br>PCI Register Matching<br><br>
 166
 167 A PCI device driver can also match on the values of certain config space registers.
 168
 169 In each case, several matching values can be specified, and an optional mask for the value of the config space register may follow the value, preceded by an '&' character.
 170 <br>
 171 <br>
 172         kIOPCIMatchKey, "IOPCIMatch"
 173 <br>
 174 The kIOPCIMatchKey property matches the vendor and device ID (0x00) register, or the subsystem register (0x2c).
 175 <br>
 176 <br>
 177         kIOPCIPrimaryMatchKey, "IOPCIPrimaryMatch"
 178 <br>
 179 The kIOPCIPrimaryMatchKey property matches the vendor and device ID (0x00) register.
 180 <br>
 181 <br>
 182         kIOPCISecondaryMatchKey, "IOPCISecondaryMatch"
 183 <br>
 184 The kIOPCISecondaryMatchKey property matches the subsystem register (0x2c).
 185 <br>
 186 <br>
 187         kIOPCIClassMatchKey, "IOPCIClassMatch"
 188 <br>
 189 The kIOPCIClassMatchKey property matches the class code register (0x08). The default mask for this register is 0xffffff00.
 190 <br>
 191 <br>
 192 Examples:
 193 <br>
 194 <br>
 195       &ltkey&gtIOPCIMatch&lt/key&gt             <br>
 196         &ltstring&gt0x00261011&lt/string&gt
 197 <br>
 198 Matches a device whose vendor ID is 0x1011, and device ID is 0x0026, including subsystem IDs.
 199 <br>
 200 <br>
 201       &ltkey&gtIOPCIMatch&lt/key&gt             <br>
 202         &ltstring&gt0x00789004&0x00ffffff 0x78009004&0x0xff00ffff&lt/string&gt
 203 <br>
 204 Matches with any device with a vendor ID of 0x9004, and a device ID of 0xzz78 or 0x78zz, where 'z' is don't care.
 205 <br>
 206 <br>
 207       &ltkey&gtIOPCIClassMatch&lt/key&gt        <br>
 208         &ltstring&gt0x02000000&0xffff0000&lt/string&gt
 209 <br>
 210 <br>
 211 Matches a device whose class code is 0x0200zz, an ethernet device.
 212
 213 */
 214
 215 class IOPCIDevice : public IOService
 216 {
 217     OSDeclareDefaultStructors(IOPCIDevice)
 218
 219     friend class IOPCIBridge;
 220     friend class IOPCI2PCIBridge;
 221
 222 protected:
 223     IOPCIBridge *       parent;
 224     IOMemoryMap *       ioMap;
 225     OSObject *          slotNameProperty;
 226
 227 /*! @struct ExpansionData
 228     @discussion This structure will be used to expand the capablilties of the IOWorkLoop in the future.
 229     */
 230     struct ExpansionData { };
 231
 232 /*! @var reserved
 233     Reserved for future use.  (Internal use only)  */
 234     ExpansionData *reserved;
 235
 236 public:
 237     IOPCIAddressSpace   space;
 238     UInt32      *       savedConfig;
 239
 240 public:
 241     /* IOService/IORegistryEntry methods */
 242
 243     virtual bool attach( IOService * provider );
 244     virtual unsigned long maxCapabilityForDomainState( IOPMPowerFlags );
 245     virtual unsigned long initialPowerStateForDomainState( IOPMPowerFlags );
 246     virtual unsigned long powerStateForDomainState( IOPMPowerFlags );
 247     virtual IOReturn setPowerState( unsigned long, IOService * );
 248     virtual IOReturn addPowerChild ( IOService * theChild );
 249     virtual void joinPMtree( IOService * driver );
 250     virtual bool compareName( OSString * name, OSString ** matched = 0 ) const;
 251     virtual bool matchPropertyTable( OSDictionary *     table,
 252                                      SInt32       *     score );
 253     virtual IOService * matchLocation( IOService * client );
 254     virtual IOReturn getResources( void );
 255
 256     /* Config space accessors */
 257
 258     virtual UInt32 configRead32( IOPCIAddressSpace space, UInt8 offset );
 259     virtual void configWrite32( IOPCIAddressSpace space,
 260                                         UInt8 offset, UInt32 data );
 261     virtual UInt16 configRead16( IOPCIAddressSpace space, UInt8 offset );
 262     virtual void configWrite16( IOPCIAddressSpace space,
 263                                         UInt8 offset, UInt16 data );
 264     virtual UInt8 configRead8( IOPCIAddressSpace space, UInt8 offset );
 265     virtual void configWrite8( IOPCIAddressSpace space,
 266                                         UInt8 offset, UInt8 data );
 267
 268 /*! @function configRead32
 269     @abstract Reads a 32-bit value from the PCI device's configuration space.
 270     @discussion This method reads a 32-bit configuration space register on the device and returns its value.
 271     @param offset An 8-bit offset into configuration space, of which bits 0-1 are ignored.
 272     @result An 32-bit value in host byte order (big endian on PPC). */
 273
 274     virtual UInt32 configRead32( UInt8 offset );
 275
 276 /*! @function configRead16
 277     @abstract Reads a 16-bit value from the PCI device's configuration space.
 278     @discussion This method reads a 16-bit configuration space register on the device and returns its value.
 279     @param offset An 8-bit offset into configuration space, of which bit 0 is ignored.
 280     @result An 16-bit value in host byte order (big endian on PPC). */
 281
 282     virtual UInt16 configRead16( UInt8 offset );
 283
 284 /*! @function configRead8
 285     @abstract Reads a 8-bit value from the PCI device's configuration space.
 286     @discussion This method reads a 8-bit configuration space register on the device and returns its value.
 287     @param offset An 8-bit offset into configuration space.
 288     @result An 8-bit value. */
 289
 290     virtual UInt8 configRead8( UInt8 offset );
 291
 292 /*! @function configWrite32
 293     @abstract Writes a 32-bit value to the PCI device's configuration space.
 294     @discussion This method write a 32-bit value to a configuration space register on the device.
 295     @param offset An 8-bit offset into configuration space, of which bits 0-1 are ignored.
 296     @param data An 32-bit value to be written in host byte order (big endian on PPC). */
 297
 298     virtual void configWrite32( UInt8 offset, UInt32 data );
 299
 300 /*! @function configWrite16
 301     @abstract Writes a 16-bit value to the PCI device's configuration space.
 302     @discussion This method write a 16-bit value to a configuration space register on the device.
 303     @param offset An 8-bit offset into configuration space, of which bit 0 is ignored.
 304     @param data An 16-bit value to be written in host byte order (big endian on PPC). */
 305
 306     virtual void configWrite16( UInt8 offset, UInt16 data );
 307
 308 /*! @function configWrite8
 309     @abstract Writes a 8-bit value to the PCI device's configuration space.
 310     @discussion This method write a 8-bit value to a configuration space register on the device.
 311     @param offset An 8-bit offset into configuration space.
 312     @param data An 8-bit value to be written. */
 313
 314     virtual void configWrite8( UInt8 offset, UInt8 data );
 315
 316     virtual IOReturn saveDeviceState( IOOptionBits options = 0 );
 317     virtual IOReturn restoreDeviceState( IOOptionBits options = 0 );
 318
 319 /*! @function setConfigBits
 320     @abstract Sets masked bits in a configuration space register.
 321     @discussion This method sets masked bits in a configuration space register on the device by reading and writing the register. The value of the masked bits before the write is returned.
 322     @param offset An 8-bit offset into configuration space, of which bits 0-1 are ignored.
 323     @param mask An 32-bit mask indicating which bits in the value parameter are valid.
 324     @param data An 32-bit value to be written in host byte order (big endian on PPC).
 325     @result The value of the register masked with the mask before the write. */
 326
 327     virtual UInt32 setConfigBits( UInt8 offset, UInt32 mask, UInt32 value );
 328
 329 /*! @function setMemoryEnable
 330     @abstract Sets the device's memory space response.
 331     @discussion This method sets the memory space response bit in the device's command config space register to the passed value, and returns the previous state of the enable.
 332     @param enable True or false to enable or disable the memory space response.
 333     @result True if the memory space response was previously enabled, false otherwise. */
 334
 335     virtual bool setMemoryEnable( bool enable );
 336
 337 /*! @function setIOEnable
 338     @abstract Sets the device's I/O space response.
 339     @discussion This method sets the I/O space response bit in the device's command config space register to the passed value, and returns the previous state of the enable. The exclusive option allows only one exclusive device on the bus to be enabled concurrently, this should be only for temporary access.
 340     @param enable True or false to enable or disable the I/O space response.
 341     @param exclusive If true, only one setIOEnable with the exclusive flag set will be allowed at a time on the bus, this should be only for temporary access.
 342     @result True if the I/O space response was previously enabled, false otherwise. */
 343
 344     virtual bool setIOEnable( bool enable, bool exclusive = false );
 345
 346 /*! @function setBusMasterEnable
 347     @abstract Sets the device's bus master enable.
 348     @discussion This method sets the bus master enable bit in the device's command config space register to the passed value, and returns the previous state of the enable.
 349     @param enable True or false to enable or disable bus mastering.
 350     @result True if bus mastering was previously enabled, false otherwise. */
 351
 352     virtual bool setBusMasterEnable( bool enable );
 353
 354 /*! @function findPCICapability
 355     @abstract Search configuration space for a PCI capability register.
 356     @discussion This method searchs the device's config space for a PCI capability register matching the passed capability ID, if the device supports PCI capabilities.
 357     @param capabilityID An 8-bit PCI capability ID.
 358     @param offset An optional pointer to return the offset into config space where the capability was found.
 359     @result The 32-bit value of the capability register if one was found, zero otherwise. */
 360
 361     virtual UInt32 findPCICapability( UInt8 capabilityID, UInt8 * offset = 0 );
 362
 363 /*! @function getBusNumber
 364     @abstract Accessor to return the PCI device's assigned bus number.
 365     @discussion This method is an accessor to return the PCI device's assigned bus number.
 366     @result The 8-bit value of device's PCI bus number. */
 367
 368     virtual UInt8 getBusNumber( void );
 369
 370 /*! @function getDeviceNumber
 371     @abstract Accessor to return the PCI device's device number.
 372     @discussion This method is an accessor to return the PCI device's device number.
 373     @result The 5-bit value of device's device number. */
 374
 375     virtual UInt8 getDeviceNumber( void );
 376
 377 /*! @function getFunctionNumber
 378     @abstract Accessor to return the PCI device's function number.
 379     @discussion This method is an accessor to return the PCI device's function number.
 380     @result The 3-bit value of device's function number. */
 381
 382     virtual UInt8 getFunctionNumber( void );
 383
 384     /* Device memory accessors */
 385
 386 /*! @function getDeviceMemoryWithRegister
 387     @abstract Returns an instance of IODeviceMemory representing one of the device's memory mapped ranges.
 388     @discussion This method will return a pointer to an instance of IODeviceMemory for the physical memory range that was assigned to the configuration space base address register passed in. It is analogous to IOService::getDeviceMemoryWithIndex.
 389     @param reg The 8-bit configuration space register that is the base address register for the desired range.
 390     @result A pointer to an instance of IODeviceMemory, or zero no such range was found. The IODeviceMemory is retained by the provider, so is valid while attached, or while any mappings to it exist. It should not be released by the caller. */
 391
 392     virtual IODeviceMemory * getDeviceMemoryWithRegister( UInt8 reg );
 393
 394 /*! @function mapDeviceMemoryWithRegister
 395     @abstract Maps a physical range of the device.
 396     @discussion This method will create a mapping for the IODeviceMemory for the physical memory range that was assigned to the configuration space base address register passed in, with IODeviceMemory::map(options). The mapping is represented by the returned instance of IOMemoryMap, which should not be released until the mapping is no longer required. This method is analogous to IOService::mapDeviceMemoryWithIndex.
 397     @param index An index into the array of ranges assigned to the device.
 398     @result An instance of IOMemoryMap, or zero if the index is beyond the count available. The mapping should be released only when access to it is no longer required. */
 399
 400     virtual IOMemoryMap * mapDeviceMemoryWithRegister( UInt8 reg,
 401                                                 IOOptionBits options = 0 );
 402
 403 /*! @function ioDeviceMemory
 404     @abstract Accessor to the I/O space aperture for the bus.
 405     @discussion This method will return a reference to the IODeviceMemory for the I/O aperture of the bus the device is on.
 406     @result A pointer to an IODeviceMemory object for the I/O aperture. The IODeviceMemory is retained by the provider, so is valid while attached, or while any mappings to it exist. It should not be released by the caller. */
 407
 408     virtual IODeviceMemory * ioDeviceMemory( void );
 409
 410     /* I/O space accessors */
 411
 412 /*! @function ioWrite32
 413     @abstract Writes a 32-bit value to an I/O space aperture.
 414     @discussion This method will write a 32-bit value to a 4 byte aligned offset in an I/O space aperture. If a map object is passed in, the value is written relative to it, otherwise to the value is written relative to the I/O space aperture for the bus. This function encapsulates the differences between architectures in generating I/O space operations. An eieio instruction is included on PPC.
 415     @param offset An offset into a bus or device's I/O space aperture.
 416     @param value The value to be written in host byte order (big endian on PPC).
 417     @param map If the offset is relative to the beginning of a device's aperture, an IOMemoryMap object for that object should be passed in. Otherwise, passing zero will write the value relative to the beginning of the bus' I/O space. */
 418
 419     virtual void ioWrite32( UInt16 offset, UInt32 value,
 420                                 IOMemoryMap * map = 0 );
 421
 422 /*! @function ioWrite16
 423     @abstract Writes a 16-bit value to an I/O space aperture.
 424     @discussion This method will write a 16-bit value to a 2 byte aligned offset in an I/O space aperture. If a map object is passed in, the value is written relative to it, otherwise to the value is written relative to the I/O space aperture for the bus. This function encapsulates the differences between architectures in generating I/O space operations. An eieio instruction is included on PPC.
 425     @param offset An offset into a bus or device's I/O space aperture.
 426     @param value The value to be written in host byte order (big endian on PPC).
 427     @param map If the offset is relative to the beginning of a device's aperture, an IOMemoryMap object for that object should be passed in. Otherwise, passing zero will write the value relative to the beginning of the bus' I/O space. */
 428
 429     virtual void ioWrite16( UInt16 offset, UInt16 value,
 430                                 IOMemoryMap * map = 0 );
 431
 432 /*! @function ioWrite8
 433     @abstract Writes a 8-bit value to an I/O space aperture.
 434     @discussion This method will write a 8-bit value to an offset in an I/O space aperture. If a map object is passed in, the value is written relative to it, otherwise to the value is written relative to the I/O space aperture for the bus. This function encapsulates the differences between architectures in generating I/O space operations. An eieio instruction is included on PPC.
 435     @param offset An offset into a bus or device's I/O space aperture.
 436     @param value The value to be written in host byte order (big endian on PPC).
 437     @param map If the offset is relative to the beginning of a device's aperture, an IOMemoryMap object for that object should be passed in. Otherwise, passing zero will write the value relative to the beginning of the bus' I/O space. */
 438
 439     virtual void ioWrite8( UInt16 offset, UInt8 value,
 440                                 IOMemoryMap * map = 0 );
 441
 442 /*! @function ioRead32
 443     @abstract Reads a 32-bit value from an I/O space aperture.
 444     @discussion This method will read a 32-bit value from a 4 byte aligned offset in an I/O space aperture. If a map object is passed in, the value is read relative to it, otherwise to the value is read relative to the I/O space aperture for the bus. This function encapsulates the differences between architectures in generating I/O space operations. An eieio instruction is included on PPC.
 445     @param offset An offset into a bus or device's I/O space aperture.
 446     @param map If the offset is relative to the beginning of a device's aperture, an IOMemoryMap object for that object should be passed in. Otherwise, passing zero will write the value relative to the beginning of the bus' I/O space.
 447     @result The value read in host byte order (big endian on PPC). */
 448
 449     virtual UInt32 ioRead32( UInt16 offset, IOMemoryMap * map = 0 );
 450
 451 /*! @function ioRead16
 452     @abstract Reads a 16-bit value from an I/O space aperture.
 453     @discussion This method will read a 16-bit value from a 2 byte aligned offset in an I/O space aperture. If a map object is passed in, the value is read relative to it, otherwise to the value is read relative to the I/O space aperture for the bus. This function encapsulates the differences between architectures in generating I/O space operations. An eieio instruction is included on PPC.
 454     @param offset An offset into a bus or device's I/O space aperture.
 455     @param map If the offset is relative to the beginning of a device's aperture, an IOMemoryMap object for that object should be passed in. Otherwise, passing zero will write the value relative to the beginning of the bus' I/O space.
 456     @result The value read in host byte order (big endian on PPC). */
 457
 458     virtual UInt16 ioRead16( UInt16 offset, IOMemoryMap * map = 0 );
 459
 460 /*! @function ioRead8
 461     @abstract Reads a 8-bit value from an I/O space aperture.
 462     @discussion This method will read a 8-bit value from an offset in an I/O space aperture. If a map object is passed in, the value is read relative to it, otherwise to the value is read relative to the I/O space aperture for the bus. This function encapsulates the differences between architectures in generating I/O space operations. An eieio instruction is included on PPC.
 463     @param offset An offset into a bus or device's I/O space aperture.
 464     @param map If the offset is relative to the beginning of a device's aperture, an IOMemoryMap object for that object should be passed in. Otherwise, passing zero will write the value relative to the beginning of the bus' I/O space.
 465     @result The value read. */
 466
 467     virtual UInt8 ioRead8( UInt16 offset, IOMemoryMap * map = 0 );
 468
 469     // Unused Padding
 470     OSMetaClassDeclareReservedUnused(IOPCIDevice,  0);
 471     OSMetaClassDeclareReservedUnused(IOPCIDevice,  1);
 472     OSMetaClassDeclareReservedUnused(IOPCIDevice,  2);
 473     OSMetaClassDeclareReservedUnused(IOPCIDevice,  3);
 474     OSMetaClassDeclareReservedUnused(IOPCIDevice,  4);
 475     OSMetaClassDeclareReservedUnused(IOPCIDevice,  5);
 476     OSMetaClassDeclareReservedUnused(IOPCIDevice,  6);
 477     OSMetaClassDeclareReservedUnused(IOPCIDevice,  7);
 478     OSMetaClassDeclareReservedUnused(IOPCIDevice,  8);
 479     OSMetaClassDeclareReservedUnused(IOPCIDevice,  9);
 480     OSMetaClassDeclareReservedUnused(IOPCIDevice, 10);
 481     OSMetaClassDeclareReservedUnused(IOPCIDevice, 11);
 482     OSMetaClassDeclareReservedUnused(IOPCIDevice, 12);
 483     OSMetaClassDeclareReservedUnused(IOPCIDevice, 13);
 484     OSMetaClassDeclareReservedUnused(IOPCIDevice, 14);
 485     OSMetaClassDeclareReservedUnused(IOPCIDevice, 15);
 486 };
 487
 488 #endif /* ! _IOKIT_IOPCIDEVICE_H */
 489