osfmk/kdp/pe/POWERMAC/kdp_mace.h

   1 /*
   2  * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * Copyright (c) 1999-2003 Apple Computer, Inc.  All Rights Reserved.
   7  *
   8  * This file contains Original Code and/or Modifications of Original Code
   9  * as defined in and that are subject to the Apple Public Source License
  10  * Version 2.0 (the 'License'). You may not use this file except in
  11  * compliance with the License. Please obtain a copy of the License at
  12  * http://www.opensource.apple.com/apsl/ and read it before using this
  13  * file.
  14  *
  15  * The Original Code and all software distributed under the License are
  16  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  17  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  18  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  20  * Please see the License for the specific language governing rights and
  21  * limitations under the License.
  22  *
  23  * @APPLE_LICENSE_HEADER_END@
  24  */
  25 /*
  26  * Copyright 1996 1995 by Open Software Foundation, Inc. 1997 1996 1995 1994 1993 1992 1991
  27  *              All Rights Reserved
  28  *
  29  * Permission to use, copy, modify, and distribute this software and
  30  * its documentation for any purpose and without fee is hereby granted,
  31  * provided that the above copyright notice appears in all copies and
  32  * that both the copyright notice and this permission notice appear in
  33  * supporting documentation.
  34  *
  35  * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
  36  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  37  * FOR A PARTICULAR PURPOSE.
  38  *
  39  * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
  40  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
  41  * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
  42  * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
  43  * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  44  *
  45  */
  46 /*
  47  * Copyright 1996 1995 by Apple Computer, Inc. 1997 1996 1995 1994 1993 1992 1991
  48  *              All Rights Reserved
  49  *
  50  * Permission to use, copy, modify, and distribute this software and
  51  * its documentation for any purpose and without fee is hereby granted,
  52  * provided that the above copyright notice appears in all copies and
  53  * that both the copyright notice and this permission notice appear in
  54  * supporting documentation.
  55  *
  56  * APPLE COMPUTER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
  57  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  58  * FOR A PARTICULAR PURPOSE.
  59  *
  60  * IN NO EVENT SHALL APPLE COMPUTER BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
  61  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
  62  * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
  63  * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
  64  * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  65  */
  66 /*
  67  * MKLINUX-1.0DR2
  68  */
  69 /*
  70  * PMach Operating System
  71  * Copyright (c) 1995 Santa Clara University
  72  * All Rights Reserved.
  73  */
  74 /*
  75  * Mach Operating System
  76  * Copyright (c) 1991,1990,1989 Carnegie Mellon University
  77  * All Rights Reserved.
  78  *
  79  * Permission to use, copy, modify and distribute this software and its
  80  * documentation is hereby granted, provided that both the copyright
  81  * notice and this permission notice appear in all copies of the
  82  * software, derivative works or modified versions, and any portions
  83  * thereof, and that both notices appear in supporting documentation.
  84  *
  85  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
  86  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
  87  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
  88  *
  89  * Carnegie Mellon requests users of this software to return to
  90  *
  91  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
  92  *  School of Computer Science
  93  *  Carnegie Mellon University
  94  *  Pittsburgh PA 15213-3890
  95  *
  96  * any improvements or extensions that they make and grant Carnegie Mellon
  97  * the rights to redistribute these changes.
  98  */
  99 /*
 100  *      File:   if_3c501.h
 101  *      Author: Philippe Bernadat
 102  *      Date:   1989
 103  *      Copyright (c) 1989 OSF Research Institute
 104  *
 105  *      3COM Etherlink 3C501 Mach Ethernet drvier
 106  */
 107 /*
 108   Copyright 1990 by Open Software Foundation,
 109 Cambridge, MA.
 110
 111                 All Rights Reserved
 112
 113   Permission to use, copy, modify, and distribute this software and
 114 its documentation for any purpose and without fee is hereby granted,
 115 provided that the above copyright notice appears in all copies and
 116 that both the copyright notice and this permission notice appear in
 117 supporting documentation, and that the name of OSF or Open Software
 118 Foundation not be used in advertising or publicity pertaining to
 119 distribution of the software without specific, written prior
 120 permission.
 121
 122   OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
 123 INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
 124 IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
 125 CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
 126 LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
 127 NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
 128 WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 129 */
 130
 131
 132
 133 #define ENETPAD(n)      char n[15]
 134
 135 /* 0x50f0a000 */
 136 struct mace_board {
 137      volatile unsigned char   rcvfifo;  /* 00  receive fifo */
 138      ENETPAD(epad0);
 139      volatile unsigned char   xmtfifo;  /* 01  transmit fifo */
 140      ENETPAD(epad1);
 141      volatile unsigned char   xmtfc;    /* 02  transmit frame control */
 142      ENETPAD(epad2);
 143      volatile unsigned char   xmtfs;    /* 03  transmit frame status */
 144      ENETPAD(epad3);
 145      volatile unsigned char   xmtrc;    /* 04  transmit retry count */
 146      ENETPAD(epad4);
 147      volatile unsigned char   rcvfc;    /* 05  receive frame control -- 4 bytes */
 148      ENETPAD(epad5);
 149      volatile unsigned char   rcvfs;    /* 06  receive frame status */
 150      ENETPAD(epad6);
 151      volatile unsigned char   fifofc;   /* 07  fifo frame count */
 152      ENETPAD(epad7);
 153      volatile unsigned char   ir;       /* 08  interrupt */
 154      ENETPAD(epad8);
 155      volatile unsigned char   imr;      /* 09  interrupt mask */
 156      ENETPAD(epad9);
 157      volatile unsigned char   pr;       /* 10  poll */
 158      ENETPAD(epad10);
 159      volatile unsigned char   biucc;    /* 11  bus interface unit configuration control */
 160      ENETPAD(epad11);
 161      volatile unsigned char   fifocc;   /* 12  fifo configuration control */
 162      ENETPAD(epad12);
 163      volatile unsigned char   maccc;    /* 13  media access control configuration control */
 164      ENETPAD(epad13);
 165      volatile unsigned char   plscc;    /* 14  physical layer signalling configuration control */
 166      ENETPAD(epad14);
 167      volatile unsigned char   phycc;    /* 15  physical layer configuration control */
 168      ENETPAD(epad15);
 169      volatile unsigned char   chipid1;  /* 16  chip identification LSB */
 170      ENETPAD(epad16);
 171      volatile unsigned char   chipid2;  /* 17  chip identification MSB */
 172      ENETPAD(epad17);
 173      volatile unsigned char   iac;      /* 18  internal address configuration */
 174      ENETPAD(epad18);
 175      volatile unsigned char   res1;     /* 19  */
 176      ENETPAD(epad19);
 177      volatile unsigned char   ladrf;    /* 20  logical address filter -- 8 bytes */
 178      ENETPAD(epad20);
 179      volatile unsigned char   padr;     /* 21  physical address -- 6 bytes */
 180      ENETPAD(epad21);
 181      volatile unsigned char   res2;     /* 22  */
 182      ENETPAD(epad22);
 183      volatile unsigned char   res3;     /* 23  */
 184      ENETPAD(epad23);
 185      volatile unsigned char   mpc;      /* 24  missed packet count */
 186      ENETPAD(epad24);
 187      volatile unsigned char   res4;     /* 25  */
 188      ENETPAD(epad25);
 189      volatile unsigned char   rntpc;    /* 26  runt packet count */
 190      ENETPAD(epad26);
 191      volatile unsigned char   rcvcc;    /* 27  receive collision count */
 192      ENETPAD(epad27);
 193      volatile unsigned char   res5;     /* 28  */
 194      ENETPAD(epad28);
 195      volatile unsigned char   utr;      /* 29  user test */
 196      ENETPAD(epad29);
 197      volatile unsigned char   res6;     /* 30  */
 198      ENETPAD(epad30);
 199      volatile unsigned char   res7;     /* 31  */
 200      };
 201
 202 /*
 203  * Chip Revisions..
 204  */
 205
 206 #define MACE_REVISION_B0        0x0940
 207 #define MACE_REVISION_A2        0x0941
 208
 209 /* xmtfc */
 210 #define XMTFC_DRTRY       0X80
 211 #define XMTFC_DXMTFCS     0x08
 212 #define XMTFC_APADXNT     0x01
 213
 214 /* xmtfs */
 215 #define XMTFS_XNTSV     0x80
 216 #define XMTFS_XMTFS     0x40
 217 #define XMTFS_LCOL      0x20
 218 #define XMTFS_MORE      0x10
 219 #define XMTFS_ONE       0x08
 220 #define XMTFS_DEFER     0x04
 221 #define XMTFS_LCAR      0x02
 222 #define XMTFS_RTRY      0x01
 223
 224 /* xmtrc */
 225 #define XMTRC_EXDEF  0x80
 226
 227 /* rcvfc */
 228 #define RCVFC_LLRCV       0x08
 229 #define RCVFC_M_R         0x04
 230 #define RCVFC_ASTRPRCV    0x01
 231
 232 /* rcvfs */
 233 #define RCVFS_OFLO      0x80
 234 #define RCVFS_CLSN      0x40
 235 #define RCVFS_FRAM      0x20
 236 #define RCVFS_FCS       0x10
 237 #define RCVFS_REVCNT    0x0f
 238
 239 /* fifofc */
 240 #define FIFOCC_XFW_8    0x00
 241 #define FIFOCC_XFW_16   0x40
 242 #define FIFOCC_XFW_32   0x80
 243 #define FIFOCC_XFW_XX   0xc0
 244 #define FIFOCC_RFW_16   0x00
 245 #define FIFOCC_RFW_32   0x10
 246 #define FIFOCC_RFW_64   0x20
 247 #define FIFOCC_RFW_XX   0x30
 248 #define FIFOCC_XFWU     0x08
 249 #define FIFOCC_RFWU     0x04
 250 #define FIFOCC_XBRST    0x02
 251 #define FIFOCC_RBRST    0x01
 252
 253
 254 /* ir */
 255 #define IR_JAB          0x80
 256 #define IR_BABL         0x40
 257 #define IR_CERR         0x20
 258 #define IR_RCVCCO       0x10
 259 #define IR_RNTPCO       0x08
 260 #define IR_MPCO         0x04
 261 #define IR_RCVINT       0x02
 262 #define IR_XMTINT       0x01
 263
 264 /* imr */
 265 #define IMR_MJAB        0x80
 266 #define IMR_MBABL       0x40
 267 #define IMR_MCERR       0x20
 268 #define IMR_MRCVCCO     0x10
 269 #define IMR_MRNTPCO     0x08
 270 #define IMR_MMPCO       0x04
 271 #define IMR_MRCVINT     0x02
 272 #define IMR_MXMTINT     0x01
 273
 274 /* pr */
 275 #define PR_XMTSV        0x80
 276 #define PR_TDTREQ       0x40
 277 #define PR_RDTREQ       0x20
 278
 279 /* biucc */
 280 #define BIUCC_BSWP        0x40
 281 #define BIUCC_XMTSP04     0x00
 282 #define BIUCC_XMTSP16     0x10
 283 #define BIUCC_XMTSP64     0x20
 284 #define BIUCC_XMTSP112    0x30
 285 #define BIUCC_SWRST       0x01
 286
 287 /* fifocc */
 288 #define FIFOCC_XMTFW08W    0x00
 289 #define FIFOCC_XMTFW16W    0x40
 290 #define FIFOCC_XMTFW32W    0x80
 291
 292 #define FIFOCC_RCVFW16     0x00
 293 #define FIFOCC_RCVFW32     0x10
 294 #define FIFOCC_RCVFW64     0x20
 295
 296 #define FIFOCC_XMTFWU      0x08
 297 #define FIFOCC_RCVFWU      0x04
 298 #define FIFOCC_XMTBRST     0x02
 299 #define FIFOCC_RCVBRST     0x01
 300
 301 /* maccc */
 302 #define MACCC_PROM        0x80
 303 #define MACCC_DXMT2PD     0x40
 304 #define MACCC_EMBA        0x20
 305 #define MACCC_DRCVPA      0x08
 306 #define MACCC_DRCVBC      0x04
 307 #define MACCC_ENXMT       0x02
 308 #define MACCC_ENRCV       0x01
 309
 310 /* plscc */
 311 #define PLSCC_XMTSEL      0x08
 312 #define PLSCC_AUI         0x00
 313 #define PLSCC_TENBASE     0x02
 314 #define PLSCC_DAI         0x04
 315 #define PLSCC_GPSI        0x06
 316 #define PLSCC_ENPLSIO     0x01
 317
 318 /* phycc */
 319 #define PHYCC_LNKFL       0x80
 320 #define PHYCC_DLNKTST     0x40
 321 #define PHYCC_REVPOL      0x20
 322 #define PHYCC_DAPC        0x10
 323 #define PHYCC_LRT         0x08
 324 #define PHYCC_ASEL        0x04
 325 #define PHYCC_RWAKE       0x02
 326 #define PHYCC_AWAKE       0x01
 327
 328 /* iac */
 329 #define IAC_ADDRCHG     0x80
 330 #define IAC_PHYADDR     0x04
 331 #define IAC_LOGADDR     0x02
 332
 333 /* utr */
 334 #define UTR_RTRE        0x80
 335 #define UTR_RTRD        0x40
 336 #define UTR_RPA         0x20
 337 #define UTR_FCOLL       0x10
 338 #define UTR_RCVFCSE     0x08
 339
 340 #define UTR_NOLOOP      0x00
 341 #define UTR_EXTLOOP     0x02
 342 #define UTR_INLOOP      0x04
 343 #define UTR_INLOOP_M    0x06
 344
 345 #define ENET_PHYADDR_LEN        6
 346 #define ENET_HEADER         14
 347
 348 #define BFRSIZ          2048
 349 #define ETHER_ADD_SIZE  6       /* size of a MAC address */
 350 #define DSF_LOCK        1
 351 #define DSF_RUNNING     2
 352 #define MOD_ENAL 1
 353 #define MOD_PROM 2
 354
 355 /*
 356  * MACE Chip revision codes
 357  */
 358 #define MACERevA2       0x0941
 359 #define MACERevB0       0x0940
 360
 361 /*
 362  * Defines and device state
 363  * Dieter Siegmund (dieter@next.com) Thu Feb 27 18:25:33 PST 1997
 364  */
 365
 366 #define PG_SIZE         0x1000UL
 367 #define PG_MASK         (PG_SIZE - 1UL)
 368
 369 #define ETHERMTU                1500
 370 #define ETHER_RX_NUM_DBDMA_BUFS 32
 371 #define ETHERNET_BUF_SIZE       (ETHERMTU + 36)
 372 #define ETHER_MIN_PACKET        64
 373 #define TX_NUM_DBDMA            6
 374 #define NUM_EN_ADDR_BYTES   6
 375
 376 #define DBDMA_ETHERNET_EOP      0x40
 377
 378 typedef struct mace_s {
 379     struct mace_board *         ereg;   /* ethernet register set address */
 380     dbdma_regmap_t *            tx_dbdma;
 381     dbdma_regmap_t *            rv_dbdma;
 382     unsigned char               macaddr[NUM_EN_ADDR_BYTES]; /* mac address */
 383     int                         chip_id;
 384     dbdma_command_t             *rv_dma;
 385     dbdma_command_t             *tx_dma;
 386     unsigned char               *rv_dma_area;
 387     unsigned char               *tx_dma_area;
 388     int                         rv_tail;
 389     int                         rv_head;
 390 } mace_t;
 391
 392