iokit/Drivers/ata/drvAppleUltra66ATA/AppleUltra66ATA.h

   1 /*
   2  * Copyright (c) 1998-2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * The contents of this file constitute Original Code as defined in and
   7  * are subject to the Apple Public Source License Version 1.1 (the
   8  * "License").  You may not use this file except in compliance with the
   9  * License.  Please obtain a copy of the License at
  10  * http://www.apple.com/publicsource and read it before using this file.
  11  *
  12  * This Original Code and all software distributed under the License are
  13  * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  14  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  15  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
  17  * License for the specific language governing rights and limitations
  18  * under the License.
  19  *
  20  * @APPLE_LICENSE_HEADER_END@
  21  */
  22 /*
  23  *
  24  *      AppleUltra66ATA.h
  25  *
  26  */
  27
  28 #include <IOKit/IOMemoryCursor.h>
  29 #include <IOKit/ppc/IODBDMA.h>
  30
  31 #include <IOKit/ata/IOATAStandardInterface.h>
  32
  33 class AppleUltra66ATA : public IOATAStandardDriver
  34 {
  35     OSDeclareDefaultStructors( AppleUltra66ATA )
  36
  37 public:
  38    void                         free();
  39
  40 protected:
  41     bool                        configure( IOService *provider, ATAControllerInfo *controllerDataSize );
  42
  43     void                        enableControllerInterrupts();
  44     void                        disableControllerInterrupts();
  45
  46     bool                        calculateTiming( UInt32 deviceNum, ATATiming *timing );
  47     bool                        selectTiming( UInt32 deviceNum, ATATimingProtocol timingProtocol );
  48
  49     void                        newDeviceSelected( IOATAStandardDevice *newDevice );
  50
  51     void                        writeATAReg( UInt32 regIndex, UInt32 regValue );
  52     UInt32                      readATAReg(  UInt32 regIndex );
  53
  54     bool                        programDma( IOATAStandardCommand *cmd );
  55     bool                        startDma( IOATAStandardCommand *cmd );
  56     bool                        stopDma( IOATAStandardCommand *cmd, UInt32 *transferCount );
  57     bool                        resetDma();
  58     bool                        checkDmaActive();
  59
  60 private:
  61     bool                        identifyController();
  62
  63     bool                        calculatePIOTiming( UInt32 deviceNum, ATATiming *timing );
  64     bool                        calculateDMATiming( UInt32 deviceNum, ATATiming *timing );
  65
  66     bool                        calculateUltra66PIOTiming( UInt32 deviceNum, ATATiming *timing );
  67     bool                        calculateUltra66DMATiming( UInt32 deviceNum, ATATiming *timing );
  68     bool                        calculateUltra66UDMATiming( UInt32 deviceNum, ATATiming *timing );
  69
  70 private:
  71     IOService                           *provider;
  72
  73     IOMemoryMap                         *ioMapATA;
  74     volatile UInt32                     *ioBaseATA;
  75
  76     IOMemoryMap                         *ioMapDMA;
  77     volatile IODBDMAChannelRegisters    *ioBaseDMA;
  78
  79     UInt32                              controllerType;
  80
  81     IOInterruptEventSource              *interruptEventSource;
  82
  83     UInt32                              ideTimingWord[2];
  84
  85     IOBigMemoryCursor                   *dmaMemoryCursor;
  86     IODBDMADescriptor                   *dmaDescriptors;
  87     UInt32                              dmaDescriptorsPhys;
  88     UInt32                              numDescriptors;
  89
  90     void                                *bitBucketAddr;
  91     UInt32                              bitBucketAddrPhys;
  92
  93     UInt32                              dmaReqLength;
  94 };
  95
  96 /*
  97  *
  98  *
  99  */
 100 #define kATACS3RegBase          (16)
 101
 102 enum
 103 {
 104     kATASysClkNS                = 30,
 105     kATAUltra66ClockPS          = (15 * 1000 / 2),              // PCI 66 period / 2 (pS)
 106
 107     kATAPioAccessBase           = 0,
 108     kATAPioAccessMin            = 4,
 109     kATAPioRecoveryBase         = 4,
 110     kATAPioRecoveryMin          = 1,
 111
 112     kATADmaAccessBase           = 0,
 113     kATADmaAccessMin            = 1,
 114     kATADmaRecoveryBase         = 1,
 115     kATADmaRecoveryMin          = 1,
 116 };
 117
 118 enum
 119 {
 120     kControllerTypeDBDMAVersion1        = 1,
 121     kControllerTypeDBDMAVersion2        = 2,
 122     kControllerTypeUltra66DBDMA         = 3,
 123 };