pexpert/i386/pe_serial.c

   1 /*
   2  * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * The contents of this file constitute Original Code as defined in and
   7  * are subject to the Apple Public Source License Version 1.1 (the
   8  * "License").  You may not use this file except in compliance with the
   9  * License.  Please obtain a copy of the License at
  10  * http://www.apple.com/publicsource and read it before using this file.
  11  *
  12  * This Original Code and all software distributed under the License are
  13  * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  14  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  15  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
  17  * License for the specific language governing rights and limitations
  18  * under the License.
  19  *
  20  * @APPLE_LICENSE_HEADER_END@
  21  */
  22
  23 /*
  24  * file: pe_serial.c
  25  *       Polled-mode 16x50 UART driver.
  26  */
  27
  28 #include <pexpert/protos.h>
  29 #include <pexpert/pexpert.h>
  30
  31 void    serial_putc(char);
  32 int     serial_getc(void);
  33 int     serial_init(void);
  34
  35 /* standard port addresses */
  36 enum {
  37     COM1_PORT_ADDR = 0x3f8,
  38     COM2_PORT_ADDR = 0x2f8
  39 };
  40
  41 /* UART register offsets */
  42 enum {
  43     UART_RBR = 0,  /* receive buffer Register   (R) */
  44     UART_THR = 0,  /* transmit holding register (W) */
  45     UART_DLL = 0,  /* DLAB = 1, divisor latch (LSB) */
  46     UART_IER = 1,  /* interrupt enable register     */
  47     UART_DLM = 1,  /* DLAB = 1, divisor latch (MSB) */
  48     UART_IIR = 2,  /* interrupt ident register (R)  */
  49     UART_FCR = 2,  /* fifo control register (W)     */
  50     UART_LCR = 3,  /* line control register         */
  51     UART_MCR = 4,  /* modem control register        */
  52     UART_LSR = 5,  /* line status register          */
  53     UART_MSR = 6   /* modem status register         */
  54 };
  55
  56 enum {
  57     UART_LCR_8BITS = 0x03,
  58     UART_LCR_DLAB  = 0x80
  59 };
  60
  61 enum {
  62     UART_MCR_DTR   = 0x01,
  63     UART_MCR_RTS   = 0x02,
  64     UART_MCR_OUT1  = 0x04,
  65     UART_MCR_OUT2  = 0x08,
  66     UART_MCR_LOOP  = 0x10
  67 };
  68
  69 enum {
  70     UART_LSR_DR    = 0x01,
  71     UART_LSR_OE    = 0x02,
  72     UART_LSR_PE    = 0x04,
  73     UART_LSR_FE    = 0x08,
  74     UART_LSR_THRE  = 0x20
  75 };
  76
  77 static unsigned uart_baud_rate = 115200;
  78 #define UART_PORT_ADDR  COM1_PORT_ADDR
  79
  80 #define UART_CLOCK  1843200   /* 1.8432 MHz clock */
  81
  82 #define WRITE(r, v)  outb(UART_PORT_ADDR + UART_##r, v)
  83 #define READ(r)      inb(UART_PORT_ADDR + UART_##r)
  84 #define DELAY(x)     { volatile int _d_; for (_d_ = 0; _d_ < (10000*x); _d_++) ; }
  85
  86 static int uart_initted = 0;   /* 1 if init'ed */
  87
  88 static int
  89 uart_probe( void )
  90 {
  91     /* Verify that the Divisor Register is accessible */
  92
  93     WRITE( LCR, UART_LCR_DLAB );
  94     WRITE( DLL, 0x5a );
  95     if (READ(DLL) != 0x5a) return 0;
  96     WRITE( DLL, 0xa5 );
  97     if (READ(DLL) != 0xa5) return 0;
  98     WRITE( LCR, 0x00 );
  99     return 1;
 100 }
 101
 102 static void
 103 uart_set_baud_rate( unsigned long baud_rate )
 104 {
 105     const unsigned char lcr = READ( LCR );
 106     unsigned long       div;
 107
 108     if (baud_rate == 0) baud_rate = 9600;
 109     div = UART_CLOCK / 16 / baud_rate;
 110     WRITE( LCR, lcr | UART_LCR_DLAB );
 111     WRITE( DLM, (unsigned char)(div >> 8) );
 112     WRITE( DLL, (unsigned char) div );
 113     WRITE( LCR, lcr & ~UART_LCR_DLAB);
 114 }
 115
 116 static void
 117 uart_putc( char c )
 118 {
 119     if (!uart_initted) return;
 120
 121     /* Wait for THR empty */
 122     while ( !(READ(LSR) & UART_LSR_THRE) ) DELAY(1);
 123
 124     WRITE( THR, c );
 125 }
 126
 127 static int
 128 uart_getc( void )
 129 {
 130     /*
 131      * This function returns:
 132      * -1 : no data
 133      * -2 : receiver error
 134      * >0 : character received
 135      */
 136
 137     unsigned char lsr;
 138
 139     if (!uart_initted) return -1;
 140
 141     lsr = READ( LSR );
 142
 143     if ( lsr & (UART_LSR_FE | UART_LSR_PE | UART_LSR_OE) )
 144     {
 145         READ( RBR ); /* discard */
 146         return -2;
 147     }
 148
 149     if ( lsr & UART_LSR_DR )
 150     {
 151         return READ( RBR );
 152     }
 153
 154     return -1;
 155 }
 156
 157 int serial_init( void )
 158 {
 159     unsigned serial_baud_rate = 0;
 160
 161     if ( /*uart_initted ||*/ uart_probe() == 0 ) return 0;
 162
 163     /* Disable hardware interrupts */
 164
 165     WRITE( MCR, 0 );
 166     WRITE( IER, 0 );
 167
 168     /* Disable FIFO's for 16550 devices */
 169
 170     WRITE( FCR, 0 );
 171
 172     /* Set for 8-bit, no parity, DLAB bit cleared */
 173
 174     WRITE( LCR, UART_LCR_8BITS );
 175
 176     /* Set baud rate - use the supplied boot-arg if available */
 177
 178     if (PE_parse_boot_arg("serialbaud", &serial_baud_rate))
 179     {
 180             /* Valid divisor? */
 181             if (!((UART_CLOCK / 16) % serial_baud_rate)) {
 182                     uart_baud_rate = serial_baud_rate;
 183             }
 184     }
 185     uart_set_baud_rate( uart_baud_rate );
 186
 187     /* Assert DTR# and RTS# lines (OUT2?) */
 188
 189     WRITE( MCR, UART_MCR_DTR | UART_MCR_RTS );
 190
 191     /* Clear any garbage in the input buffer */
 192
 193     READ( RBR );
 194
 195     uart_initted = 1;
 196
 197     return 1;
 198 }
 199
 200 void serial_putc( char c )
 201 {
 202     uart_putc(c);
 203     if (c == '\n') uart_putc('\r');
 204 }
 205
 206 int serial_getc( void )
 207 {
 208     return uart_getc();
 209 }