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1 /*
2 * Copyright (c) 2007 Apple Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28 /*
29 * @OSF_COPYRIGHT@
30 *
31 */
32
33 #ifndef ARM_CPU_DATA_INTERNAL
34 #define ARM_CPU_DATA_INTERNAL
35
36 #include <mach_assert.h>
37 #include <kern/assert.h>
38 #include <kern/kern_types.h>
39 #include <kern/processor.h>
40 #include <pexpert/pexpert.h>
41 #include <arm/dbgwrap.h>
42 #include <arm/proc_reg.h>
43 #include <arm/thread.h>
44 #include <arm/pmap.h>
45
46 #if MONOTONIC
47 #include <machine/monotonic.h>
48 #endif /* MONOTONIC */
49
50 #define NSEC_PER_HZ (NSEC_PER_SEC / 100)
51
52 typedef struct reset_handler_data {
53 vm_offset_t assist_reset_handler; /* Assist handler phys address */
54 vm_offset_t cpu_data_entries; /* CpuDataEntries phys address */
55 #if !__arm64__
56 vm_offset_t boot_args; /* BootArgs phys address */
57 #endif
58 } reset_handler_data_t;
59
60 extern reset_handler_data_t ResetHandlerData;
61
62 #if __ARM_SMP__
63 #ifdef CPU_COUNT
64 #define MAX_CPUS CPU_COUNT
65 #else
66 #define MAX_CPUS 2
67 #endif
68 #else
69 #define MAX_CPUS 1
70 #endif
71
72 #define CPUWINDOWS_MAX 4
73 #ifdef __arm__
74 #define CPUWINDOWS_BASE 0xFFF00000UL
75 #else
76 #define CPUWINDOWS_BASE_MASK 0xFFFFFFFFFFF00000UL
77 #define CPUWINDOWS_BASE (VM_MAX_KERNEL_ADDRESS & CPUWINDOWS_BASE_MASK)
78 #endif
79
80 typedef struct cpu_data_entry {
81 void *cpu_data_paddr; /* Cpu data physical address */
82 struct cpu_data *cpu_data_vaddr; /* Cpu data virtual address */
83 #if __arm__
84 uint32_t cpu_data_offset_8;
85 uint32_t cpu_data_offset_12;
86 #elif __arm64__
87 #else
88 #error Check cpu_data_entry padding for this architecture
89 #endif
90 } cpu_data_entry_t;
91
92
93 typedef struct rtclock_timer {
94 mpqueue_head_t queue;
95 uint64_t deadline;
96 uint32_t is_set:1,
97 has_expired:1,
98 :0;
99 } rtclock_timer_t;
100
101 typedef struct {
102 uint32_t irq_ex_cnt;
103 uint32_t irq_ex_cnt_wake;
104 uint32_t ipi_cnt;
105 uint32_t ipi_cnt_wake;
106 uint32_t timer_cnt;
107 uint32_t timer_cnt_wake;
108 uint32_t undef_ex_cnt;
109 uint32_t unaligned_cnt;
110 uint32_t vfp_cnt;
111 uint32_t data_ex_cnt;
112 uint32_t instr_ex_cnt;
113 } cpu_stat_t;
114
115 typedef struct cpu_data
116 {
117 unsigned short cpu_number;
118 unsigned short cpu_flags;
119 vm_offset_t istackptr;
120 vm_offset_t intstack_top;
121 vm_offset_t fiqstackptr;
122 vm_offset_t fiqstack_top;
123 #if __arm64__
124 vm_offset_t excepstackptr;
125 vm_offset_t excepstack_top;
126 boolean_t cluster_master;
127 #endif
128 boolean_t interrupts_enabled;
129 thread_t cpu_active_thread;
130 vm_offset_t cpu_active_stack;
131 unsigned int cpu_ident;
132 cpu_id_t cpu_id;
133 unsigned volatile int cpu_signal;
134 #if DEBUG || DEVELOPMENT
135 void *failed_xcall;
136 unsigned int failed_signal;
137 volatile long failed_signal_count;
138 #endif
139 void *cpu_cache_dispatch;
140 ast_t cpu_pending_ast;
141 struct processor *cpu_processor;
142 int cpu_type;
143 int cpu_subtype;
144 int cpu_threadtype;
145 int cpu_running;
146
147 #ifdef __LP64__
148 uint64_t cpu_base_timebase;
149 uint64_t cpu_timebase;
150 #else
151 union {
152 struct {
153 uint32_t low;
154 uint32_t high;
155 } split;
156 struct {
157 uint64_t val;
158 } raw;
159 } cbtb;
160 #define cpu_base_timebase_low cbtb.split.low
161 #define cpu_base_timebase_high cbtb.split.high
162
163 union {
164 struct {
165 uint32_t low;
166 uint32_t high;
167 } split;
168 struct {
169 uint64_t val;
170 } raw;
171 } ctb;
172 #define cpu_timebase_low ctb.split.low
173 #define cpu_timebase_high ctb.split.high
174 #endif
175
176 uint32_t cpu_decrementer;
177 void *cpu_get_decrementer_func;
178 void *cpu_set_decrementer_func;
179 void *cpu_get_fiq_handler;
180
181 void *cpu_tbd_hardware_addr;
182 void *cpu_tbd_hardware_val;
183
184 void *cpu_console_buf;
185 void *cpu_chud;
186
187 void *cpu_idle_notify;
188 uint64_t cpu_idle_latency;
189 uint64_t cpu_idle_pop;
190
191 #if __arm__
192 vm_offset_t cpu_exc_vectors;
193 #endif
194 vm_offset_t cpu_reset_handler;
195 uint32_t cpu_reset_type;
196 uintptr_t cpu_reset_assist;
197
198 void *cpu_int_state;
199 IOInterruptHandler interrupt_handler;
200 void *interrupt_nub;
201 unsigned int interrupt_source;
202 void *interrupt_target;
203 void *interrupt_refCon;
204
205 void *idle_timer_notify;
206 void *idle_timer_refcon;
207 uint64_t idle_timer_deadline;
208
209 uint64_t quantum_timer_deadline;
210 uint64_t rtcPop;
211 rtclock_timer_t rtclock_timer;
212 struct _rtclock_data_ *rtclock_datap;
213
214 arm_debug_state_t *cpu_user_debug; /* Current debug state */
215 vm_offset_t cpu_debug_interface_map;
216
217 volatile int debugger_active;
218
219 void *cpu_xcall_p0;
220 void *cpu_xcall_p1;
221
222 #if __ARM_SMP__ && defined(ARMA7)
223 volatile uint32_t cpu_CLW_active;
224 volatile uint64_t cpu_CLWFlush_req;
225 volatile uint64_t cpu_CLWFlush_last;
226 volatile uint64_t cpu_CLWClean_req;
227 volatile uint64_t cpu_CLWClean_last;
228 #endif
229
230
231 #if __arm64__
232 vm_offset_t coresight_base[CORESIGHT_REGIONS];
233 #endif
234
235 /* CCC ARMv8 registers */
236 uint64_t cpu_regmap_paddr;
237
238 uint32_t cpu_phys_id;
239 uint32_t cpu_l2_access_penalty;
240 void *platform_error_handler;
241
242 int cpu_mcount_off;
243
244 #define ARM_CPU_ON_SLEEP_PATH 0x50535553UL
245 volatile unsigned int cpu_sleep_token;
246 unsigned int cpu_sleep_token_last;
247
248 cpu_stat_t cpu_stat;
249
250 volatile int PAB_active; /* Tells the console if we are dumping backtraces */
251
252 #if KPC
253 /* double-buffered performance counter data */
254 uint64_t *cpu_kpc_buf[2];
255 /* PMC shadow and reload value buffers */
256 uint64_t *cpu_kpc_shadow;
257 uint64_t *cpu_kpc_reload;
258 #endif
259 #if MONOTONIC
260 struct mt_cpu cpu_monotonic;
261 #endif /* MONOTONIC */
262 struct prngContext *cpu_prng;
263 cluster_type_t cpu_cluster_type;
264 uint32_t cpu_cluster_id;
265 uint32_t cpu_l2_id;
266 uint32_t cpu_l2_size;
267 uint32_t cpu_l3_id;
268 uint32_t cpu_l3_size;
269
270 struct pmap_cpu_data cpu_pmap_cpu_data;
271 dbgwrap_thread_state_t halt_state;
272 enum {
273 CPU_NOT_HALTED = 0,
274 CPU_HALTED,
275 CPU_HALTED_WITH_STATE
276 } halt_status;
277 } cpu_data_t;
278
279 /*
280 * cpu_flags
281 */
282 #define SleepState 0x0800
283 #define StartedState 0x1000
284
285 extern cpu_data_entry_t CpuDataEntries[MAX_CPUS];
286 extern cpu_data_t BootCpuData;
287 extern boot_args *BootArgs;
288
289 #if __arm__
290 extern unsigned int *ExceptionLowVectorsBase;
291 extern unsigned int *ExceptionVectorsTable;
292 #elif __arm64__
293 extern unsigned int LowResetVectorBase;
294 extern unsigned int LowResetVectorEnd;
295 #if WITH_CLASSIC_S2R
296 extern uint8_t SleepToken[8];
297 #endif
298 extern unsigned int LowExceptionVectorBase;
299 #else
300 #error Unknown arch
301 #endif
302
303 extern cpu_data_t *cpu_datap(int cpu);
304 extern cpu_data_t *cpu_data_alloc(boolean_t is_boot);
305 extern void cpu_data_init(cpu_data_t *cpu_data_ptr);
306 extern void cpu_data_free(cpu_data_t *cpu_data_ptr);
307 extern kern_return_t cpu_data_register(cpu_data_t *cpu_data_ptr);
308 extern cpu_data_t *processor_to_cpu_datap( processor_t processor);
309
310 #if __arm64__
311 typedef struct sysreg_restore
312 {
313 uint64_t tcr_el1;
314 } sysreg_restore_t;
315
316 extern sysreg_restore_t sysreg_restore;
317 #endif /* __arm64__ */
318
319 #endif /* ARM_CPU_DATA_INTERNAL */