osfmk/i386/start64.s

   1 /*
   2  * Copyright (c) 2006 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * The contents of this file constitute Original Code as defined in and
   7  * are subject to the Apple Public Source License Version 1.1 (the
   8  * "License").  You may not use this file except in compliance with the
   9  * License.  Please obtain a copy of the License at
  10  * http://www.apple.com/publicsource and read it before using this file.
  11  *
  12  * This Original Code and all software distributed under the License are
  13  * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  14  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  15  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
  17  * License for the specific language governing rights and limitations
  18  * under the License.
  19  *
  20  * @APPLE_LICENSE_HEADER_END@
  21  */
  22
  23 #include <platforms.h>
  24 #include <mach_kdb.h>
  25
  26 #include <i386/asm.h>
  27 #include <i386/asm64.h>
  28 #include <i386/proc_reg.h>
  29 #include <i386/postcode.h>
  30 #include <assym.s>
  31
  32         .data
  33         .align 3
  34         .globl EXT(gdtptr64)
  35         /* align below right */
  36         .word   0
  37 LEXT(gdtptr64)
  38         .word   Times(8,GDTSZ)-1
  39         /* XXX really want .quad here */
  40         .long   EXT(master_gdt)
  41         .long   KERNEL_UBER_BASE_HI32  /* must be in uber-space */
  42
  43         .align 3
  44         .globl EXT(idtptr64)
  45         /* align below right */
  46         .word   0
  47 LEXT(idtptr64)
  48         .word   Times(16,IDTSZ)-1
  49         /* XXX really want .quad here */
  50         .long   EXT(master_idt64)
  51         .long   KERNEL_UBER_BASE_HI32  /* must be in uber-space */
  52
  53         .text
  54
  55 Entry(ml_load_desc64)
  56
  57         ENTER_64BIT_MODE()
  58
  59         POSTCODE(ML_LOAD_DESC64_ENTRY)
  60
  61         lgdt    EXT(gdtptr64)           /* load GDT */
  62
  63         POSTCODE(ML_LOAD_DESC64_GDT)
  64
  65         lidt    EXT(idtptr64)           /* load IDT */
  66
  67         POSTCODE(ML_LOAD_DESC64_IDT)
  68
  69         movw    $(KERNEL_LDT),%ax       /* get LDT segment */
  70         lldt    %ax                     /* load LDT */
  71
  72         POSTCODE(ML_LOAD_DESC64_LDT)
  73
  74         movw    $(KERNEL_TSS),%ax
  75         ltr     %ax                     /* set up KTSS */
  76
  77         POSTCODE(ML_LOAD_DESC64_EXIT)
  78
  79         ENTER_COMPAT_MODE()
  80
  81         ret
  82
  83
  84 Entry(ml_64bit_wrmsr64)
  85         /* (uint32_t msr, uint64_t value) */
  86         /* (uint32_t msr, uint32_t lo, uint32_t hi) */
  87
  88         FRAME
  89
  90         ENTER_64BIT_MODE()
  91
  92         movl    B_ARG0, %ecx
  93         movl    B_ARG1, %eax
  94         movl    B_ARG2, %edx
  95         wrmsr
  96
  97         ENTER_COMPAT_MODE()
  98
  99         EMARF
 100         ret
 101
 102
 103 Entry(ml_64bit_lldt)
 104         /* (int32_t selector) */
 105
 106         FRAME
 107
 108         ENTER_64BIT_MODE()
 109
 110         movl    B_ARG0, %eax
 111         lldt    %ax
 112
 113         ENTER_COMPAT_MODE()
 114
 115         EMARF
 116         ret
 117
 118 Entry(set_64bit_debug_regs)
 119         /* x86_debug_state64_t *ds */
 120
 121         FRAME
 122
 123         ENTER_64BIT_MODE()
 124
 125         mov     B_ARG0, %edx
 126         mov     DS64_DR0(%edx), %rax
 127         mov     %rax, %dr0
 128         mov     DS64_DR1(%edx), %rax
 129         mov     %rax, %dr1
 130         mov     DS64_DR2(%edx), %rax
 131         mov     %rax, %dr2
 132         mov     DS64_DR3(%edx), %rax
 133         mov     %rax, %dr3
 134
 135         ENTER_COMPAT_MODE()
 136
 137         EMARF
 138         ret
 139
 140 Entry(flush_tlb64)
 141
 142         FRAME
 143
 144         ENTER_64BIT_MODE()
 145
 146         mov     %cr3, %rax
 147         mov     %rax, %cr3
 148
 149         ENTER_COMPAT_MODE()
 150
 151         EMARF
 152         ret
 153
 154 /* FXSAVE and FXRSTOR operate in a mode dependent fashion, hence these variants.
 155 * Must be called with interrupts disabled.
 156 * We clear pending x87 exceptions here; this is technically incorrect, since we should
 157 * propagate those to the user, but the compatibility mode kernel is currently not
 158 * prepared to handle exceptions originating in 64-bit kernel mode. However, it may be possible
 159 * to work around this should it prove necessary.
 160 */
 161
 162 Entry(fxsave64)
 163         movl            S_ARG0,%eax
 164         ENTER_64BIT_MODE()
 165         fnclex
 166         fxsave          0(%eax)
 167         ENTER_COMPAT_MODE()
 168         ret
 169
 170 Entry(fxrstor64)
 171         movl            S_ARG0,%eax
 172         ENTER_64BIT_MODE()
 173         fnclex
 174         fxrstor         0(%rax)
 175         ENTER_COMPAT_MODE()
 176         ret