osfmk/i386/fpu.h

   1 /*
   2  * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_OSREFERENCE_HEADER_START@
   5  *
   6  * This file contains Original Code and/or Modifications of Original Code
   7  * as defined in and that are subject to the Apple Public Source License
   8  * Version 2.0 (the 'License'). You may not use this file except in
   9  * compliance with the License.  The rights granted to you under the
  10  * License may not be used to create, or enable the creation or
  11  * redistribution of, unlawful or unlicensed copies of an Apple operating
  12  * system, or to circumvent, violate, or enable the circumvention or
  13  * violation of, any terms of an Apple operating system software license
  14  * agreement.
  15  *
  16  * Please obtain a copy of the License at
  17  * http://www.opensource.apple.com/apsl/ and read it before using this
  18  * file.
  19  *
  20  * The Original Code and all software distributed under the License are
  21  * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  22  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  23  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  24  * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
  25  * Please see the License for the specific language governing rights and
  26  * limitations under the License.
  27  *
  28  * @APPLE_LICENSE_OSREFERENCE_HEADER_END@
  29  */
  30 /*
  31  * @OSF_COPYRIGHT@
  32  */
  33 /*
  34  * Mach Operating System
  35  * Copyright (c) 1991 Carnegie Mellon University
  36  * All Rights Reserved.
  37  *
  38  * Permission to use, copy, modify and distribute this software and its
  39  * documentation is hereby granted, provided that both the copyright
  40  * notice and this permission notice appear in all copies of the
  41  * software, derivative works or modified versions, and any portions
  42  * thereof, and that both notices appear in supporting documentation.
  43  *
  44  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
  45  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
  46  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
  47  *
  48  * Carnegie Mellon requests users of this software to return to
  49  *
  50  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
  51  *  School of Computer Science
  52  *  Carnegie Mellon University
  53  *  Pittsburgh PA 15213-3890
  54  *
  55  * any improvements or extensions that they make and grant Carnegie Mellon
  56  * the rights to redistribute these changes.
  57  */
  58
  59 /*
  60  */
  61
  62 #ifndef _I386_FPU_H_
  63 #define _I386_FPU_H_
  64
  65 /*
  66  * Macro definitions for routines to manipulate the
  67  * floating-point processor.
  68  */
  69 #include <kern/thread.h>
  70 #include <i386/thread.h>
  71 #include <kern/kern_types.h>
  72 #include <mach/i386/kern_return.h>
  73 #include <mach/i386/thread_status.h>
  74 #include <i386/proc_reg.h>
  75
  76 extern int              fp_kind;
  77
  78 extern void             init_fpu(void);
  79 extern void             fpu_module_init(void);
  80 extern void             fpu_free(
  81                                 struct x86_fpsave_state * fps);
  82 extern kern_return_t    fpu_set_fxstate(
  83                                 thread_t        thr_act,
  84                                 thread_state_t  state);
  85 extern kern_return_t    fpu_get_fxstate(
  86                                 thread_t        thr_act,
  87                                 thread_state_t  state);
  88 extern void             fpu_dup_fxstate(
  89                                 thread_t        parent,
  90                                 thread_t        child);
  91 extern void             fpnoextflt(void);
  92 extern void             fpextovrflt(void);
  93 extern void             fpexterrflt(void);
  94 extern void             fpSSEexterrflt(void);
  95 extern void             fpflush(thread_t);
  96 extern void             fp_setvalid(boolean_t);
  97 extern void             fxsave64(struct x86_fx_save *);
  98 extern void             fxrstor64(struct x86_fx_save *);
  99
 100 /*
 101  * FPU instructions.
 102  */
 103 #define fninit() \
 104         __asm__ volatile("fninit")
 105
 106 #define fnstcw(control) \
 107         __asm__("fnstcw %0" : "=m" (*(unsigned short *)(control)))
 108
 109 #define fldcw(control) \
 110         __asm__ volatile("fldcw %0" : : "m" (*(unsigned short *) &(control)) )
 111
 112 extern unsigned short           fnstsw(void);
 113
 114 extern __inline__ unsigned short fnstsw(void)
 115 {
 116         unsigned short status;
 117         __asm__ volatile("fnstsw %0" : "=ma" (status));
 118         return(status);
 119 }
 120
 121 #define fnclex() \
 122         __asm__ volatile("fnclex")
 123
 124 #define fnsave(state)  \
 125         __asm__ volatile("fnsave %0" : "=m" (*state))
 126
 127 #define frstor(state) \
 128         __asm__ volatile("frstor %0" : : "m" (state))
 129
 130 #define fwait() \
 131         __asm__("fwait");
 132
 133 #define fxrstor(addr)           __asm("fxrstor %0" : : "m" (*(addr)))
 134 #define fxsave(addr)            __asm __volatile("fxsave %0" : "=m" (*(addr)))
 135
 136 #define FXSAFE() (fp_kind == FP_FXSR)
 137
 138
 139 static inline void clear_fpu(void)
 140 {
 141         set_ts();
 142 }
 143
 144 /*
 145  * Save thread`s FPU context.
 146  */
 147
 148 static inline void fpu_save_context(thread_t thread)
 149 {
 150         struct x86_fpsave_state *ifps;
 151
 152         assert(ml_get_interrupts_enabled() == FALSE);
 153         ifps = (thread)->machine.pcb->ifps;
 154         if (ifps != 0 && !ifps->fp_valid) {
 155                 /* Clear CR0.TS in preparation for the FP context save. In
 156                  * theory, this shouldn't be necessary since a live FPU should
 157                  * indicate that TS is clear. However, various routines
 158                  * (such as sendsig & sigreturn) manipulate TS directly.
 159                  */
 160                 clear_ts();
 161                 /* registers are in FPU - save to memory */
 162                 ifps->fp_valid = TRUE;
 163                 if (!thread_is_64bit(thread) || is_saved_state32(thread->machine.pcb->iss)) {
 164                         /* save the compatibility/legacy mode XMM+x87 state */
 165                         fxsave(&ifps->fx_save_state);
 166                         ifps->fp_save_layout = FXSAVE32;
 167                 }
 168                 else {
 169                         /* Execute a brief jump to 64-bit mode to save the 64
 170                          * bit state
 171                          */
 172                         fxsave64(&ifps->fx_save_state);
 173                         ifps->fp_save_layout = FXSAVE64;
 174                 }
 175         }
 176         set_ts();
 177 }
 178
 179 #endif  /* _I386_FPU_H_ */