iokit/IOKit/pci/IOPCIDevice.h

   1 /*
   2  * Copyright (c) 1998-2000 Apple Computer, Inc. All rights reserved.
   3  *
   4  * @APPLE_LICENSE_HEADER_START@
   5  *
   6  * The contents of this file constitute Original Code as defined in and
   7  * are subject to the Apple Public Source License Version 1.1 (the
   8  * "License").  You may not use this file except in compliance with the
   9  * License.  Please obtain a copy of the License at
  10  * http://www.apple.com/publicsource and read it before using this file.
  11  *
  12  * This Original Code and all software distributed under the License are
  13  * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
  14  * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
  15  * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
  17  * License for the specific language governing rights and limitations
  18  * under the License.
  19  *
  20  * @APPLE_LICENSE_HEADER_END@
  21  */
  22 /*
  23  * Copyright (c) 1998 Apple Computer, Inc.  All rights reserved.
  24  *
  25  * HISTORY
  26  *
  27  */
  28
  29
  30 #ifndef _IOKIT_IOPCIDEVICE_H
  31 #define _IOKIT_IOPCIDEVICE_H
  32
  33 #include <IOKit/IOService.h>
  34
  35 /* Definitions of PCI Config Registers */
  36 enum {
  37     kIOPCIConfigVendorID                = 0x00,
  38     kIOPCIConfigDeviceID                = 0x02,
  39     kIOPCIConfigCommand                 = 0x04,
  40     kIOPCIConfigStatus                  = 0x06,
  41     kIOPCIConfigRevisionID              = 0x08,
  42     kIOPCIConfigClassCode               = 0x09,
  43     kIOPCIConfigCacheLineSize           = 0x0C,
  44     kIOPCIConfigLatencyTimer            = 0x0D,
  45     kIOPCIConfigHeaderType              = 0x0E,
  46     kIOPCIConfigBIST                    = 0x0F,
  47     kIOPCIConfigBaseAddress0            = 0x10,
  48     kIOPCIConfigBaseAddress1            = 0x14,
  49     kIOPCIConfigBaseAddress2            = 0x18,
  50     kIOPCIConfigBaseAddress3            = 0x1C,
  51     kIOPCIConfigBaseAddress4            = 0x20,
  52     kIOPCIConfigBaseAddress5            = 0x24,
  53     kIOPCIConfigCardBusCISPtr           = 0x28,
  54     kIOPCIConfigSubSystemVendorID       = 0x2C,
  55     kIOPCIConfigSubSystemID             = 0x2E,
  56     kIOPCIConfigExpansionROMBase        = 0x30,
  57     kIOPCIConfigCapabilitiesPtr         = 0x34,
  58     kIOPCIConfigInterruptLine           = 0x3C,
  59     kIOPCIConfigInterruptPin            = 0x3D,
  60     kIOPCIConfigMinimumGrant            = 0x3E,
  61     kIOPCIConfigMaximumLatency          = 0x3F
  62 };
  63
  64 /* Definitions of Capabilities PCI Config Register */
  65 enum {
  66     kIOPCICapabilityIDOffset            = 0x00,
  67     kIOPCINextCapabilityOffset          = 0x01,
  68     kIOPCIPowerManagementCapability     = 0x01,
  69     kIOPCIAGPCapability                 = 0x02
  70 };
  71
  72 /* Space definitions */
  73 enum {
  74     kIOPCIConfigSpace           = 0,
  75     kIOPCIIOSpace               = 1,
  76     kIOPCI32BitMemorySpace      = 2,
  77     kIOPCI64BitMemorySpace      = 3
  78 };
  79
  80 /* Command register definitions */
  81 enum {
  82     kIOPCICommandIOSpace                = 0x0001,
  83     kIOPCICommandMemorySpace            = 0x0002,
  84     kIOPCICommandBusMaster              = 0x0004,
  85     kIOPCICommandSpecialCycles          = 0x0008,
  86     kIOPCICommandMemWrInvalidate        = 0x0010,
  87     kIOPCICommandPaletteSnoop           = 0x0020,
  88     kIOPCICommandParityError            = 0x0040,
  89     kIOPCICommandAddressStepping        = 0x0080,
  90     kIOPCICommandSERR                   = 0x0100,
  91     kIOPCICommandFastBack2Back          = 0x0200
  92 };
  93
  94 /* Status register definitions */
  95 enum {
  96     kIOPCIStatusCapabilities            = 0x0010,
  97     kIOPCIStatusPCI66                   = 0x0020,
  98     kIOPCIStatusUDF                     = 0x0040,
  99     kIOPCIStatusFastBack2Back           = 0x0080,
 100     kIOPCIStatusDevSel0                 = 0x0000,
 101     kIOPCIStatusDevSel1                 = 0x0200,
 102     kIOPCIStatusDevSel2                 = 0x0400,
 103     kIOPCIStatusDevSel3                 = 0x0600,
 104     kIOPCIStatusTargetAbortCapable      = 0x0800,
 105     kIOPCIStatusTargetAbortActive       = 0x1000,
 106     kIOPCIStatusMasterAbortActive       = 0x2000,
 107     kIOPCIStatusSERRActive              = 0x4000,
 108     kIOPCIStatusParityErrActive         = 0x8000
 109 };
 110
 111 union IOPCIAddressSpace {
 112     UInt32              bits;
 113     struct {
 114 #if __BIG_ENDIAN__
 115         unsigned int    reloc:1;
 116         unsigned int    prefetch:1;
 117         unsigned int    t:1;
 118         unsigned int    resv:3;
 119         unsigned int    space:2;
 120         unsigned int    busNum:8;
 121         unsigned int    deviceNum:5;
 122         unsigned int    functionNum:3;
 123         unsigned int    registerNum:8;
 124 #elif __LITTLE_ENDIAN__
 125         unsigned int    registerNum:8;
 126         unsigned int    functionNum:3;
 127         unsigned int    deviceNum:5;
 128         unsigned int    busNum:8;
 129         unsigned int    space:2;
 130         unsigned int    resv:3;
 131         unsigned int    t:1;
 132         unsigned int    prefetch:1;
 133         unsigned int    reloc:1;
 134 #endif
 135     } s;
 136 };
 137
 138 struct IOPCIPhysicalAddress {
 139     IOPCIAddressSpace   physHi;
 140     UInt32              physMid;
 141     UInt32              physLo;
 142     UInt32              lengthHi;
 143     UInt32              lengthLo;
 144 };
 145
 146 // IOPCIDevice matching property names
 147 #define kIOPCIMatchKey                  "IOPCIMatch"
 148 #define kIOPCIPrimaryMatchKey           "IOPCIPrimaryMatch"
 149 #define kIOPCISecondaryMatchKey         "IOPCISecondaryMatch"
 150 #define kIOPCIClassMatchKey             "IOPCIClassMatch"
 151
 152 // property to control PCI default config space save on sleep
 153 #define kIOPMPCIConfigSpaceVolatileKey  "IOPMPCIConfigSpaceVolatile"
 154
 155 enum {
 156     kIOPCIDevicePowerStateCount = 3,
 157     kIOPCIDeviceOffState        = 0,
 158     kIOPCIDeviceOnState         = 2
 159 };
 160
 161 /*! @class IOPCIDevice : public IOService
 162     @abstract An IOService class representing a PCI device.
 163     @discussion The discovery of an PCI device by the PCI bus family results in an instance of the IOPCIDevice being created and published. It provides services for looking up and mapping memory mapped hardware, and access to the PCI configuration and I/O spaces.
 164
 165 <br><br>Matching Supported by IOPCIDevice<br><br>
 166
 167 Two types of matching are available, OpenFirmware name matching and PCI register matching. Currently, only one of these two matching schemes can be used in the same property table.
 168
 169 <br><br>OpenFirmware Name Matching<br><br>
 170
 171 IOService performs matching based on the IONameMatch property (see IOService). IOPCIDevices created with OpenFirmware device tree entries will name match based on the standard OpenFirmware name matching properties.
 172
 173 <br><br>PCI Register Matching<br><br>
 174
 175 A PCI device driver can also match on the values of certain config space registers.
 176
 177 In each case, several matching values can be specified, and an optional mask for the value of the config space register may follow the value, preceded by an '&' character.
 178 <br>
 179 <br>
 180         kIOPCIMatchKey, "IOPCIMatch"
 181 <br>
 182 The kIOPCIMatchKey property matches the vendor and device ID (0x00) register, or the subsystem register (0x2c).
 183 <br>
 184 <br>
 185         kIOPCIPrimaryMatchKey, "IOPCIPrimaryMatch"
 186 <br>
 187 The kIOPCIPrimaryMatchKey property matches the vendor and device ID (0x00) register.
 188 <br>
 189 <br>
 190         kIOPCISecondaryMatchKey, "IOPCISecondaryMatch"
 191 <br>
 192 The kIOPCISecondaryMatchKey property matches the subsystem register (0x2c).
 193 <br>
 194 <br>
 195         kIOPCIClassMatchKey, "IOPCIClassMatch"
 196 <br>
 197 The kIOPCIClassMatchKey property matches the class code register (0x08). The default mask for this register is 0xffffff00.
 198 <br>
 199 <br>
 200 Examples:
 201 <br>
 202 <br>
 203       &ltkey&gtIOPCIMatch&lt/key&gt             <br>
 204         &ltstring&gt0x00261011&lt/string&gt
 205 <br>
 206 Matches a device whose vendor ID is 0x1011, and device ID is 0x0026, including subsystem IDs.
 207 <br>
 208 <br>
 209       &ltkey&gtIOPCIMatch&lt/key&gt             <br>
 210         &ltstring&gt0x00789004&0x00ffffff 0x78009004&0x0xff00ffff&lt/string&gt
 211 <br>
 212 Matches with any device with a vendor ID of 0x9004, and a device ID of 0xzz78 or 0x78zz, where 'z' is don't care.
 213 <br>
 214 <br>
 215       &ltkey&gtIOPCIClassMatch&lt/key&gt        <br>
 216         &ltstring&gt0x02000000&0xffff0000&lt/string&gt
 217 <br>
 218 <br>
 219 Matches a device whose class code is 0x0200zz, an ethernet device.
 220
 221 */
 222
 223 class IOPCIDevice : public IOService
 224 {
 225     OSDeclareDefaultStructors(IOPCIDevice)
 226
 227     friend class IOPCIBridge;
 228     friend class IOPCI2PCIBridge;
 229
 230 protected:
 231     IOPCIBridge *       parent;
 232     IOMemoryMap *       ioMap;
 233     OSObject *          slotNameProperty;
 234
 235 /*! @struct ExpansionData
 236     @discussion This structure will be used to expand the capablilties of the IOWorkLoop in the future.
 237     */
 238     struct ExpansionData { };
 239
 240 /*! @var reserved
 241     Reserved for future use.  (Internal use only)  */
 242     ExpansionData *reserved;
 243
 244 public:
 245     IOPCIAddressSpace   space;
 246     UInt32      *       savedConfig;
 247
 248 public:
 249     /* IOService/IORegistryEntry methods */
 250
 251     virtual bool attach( IOService * provider );
 252     virtual void detach( IOService * provider );
 253     virtual IOReturn setPowerState( unsigned long, IOService * );
 254     virtual bool compareName( OSString * name, OSString ** matched = 0 ) const;
 255     virtual bool matchPropertyTable( OSDictionary *     table,
 256                                      SInt32       *     score );
 257     virtual IOService * matchLocation( IOService * client );
 258     virtual IOReturn getResources( void );
 259
 260     /* Config space accessors */
 261
 262     virtual UInt32 configRead32( IOPCIAddressSpace space, UInt8 offset );
 263     virtual void configWrite32( IOPCIAddressSpace space,
 264                                         UInt8 offset, UInt32 data );
 265     virtual UInt16 configRead16( IOPCIAddressSpace space, UInt8 offset );
 266     virtual void configWrite16( IOPCIAddressSpace space,
 267                                         UInt8 offset, UInt16 data );
 268     virtual UInt8 configRead8( IOPCIAddressSpace space, UInt8 offset );
 269     virtual void configWrite8( IOPCIAddressSpace space,
 270                                         UInt8 offset, UInt8 data );
 271
 272 /*! @function configRead32
 273     @abstract Reads a 32-bit value from the PCI device's configuration space.
 274     @discussion This method reads a 32-bit configuration space register on the device and returns its value.
 275     @param offset An 8-bit offset into configuration space, of which bits 0-1 are ignored.
 276     @result An 32-bit value in host byte order (big endian on PPC). */
 277
 278     virtual UInt32 configRead32( UInt8 offset );
 279
 280 /*! @function configRead16
 281     @abstract Reads a 16-bit value from the PCI device's configuration space.
 282     @discussion This method reads a 16-bit configuration space register on the device and returns its value.
 283     @param offset An 8-bit offset into configuration space, of which bit 0 is ignored.
 284     @result An 16-bit value in host byte order (big endian on PPC). */
 285
 286     virtual UInt16 configRead16( UInt8 offset );
 287
 288 /*! @function configRead8
 289     @abstract Reads a 8-bit value from the PCI device's configuration space.
 290     @discussion This method reads a 8-bit configuration space register on the device and returns its value.
 291     @param offset An 8-bit offset into configuration space.
 292     @result An 8-bit value. */
 293
 294     virtual UInt8 configRead8( UInt8 offset );
 295
 296 /*! @function configWrite32
 297     @abstract Writes a 32-bit value to the PCI device's configuration space.
 298     @discussion This method write a 32-bit value to a configuration space register on the device.
 299     @param offset An 8-bit offset into configuration space, of which bits 0-1 are ignored.
 300     @param data An 32-bit value to be written in host byte order (big endian on PPC). */
 301
 302     virtual void configWrite32( UInt8 offset, UInt32 data );
 303
 304 /*! @function configWrite16
 305     @abstract Writes a 16-bit value to the PCI device's configuration space.
 306     @discussion This method write a 16-bit value to a configuration space register on the device.
 307     @param offset An 8-bit offset into configuration space, of which bit 0 is ignored.
 308     @param data An 16-bit value to be written in host byte order (big endian on PPC). */
 309
 310     virtual void configWrite16( UInt8 offset, UInt16 data );
 311
 312 /*! @function configWrite8
 313     @abstract Writes a 8-bit value to the PCI device's configuration space.
 314     @discussion This method write a 8-bit value to a configuration space register on the device.
 315     @param offset An 8-bit offset into configuration space.
 316     @param data An 8-bit value to be written. */
 317
 318     virtual void configWrite8( UInt8 offset, UInt8 data );
 319
 320     virtual IOReturn saveDeviceState( IOOptionBits options = 0 );
 321     virtual IOReturn restoreDeviceState( IOOptionBits options = 0 );
 322
 323 /*! @function setConfigBits
 324     @abstract Sets masked bits in a configuration space register.
 325     @discussion This method sets masked bits in a configuration space register on the device by reading and writing the register. The value of the masked bits before the write is returned.
 326     @param offset An 8-bit offset into configuration space, of which bits 0-1 are ignored.
 327     @param mask An 32-bit mask indicating which bits in the value parameter are valid.
 328     @param data An 32-bit value to be written in host byte order (big endian on PPC).
 329     @result The value of the register masked with the mask before the write. */
 330
 331     virtual UInt32 setConfigBits( UInt8 offset, UInt32 mask, UInt32 value );
 332
 333 /*! @function setMemoryEnable
 334     @abstract Sets the device's memory space response.
 335     @discussion This method sets the memory space response bit in the device's command config space register to the passed value, and returns the previous state of the enable.
 336     @param enable True or false to enable or disable the memory space response.
 337     @result True if the memory space response was previously enabled, false otherwise. */
 338
 339     virtual bool setMemoryEnable( bool enable );
 340
 341 /*! @function setIOEnable
 342     @abstract Sets the device's I/O space response.
 343     @discussion This method sets the I/O space response bit in the device's command config space register to the passed value, and returns the previous state of the enable. The exclusive option allows only one exclusive device on the bus to be enabled concurrently, this should be only for temporary access.
 344     @param enable True or false to enable or disable the I/O space response.
 345     @param exclusive If true, only one setIOEnable with the exclusive flag set will be allowed at a time on the bus, this should be only for temporary access.
 346     @result True if the I/O space response was previously enabled, false otherwise. */
 347
 348     virtual bool setIOEnable( bool enable, bool exclusive = false );
 349
 350 /*! @function setBusMasterEnable
 351     @abstract Sets the device's bus master enable.
 352     @discussion This method sets the bus master enable bit in the device's command config space register to the passed value, and returns the previous state of the enable.
 353     @param enable True or false to enable or disable bus mastering.
 354     @result True if bus mastering was previously enabled, false otherwise. */
 355
 356     virtual bool setBusMasterEnable( bool enable );
 357
 358 /*! @function findPCICapability
 359     @abstract Search configuration space for a PCI capability register.
 360     @discussion This method searchs the device's config space for a PCI capability register matching the passed capability ID, if the device supports PCI capabilities.
 361     @param capabilityID An 8-bit PCI capability ID.
 362     @param offset An optional pointer to return the offset into config space where the capability was found.
 363     @result The 32-bit value of the capability register if one was found, zero otherwise. */
 364
 365     virtual UInt32 findPCICapability( UInt8 capabilityID, UInt8 * offset = 0 );
 366
 367 /*! @function getBusNumber
 368     @abstract Accessor to return the PCI device's assigned bus number.
 369     @discussion This method is an accessor to return the PCI device's assigned bus number.
 370     @result The 8-bit value of device's PCI bus number. */
 371
 372     virtual UInt8 getBusNumber( void );
 373
 374 /*! @function getDeviceNumber
 375     @abstract Accessor to return the PCI device's device number.
 376     @discussion This method is an accessor to return the PCI device's device number.
 377     @result The 5-bit value of device's device number. */
 378
 379     virtual UInt8 getDeviceNumber( void );
 380
 381 /*! @function getFunctionNumber
 382     @abstract Accessor to return the PCI device's function number.
 383     @discussion This method is an accessor to return the PCI device's function number.
 384     @result The 3-bit value of device's function number. */
 385
 386     virtual UInt8 getFunctionNumber( void );
 387
 388     /* Device memory accessors */
 389
 390 /*! @function getDeviceMemoryWithRegister
 391     @abstract Returns an instance of IODeviceMemory representing one of the device's memory mapped ranges.
 392     @discussion This method will return a pointer to an instance of IODeviceMemory for the physical memory range that was assigned to the configuration space base address register passed in. It is analogous to IOService::getDeviceMemoryWithIndex.
 393     @param reg The 8-bit configuration space register that is the base address register for the desired range.
 394     @result A pointer to an instance of IODeviceMemory, or zero no such range was found. The IODeviceMemory is retained by the provider, so is valid while attached, or while any mappings to it exist. It should not be released by the caller. */
 395
 396     virtual IODeviceMemory * getDeviceMemoryWithRegister( UInt8 reg );
 397
 398 /*! @function mapDeviceMemoryWithRegister
 399     @abstract Maps a physical range of the device.
 400     @discussion This method will create a mapping for the IODeviceMemory for the physical memory range that was assigned to the configuration space base address register passed in, with IODeviceMemory::map(options). The mapping is represented by the returned instance of IOMemoryMap, which should not be released until the mapping is no longer required. This method is analogous to IOService::mapDeviceMemoryWithIndex.
 401     @param reg The 8-bit configuration space register that is the base address register for the desired range.
 402     @param options Options to be passed to the IOMemoryDescriptor::map() method.
 403     @result An instance of IOMemoryMap, or zero if the index is beyond the count available. The mapping should be released only when access to it is no longer required. */
 404
 405     virtual IOMemoryMap * mapDeviceMemoryWithRegister( UInt8 reg,
 406                                                 IOOptionBits options = 0 );
 407
 408 /*! @function ioDeviceMemory
 409     @abstract Accessor to the I/O space aperture for the bus.
 410     @discussion This method will return a reference to the IODeviceMemory for the I/O aperture of the bus the device is on.
 411     @result A pointer to an IODeviceMemory object for the I/O aperture. The IODeviceMemory is retained by the provider, so is valid while attached, or while any mappings to it exist. It should not be released by the caller. */
 412
 413     virtual IODeviceMemory * ioDeviceMemory( void );
 414
 415     /* I/O space accessors */
 416
 417 /*! @function ioWrite32
 418     @abstract Writes a 32-bit value to an I/O space aperture.
 419     @discussion This method will write a 32-bit value to a 4 byte aligned offset in an I/O space aperture. If a map object is passed in, the value is written relative to it, otherwise to the value is written relative to the I/O space aperture for the bus. This function encapsulates the differences between architectures in generating I/O space operations. An eieio instruction is included on PPC.
 420     @param offset An offset into a bus or device's I/O space aperture.
 421     @param value The value to be written in host byte order (big endian on PPC).
 422     @param map If the offset is relative to the beginning of a device's aperture, an IOMemoryMap object for that object should be passed in. Otherwise, passing zero will write the value relative to the beginning of the bus' I/O space. */
 423
 424     virtual void ioWrite32( UInt16 offset, UInt32 value,
 425                                 IOMemoryMap * map = 0 );
 426
 427 /*! @function ioWrite16
 428     @abstract Writes a 16-bit value to an I/O space aperture.
 429     @discussion This method will write a 16-bit value to a 2 byte aligned offset in an I/O space aperture. If a map object is passed in, the value is written relative to it, otherwise to the value is written relative to the I/O space aperture for the bus. This function encapsulates the differences between architectures in generating I/O space operations. An eieio instruction is included on PPC.
 430     @param offset An offset into a bus or device's I/O space aperture.
 431     @param value The value to be written in host byte order (big endian on PPC).
 432     @param map If the offset is relative to the beginning of a device's aperture, an IOMemoryMap object for that object should be passed in. Otherwise, passing zero will write the value relative to the beginning of the bus' I/O space. */
 433
 434     virtual void ioWrite16( UInt16 offset, UInt16 value,
 435                                 IOMemoryMap * map = 0 );
 436
 437 /*! @function ioWrite8
 438     @abstract Writes a 8-bit value to an I/O space aperture.
 439     @discussion This method will write a 8-bit value to an offset in an I/O space aperture. If a map object is passed in, the value is written relative to it, otherwise to the value is written relative to the I/O space aperture for the bus. This function encapsulates the differences between architectures in generating I/O space operations. An eieio instruction is included on PPC.
 440     @param offset An offset into a bus or device's I/O space aperture.
 441     @param value The value to be written in host byte order (big endian on PPC).
 442     @param map If the offset is relative to the beginning of a device's aperture, an IOMemoryMap object for that object should be passed in. Otherwise, passing zero will write the value relative to the beginning of the bus' I/O space. */
 443
 444     virtual void ioWrite8( UInt16 offset, UInt8 value,
 445                                 IOMemoryMap * map = 0 );
 446
 447 /*! @function ioRead32
 448     @abstract Reads a 32-bit value from an I/O space aperture.
 449     @discussion This method will read a 32-bit value from a 4 byte aligned offset in an I/O space aperture. If a map object is passed in, the value is read relative to it, otherwise to the value is read relative to the I/O space aperture for the bus. This function encapsulates the differences between architectures in generating I/O space operations. An eieio instruction is included on PPC.
 450     @param offset An offset into a bus or device's I/O space aperture.
 451     @param map If the offset is relative to the beginning of a device's aperture, an IOMemoryMap object for that object should be passed in. Otherwise, passing zero will write the value relative to the beginning of the bus' I/O space.
 452     @result The value read in host byte order (big endian on PPC). */
 453
 454     virtual UInt32 ioRead32( UInt16 offset, IOMemoryMap * map = 0 );
 455
 456 /*! @function ioRead16
 457     @abstract Reads a 16-bit value from an I/O space aperture.
 458     @discussion This method will read a 16-bit value from a 2 byte aligned offset in an I/O space aperture. If a map object is passed in, the value is read relative to it, otherwise to the value is read relative to the I/O space aperture for the bus. This function encapsulates the differences between architectures in generating I/O space operations. An eieio instruction is included on PPC.
 459     @param offset An offset into a bus or device's I/O space aperture.
 460     @param map If the offset is relative to the beginning of a device's aperture, an IOMemoryMap object for that object should be passed in. Otherwise, passing zero will write the value relative to the beginning of the bus' I/O space.
 461     @result The value read in host byte order (big endian on PPC). */
 462
 463     virtual UInt16 ioRead16( UInt16 offset, IOMemoryMap * map = 0 );
 464
 465 /*! @function ioRead8
 466     @abstract Reads a 8-bit value from an I/O space aperture.
 467     @discussion This method will read a 8-bit value from an offset in an I/O space aperture. If a map object is passed in, the value is read relative to it, otherwise to the value is read relative to the I/O space aperture for the bus. This function encapsulates the differences between architectures in generating I/O space operations. An eieio instruction is included on PPC.
 468     @param offset An offset into a bus or device's I/O space aperture.
 469     @param map If the offset is relative to the beginning of a device's aperture, an IOMemoryMap object for that object should be passed in. Otherwise, passing zero will write the value relative to the beginning of the bus' I/O space.
 470     @result The value read. */
 471
 472     virtual UInt8 ioRead8( UInt16 offset, IOMemoryMap * map = 0 );
 473
 474     // Unused Padding
 475     OSMetaClassDeclareReservedUnused(IOPCIDevice,  0);
 476     OSMetaClassDeclareReservedUnused(IOPCIDevice,  1);
 477     OSMetaClassDeclareReservedUnused(IOPCIDevice,  2);
 478     OSMetaClassDeclareReservedUnused(IOPCIDevice,  3);
 479     OSMetaClassDeclareReservedUnused(IOPCIDevice,  4);
 480     OSMetaClassDeclareReservedUnused(IOPCIDevice,  5);
 481     OSMetaClassDeclareReservedUnused(IOPCIDevice,  6);
 482     OSMetaClassDeclareReservedUnused(IOPCIDevice,  7);
 483     OSMetaClassDeclareReservedUnused(IOPCIDevice,  8);
 484     OSMetaClassDeclareReservedUnused(IOPCIDevice,  9);
 485     OSMetaClassDeclareReservedUnused(IOPCIDevice, 10);
 486     OSMetaClassDeclareReservedUnused(IOPCIDevice, 11);
 487     OSMetaClassDeclareReservedUnused(IOPCIDevice, 12);
 488     OSMetaClassDeclareReservedUnused(IOPCIDevice, 13);
 489     OSMetaClassDeclareReservedUnused(IOPCIDevice, 14);
 490     OSMetaClassDeclareReservedUnused(IOPCIDevice, 15);
 491 };
 492
 493 #endif /* ! _IOKIT_IOPCIDEVICE_H */
 494