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1 /*
2 * Copyright (c) 2000-2004 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
11 *
12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
18 * under the License.
19 *
20 * @APPLE_LICENSE_HEADER_END@
21 */
22 /*
23 * @OSF_COPYRIGHT@
24 */
25
26 #include <debug.h>
27 #include <mach_ldebug.h>
28 #include <mach_kdb.h>
29 #include <mach_kdp.h>
30
31 #include <kern/misc_protos.h>
32 #include <kern/thread.h>
33 #include <kern/processor.h>
34 #include <kern/startup.h>
35 #include <machine/machine_routines.h>
36 #include <ppc/boot.h>
37 #include <ppc/proc_reg.h>
38 #include <ppc/misc_protos.h>
39 #include <ppc/pmap.h>
40 #include <ppc/new_screen.h>
41 #include <ppc/exception.h>
42 #include <ppc/asm.h>
43 #include <ppc/Firmware.h>
44 #include <ppc/savearea.h>
45 #include <ppc/low_trace.h>
46 #include <ppc/Diagnostics.h>
47 #include <ppc/cpu_internal.h>
48 #include <ppc/mem.h>
49 #include <ppc/mappings.h>
50 #include <ppc/locks.h>
51
52 #include <pexpert/pexpert.h>
53
54 extern unsigned int mckFlags;
55 extern vm_offset_t intstack;
56 extern vm_offset_t debstack;
57
58 int pc_trace_buf[1024] = {0};
59 int pc_trace_cnt = 1024;
60
61 extern unsigned int extPatchMCK;
62 extern unsigned int extPatch32;
63 extern unsigned int hwulckPatch_isync;
64 extern unsigned int hwulckPatch_eieio;
65 extern unsigned int hwulckbPatch_isync;
66 extern unsigned int hwulckbPatch_eieio;
67 extern unsigned int mulckPatch_isync;
68 extern unsigned int mulckPatch_eieio;
69 extern unsigned int mulckePatch_isync;
70 extern unsigned int mulckePatch_eieio;
71 extern unsigned int sulckPatch_isync;
72 extern unsigned int sulckPatch_eieio;
73 extern unsigned int rwlesPatch_isync;
74 extern unsigned int rwlesPatch_eieio;
75 extern unsigned int rwldPatch_isync;
76 extern unsigned int rwldPatch_eieio;
77 extern unsigned int retfsectPatch_eieio;
78 extern unsigned int retfsectPatch_isync;
79 extern unsigned int bcopy_nop_if_32bit;
80 extern unsigned int bcopy_nc_nop_if_32bit;
81 extern unsigned int memcpy_nop_if_32bit;
82 extern unsigned int xsum_nop_if_32bit;
83 extern unsigned int uft_nop_if_32bit;
84 extern unsigned int uft_uaw_nop_if_32bit;
85
86 int forcenap = 0;
87 int wcte = 0; /* Non-cache gather timer disabled */
88
89 patch_entry_t patch_table[] = {
90 {&extPatch32, 0x60000000, PATCH_FEATURE, PatchExt32},
91 {&extPatchMCK, 0x60000000, PATCH_PROCESSOR, CPU_SUBTYPE_POWERPC_970},
92 {&hwulckPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
93 {&hwulckPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
94 {&hwulckbPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
95 {&hwulckbPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
96 {&mulckPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
97 {&mulckPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
98 {&mulckePatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
99 {&mulckePatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
100 {&sulckPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
101 {&sulckPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
102 {&rwlesPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
103 {&rwlesPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
104 {&rwldPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
105 {&rwldPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
106 {&bcopy_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32},
107 {&bcopy_nc_nop_if_32bit,0x60000000, PATCH_FEATURE, PatchExt32},
108 {&memcpy_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32},
109 #if !MACH_LDEBUG
110 {&retfsectPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync},
111 {&retfsectPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync},
112 #endif
113 {&xsum_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32},
114 {&uft_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32},
115 {&uft_uaw_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32},
116 {NULL, 0x00000000, PATCH_END_OF_TABLE, 0}
117 };
118
119 /*
120 * Forward definition
121 */
122 void ppc_init(
123 boot_args *args);
124
125 void ppc_init_cpu(
126 struct per_proc_info *proc_info);
127
128 /*
129 * Routine: ppc_init
130 * Function:
131 */
132 void
133 ppc_init(
134 boot_args *args)
135 {
136 unsigned int maxmem;
137 uint64_t xmaxmem;
138 uint64_t newhid;
139 unsigned int cputrace;
140 unsigned int novmx;
141 unsigned int mcksoft;
142 thread_t thread;
143 mapping_t *mp;
144 uint64_t scdata;
145
146
147
148 /*
149 * Setup per_proc info for first cpu.
150 */
151
152 BootProcInfo.cpu_number = 0;
153 BootProcInfo.cpu_flags = 0;
154 BootProcInfo.istackptr = 0; /* we're on the interrupt stack */
155 BootProcInfo.intstack_top_ss = (vm_offset_t)&intstack + INTSTACK_SIZE - FM_SIZE;
156 BootProcInfo.debstack_top_ss = (vm_offset_t)&debstack + KERNEL_STACK_SIZE - FM_SIZE;
157 BootProcInfo.debstackptr = BootProcInfo.debstack_top_ss;
158 BootProcInfo.interrupts_enabled = 0;
159 BootProcInfo.pending_ast = AST_NONE;
160 BootProcInfo.FPU_owner = 0;
161 BootProcInfo.VMX_owner = 0;
162 BootProcInfo.pp_cbfr = console_per_proc_alloc(TRUE);
163 BootProcInfo.rtcPop = 0xFFFFFFFFFFFFFFFFULL;
164 mp = (mapping_t *)BootProcInfo.ppUMWmp;
165 mp->mpFlags = 0x01000000 | mpLinkage | mpPerm | 1;
166 mp->mpSpace = invalSpace;
167
168 thread_bootstrap();
169
170 thread = current_thread();
171 thread->machine.curctx = &thread->machine.facctx;
172 thread->machine.facctx.facAct = thread;
173 thread->machine.umwSpace = invalSpace; /* Initialize user memory window space to invalid */
174 thread->machine.preemption_count = 1;
175
176 cpu_bootstrap();
177 cpu_init();
178
179 master_cpu = 0;
180 processor_bootstrap();
181
182 timer_switch((uint32_t)mach_absolute_time(), &thread->system_timer);
183
184 static_memory_end = round_page(args->topOfKernelData);;
185
186 PE_init_platform(FALSE, args); /* Get platform expert set up */
187
188 if (!PE_parse_boot_arg("novmx", &novmx)) novmx=0; /* Special run without VMX? */
189 if(novmx) { /* Yeah, turn it off */
190 BootProcInfo.pf.Available &= ~pfAltivec; /* Turn off Altivec available */
191 __asm__ volatile("mtsprg 2,%0" : : "r" (BootProcInfo.pf.Available)); /* Set live value */
192 }
193
194 if (!PE_parse_boot_arg("fn", &forcenap)) forcenap = 0; /* If force nap not set, make 0 */
195 else {
196 if(forcenap < 2) forcenap = forcenap + 1; /* Else set 1 for off, 2 for on */
197 else forcenap = 0; /* Clear for error case */
198 }
199
200 if (!PE_parse_boot_arg("diag", &dgWork.dgFlags)) dgWork.dgFlags=0; /* Set diagnostic flags */
201 if (!PE_parse_boot_arg("lcks", &LcksOpts)) LcksOpts=0; /* Set lcks options */
202 if(dgWork.dgFlags & enaExpTrace) trcWork.traceMask = 0xFFFFFFFF; /* If tracing requested, enable it */
203
204 if(PE_parse_boot_arg("ctrc", &cputrace)) { /* See if tracing is limited to a specific cpu */
205 trcWork.traceMask = (trcWork.traceMask & 0xFFFFFFF0) | (cputrace & 0xF); /* Limit to 4 */
206 }
207
208 if(!PE_parse_boot_arg("tb", &trcWork.traceSize)) { /* See if non-default trace buffer size */
209 #if DEBUG
210 trcWork.traceSize = 32; /* Default 32 page trace table for DEBUG */
211 #else
212 trcWork.traceSize = 8; /* Default 8 page trace table for RELEASE */
213 #endif
214 }
215
216 if(trcWork.traceSize < 1) trcWork.traceSize = 1; /* Minimum size of 1 page */
217 if(trcWork.traceSize > 256) trcWork.traceSize = 256; /* Maximum size of 256 pages */
218 trcWork.traceSize = trcWork.traceSize * 4096; /* Change page count to size */
219
220 if (!PE_parse_boot_arg("maxmem", &maxmem))
221 xmaxmem=0;
222 else
223 xmaxmem = (uint64_t)maxmem * (1024 * 1024);
224
225 if (!PE_parse_boot_arg("wcte", &wcte)) wcte = 0; /* If write combine timer enable not supplied, make 1 */
226 else wcte = (wcte != 0); /* Force to 0 or 1 */
227
228 if (!PE_parse_boot_arg("mcklog", &mckFlags)) mckFlags = 0; /* If machine check flags not specified, clear */
229 else if(mckFlags > 1) mckFlags = 0; /* If bogus, clear */
230
231 if (!PE_parse_boot_arg("ht_shift", &hash_table_shift)) /* should we use a non-default hash table size? */
232 hash_table_shift = 0; /* no, use default size */
233
234 /*
235 * VM initialization, after this we're using page tables...
236 */
237
238 ppc_vm_init(xmaxmem, args);
239
240 if(BootProcInfo.pf.Available & pf64Bit) { /* Are we on a 64-bit machine */
241
242 if(!wcte) {
243 (void)ml_scom_read(GUSModeReg << 8, &scdata); /* Get GUS mode register */
244 scdata = scdata | GUSMstgttoff; /* Disable the NCU store gather timer */
245 (void)ml_scom_write(GUSModeReg << 8, scdata); /* Get GUS mode register */
246 }
247
248 if(PE_parse_boot_arg("mcksoft", &mcksoft)) { /* Have they supplied "machine check software recovery? */
249 newhid = BootProcInfo.pf.pfHID5; /* Get the old HID5 */
250 if(mcksoft < 2) {
251 newhid &= 0xFFFFFFFFFFFFDFFFULL; /* Clear the old one */
252 newhid |= (mcksoft & 1) << 13; /* Set new value to enable machine check recovery */
253 BootProcInfo.pf.pfHID5 = newhid; /* Set the new one */
254 hid5set64(newhid); /* Set the hid for this processir */
255 }
256 }
257 }
258
259 PE_init_platform(TRUE, args);
260
261 machine_startup(args);
262 }
263
264 /*
265 * Routine: ppc_init_cpu
266 * Function:
267 */
268 void
269 ppc_init_cpu(
270 struct per_proc_info *proc_info)
271 {
272 uint64_t scdata;
273
274 proc_info->cpu_flags &= ~SleepState;
275
276 if((BootProcInfo.pf.Available & pf64Bit) && !wcte) { /* Should we disable the store gather timer? */
277 (void)ml_scom_read(GUSModeReg << 8, &scdata); /* Get GUS mode register */
278 scdata = scdata | GUSMstgttoff; /* Disable the NCU store gather timer */
279 (void)ml_scom_write(GUSModeReg << 8, scdata); /* Get GUS mode register */
280 }
281
282 cpu_init();
283
284 slave_main();
285 }