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2 * Copyright (c) 2007-2017 Apple Inc. All rights reserved.
3 * Copyright (c) 2005-2006 Apple Computer, Inc. All rights reserved.
5 #ifndef _PEXPERT_ARM_BOARD_CONFIG_H
6 #define _PEXPERT_ARM_BOARD_CONFIG_H
8 #ifdef ARM64_BOARD_CONFIG_S5L8960X
9 #define APPLE_ARM64_ARCH_FAMILY 1
11 #define ARM_ARCH_TIMER
12 #include <pexpert/arm64/S5L8960X.h>
13 #define __ARM_L2CACHE_SIZE_LOG__ 20
14 #define ARM_BOARD_WFE_TIMEOUT_NS 1000
15 #define ARM_BOARD_CLASS_S5L8960X
16 #define KERNEL_INTEGRITY_WT 1
17 #define PEXPERT_NO_3X_IMAGES 1
18 #endif /* ARM64_BOARD_CONFIG_S5L8960X */
20 #ifdef ARM64_BOARD_CONFIG_T7000
21 #define APPLE_ARM64_ARCH_FAMILY 1
23 #define ARM_ARCH_TIMER
24 #include <pexpert/arm64/T7000.h>
25 #define __ARM_L2CACHE_SIZE_LOG__ 20
26 #define ARM_BOARD_WFE_TIMEOUT_NS 1000
27 #define ARM_BOARD_CLASS_T7000
28 #define KERNEL_INTEGRITY_WT 1
29 #endif /* ARM64_BOARD_CONFIG_T7000 */
31 #ifdef ARM64_BOARD_CONFIG_T7001
32 #define APPLE_ARM64_ARCH_FAMILY 1
34 #define ARM_ARCH_TIMER
35 #include <pexpert/arm64/T7000.h>
36 #define __ARM_L2CACHE_SIZE_LOG__ 21
37 #define ARM_BOARD_WFE_TIMEOUT_NS 1000
38 #define ARM_BOARD_CLASS_T7000
39 #define KERNEL_INTEGRITY_WT 1
41 #endif /* ARM64_BOARD_CONFIG_T7001 */
43 #ifdef ARM64_BOARD_CONFIG_S8000
45 * The L2 size for twister is in fact 3MB, not 4MB; we round up due
46 * to the code being architected for power of 2 cache sizes, and rely
47 * on the expected behavior that out of bounds operations will be
50 #define APPLE_ARM64_ARCH_FAMILY 1
52 #define ARM_ARCH_TIMER
53 #include <pexpert/arm64/S8000.h>
54 #define __ARM_L2CACHE_SIZE_LOG__ 22
55 #define ARM_BOARD_WFE_TIMEOUT_NS 1000
56 #define ARM_BOARD_CLASS_S8000
57 #define KERNEL_INTEGRITY_WT 1
58 #endif /* ARM64_BOARD_CONFIG_S8000 */
60 #ifdef ARM64_BOARD_CONFIG_S8001
62 * The L2 size for twister is in fact 3MB, not 4MB; we round up due
63 * to the code being architected for power of 2 cache sizes, and rely
64 * on the expect behavior that out of bounds operations will be
67 #define APPLE_ARM64_ARCH_FAMILY 1
69 #define ARM_ARCH_TIMER
70 #include <pexpert/arm64/S8000.h>
71 #define __ARM_L2CACHE_SIZE_LOG__ 22
72 #define ARM_BOARD_WFE_TIMEOUT_NS 1000
73 #define ARM_BOARD_CLASS_S8000
74 #define KERNEL_INTEGRITY_WT 1
75 #endif /* ARM64_BOARD_CONFIG_S8001 */
77 #ifdef ARM64_BOARD_CONFIG_T8010
79 * The L2 size for hurricane/zephyr is in fact 3MB, not 4MB; we round up due
80 * to the code being architected for power of 2 cache sizes, and rely
81 * on the expect behavior that out of bounds operations will be
84 #define APPLE_ARM64_ARCH_FAMILY 1
85 #define APPLEHURRICANE
86 #define ARM_ARCH_TIMER
87 #include <pexpert/arm64/T8010.h>
88 #define __ARM_L2CACHE_SIZE_LOG__ 22
89 #define ARM_BOARD_WFE_TIMEOUT_NS 1000
90 #define ARM_BOARD_CLASS_T8010
91 #endif /* ARM64_BOARD_CONFIG_T8010 */
93 #ifdef ARM64_BOARD_CONFIG_T8011
94 #define APPLE_ARM64_ARCH_FAMILY 1
95 #define APPLEHURRICANE
96 #define ARM_ARCH_TIMER
97 #include <pexpert/arm64/T8010.h>
98 #define __ARM_L2CACHE_SIZE_LOG__ 23
99 #define ARM_BOARD_WFE_TIMEOUT_NS 1000
100 #define ARM_BOARD_CLASS_T8011
102 #endif /* ARM64_BOARD_CONFIG_T8011 */
109 #endif /* ! _PEXPERT_ARM_BOARD_CONFIG_H */