| | 1 | /* |
| | 2 | * cc_runtime_config.h |
| | 3 | * corecrypto |
| | 4 | * |
| | 5 | * Created on 09/18/2012 |
| | 6 | * |
| | 7 | * Copyright (c) 2012,2014,2015 Apple Inc. All rights reserved. |
| | 8 | * |
| | 9 | */ |
| | 10 | |
| | 11 | #ifndef CORECRYPTO_CC_RUNTIME_CONFIG_H_ |
| | 12 | #define CORECRYPTO_CC_RUNTIME_CONFIG_H_ |
| | 13 | |
| | 14 | #include <corecrypto/cc_config.h> |
| | 15 | |
| | 16 | /* Only intel systems have these runtime switches today. */ |
| | 17 | |
| | 18 | #if defined(__x86_64__) || defined(__i386__) |
| | 19 | |
| | 20 | #if CC_KERNEL |
| | 21 | #include <i386/cpuid.h> |
| | 22 | #define CC_HAS_RDRAND() ((cpuid_features() & CPUID_FEATURE_RDRAND) != 0) |
| | 23 | #elif CC_XNU_KERNEL_AVAILABLE |
| | 24 | #include <System/i386/cpu_capabilities.h> |
| | 25 | |
| | 26 | extern int _cpu_capabilities; |
| | 27 | #define CC_HAS_RDRAND() (_cpu_capabilities & kHasRDRAND) |
| | 28 | #else |
| | 29 | #define CC_HAS_RDRAND() 0 |
| | 30 | #endif |
| | 31 | |
| | 32 | #if (CCSHA1_VNG_INTEL || CCSHA2_VNG_INTEL || CCAES_INTEL_ASM) |
| | 33 | |
| | 34 | #if CC_KERNEL |
| | 35 | #include <i386/cpuid.h> |
| | 36 | #define CC_HAS_AESNI() ((cpuid_features() & CPUID_FEATURE_AES) != 0) |
| | 37 | #define CC_HAS_SupplementalSSE3() ((cpuid_features() & CPUID_FEATURE_SSSE3) != 0) |
| | 38 | #define CC_HAS_AVX1() ((cpuid_features() & CPUID_FEATURE_AVX1_0) != 0) |
| | 39 | #define CC_HAS_AVX2() ((cpuid_info()->cpuid_leaf7_features & CPUID_LEAF7_FEATURE_AVX2) != 0) |
| | 40 | #define CC_HAS_AVX512_AND_IN_KERNEL() ((cpuid_info()->cpuid_leaf7_features & CPUID_LEAF7_FEATURE_AVX512F) !=0) |
| | 41 | |
| | 42 | #elif CC_XNU_KERNEL_AVAILABLE |
| | 43 | #include <System/i386/cpu_capabilities.h> |
| | 44 | |
| | 45 | extern int _cpu_capabilities; |
| | 46 | #define CC_HAS_AESNI() (_cpu_capabilities & kHasAES) |
| | 47 | #define CC_HAS_SupplementalSSE3() (_cpu_capabilities & kHasSupplementalSSE3) |
| | 48 | #define CC_HAS_AVX1() (_cpu_capabilities & kHasAVX1_0) |
| | 49 | #define CC_HAS_AVX2() (_cpu_capabilities & kHasAVX2_0) |
| | 50 | #define CC_HAS_AVX512_AND_IN_KERNEL() 0 |
| | 51 | #else |
| | 52 | #define CC_HAS_AESNI() 0 |
| | 53 | #define CC_HAS_SupplementalSSE3() 0 |
| | 54 | #define CC_HAS_AVX1() 0 |
| | 55 | #define CC_HAS_AVX2() 0 |
| | 56 | #define CC_HAS_AVX512_AND_IN_KERNEL() 0 |
| | 57 | #endif |
| | 58 | |
| | 59 | #endif // (CCSHA1_VNG_INTEL || CCSHA2_VNG_INTEL || CCAES_INTEL_ASM) |
| | 60 | |
| | 61 | #endif // defined(__x86_64__) || defined(__i386__) |
| | 62 | |
| | 63 | #endif /* CORECRYPTO_CC_RUNTIME_CONFIG_H_ */ |
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