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1 | /* | |
2 | * Copyright (c) 2000-2005 Apple Computer, Inc. All rights reserved. | |
3 | * | |
4 | * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ | |
5 | * | |
6 | * This file contains Original Code and/or Modifications of Original Code | |
7 | * as defined in and that are subject to the Apple Public Source License | |
8 | * Version 2.0 (the 'License'). You may not use this file except in | |
9 | * compliance with the License. The rights granted to you under the License | |
10 | * may not be used to create, or enable the creation or redistribution of, | |
11 | * unlawful or unlicensed copies of an Apple operating system, or to | |
12 | * circumvent, violate, or enable the circumvention or violation of, any | |
13 | * terms of an Apple operating system software license agreement. | |
14 | * | |
15 | * Please obtain a copy of the License at | |
16 | * http://www.opensource.apple.com/apsl/ and read it before using this file. | |
17 | * | |
18 | * The Original Code and all software distributed under the License are | |
19 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
20 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, | |
21 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
22 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. | |
23 | * Please see the License for the specific language governing rights and | |
24 | * limitations under the License. | |
25 | * | |
26 | * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ | |
27 | */ | |
28 | /* | |
29 | * @OSF_COPYRIGHT@ | |
30 | */ | |
31 | ||
32 | #include <debug.h> | |
33 | #include <mach_ldebug.h> | |
34 | #include <mach_kdb.h> | |
35 | #include <mach_kdp.h> | |
36 | ||
37 | #include <kern/misc_protos.h> | |
38 | #include <kern/thread.h> | |
39 | #include <kern/processor.h> | |
40 | #include <kern/startup.h> | |
41 | #include <machine/machine_routines.h> | |
42 | #include <ppc/boot.h> | |
43 | #include <ppc/proc_reg.h> | |
44 | #include <ppc/misc_protos.h> | |
45 | #include <ppc/pmap.h> | |
46 | #include <ppc/new_screen.h> | |
47 | #include <ppc/exception.h> | |
48 | #include <ppc/asm.h> | |
49 | #include <ppc/Firmware.h> | |
50 | #include <ppc/savearea.h> | |
51 | #include <ppc/low_trace.h> | |
52 | #include <ppc/Diagnostics.h> | |
53 | #include <ppc/cpu_internal.h> | |
54 | #include <ppc/mem.h> | |
55 | #include <ppc/mappings.h> | |
56 | #include <ppc/locks.h> | |
57 | #include <kern/pms.h> | |
58 | #include <ppc/rtclock.h> | |
59 | ||
60 | #include <pexpert/pexpert.h> | |
61 | ||
62 | extern unsigned int mckFlags; | |
63 | extern vm_offset_t intstack; | |
64 | extern vm_offset_t debstack; | |
65 | ||
66 | int pc_trace_buf[1024] = {0}; | |
67 | int pc_trace_cnt = 1024; | |
68 | ||
69 | extern unsigned int extPatchMCK; | |
70 | extern unsigned int extPatch32; | |
71 | extern unsigned int hwulckPatch_isync; | |
72 | extern unsigned int hwulckPatch_eieio; | |
73 | extern unsigned int hwulckbPatch_isync; | |
74 | extern unsigned int hwulckbPatch_eieio; | |
75 | extern unsigned int mulckPatch_isync; | |
76 | extern unsigned int mulckPatch_eieio; | |
77 | extern unsigned int mulckePatch_isync; | |
78 | extern unsigned int mulckePatch_eieio; | |
79 | extern unsigned int sulckPatch_isync; | |
80 | extern unsigned int sulckPatch_eieio; | |
81 | extern unsigned int rwlesPatch_isync; | |
82 | extern unsigned int rwlesPatch_eieio; | |
83 | extern unsigned int rwldPatch_isync; | |
84 | extern unsigned int rwldPatch_eieio; | |
85 | extern unsigned int retfsectPatch_eieio; | |
86 | extern unsigned int retfsectPatch_isync; | |
87 | extern unsigned int bcopy_nop_if_32bit; | |
88 | extern unsigned int bcopy_nc_nop_if_32bit; | |
89 | extern unsigned int memcpy_nop_if_32bit; | |
90 | extern unsigned int xsum_nop_if_32bit; | |
91 | extern unsigned int uft_nop_if_32bit; | |
92 | extern unsigned int uft_uaw_nop_if_32bit; | |
93 | extern unsigned int uft_cuttrace; | |
94 | ||
95 | int forcenap = 0; | |
96 | int wcte = 0; /* Non-cache gather timer disabled */ | |
97 | ||
98 | patch_entry_t patch_table[] = { | |
99 | {&extPatch32, 0x60000000, PATCH_FEATURE, PatchExt32}, | |
100 | {&extPatchMCK, 0x60000000, PATCH_PROCESSOR, CPU_SUBTYPE_POWERPC_970}, | |
101 | {&hwulckPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync}, | |
102 | {&hwulckPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync}, | |
103 | {&hwulckbPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync}, | |
104 | {&hwulckbPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync}, | |
105 | {&mulckPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync}, | |
106 | {&mulckPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync}, | |
107 | {&mulckePatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync}, | |
108 | {&mulckePatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync}, | |
109 | {&sulckPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync}, | |
110 | {&sulckPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync}, | |
111 | {&rwlesPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync}, | |
112 | {&rwlesPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync}, | |
113 | {&rwldPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync}, | |
114 | {&rwldPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync}, | |
115 | {&bcopy_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32}, | |
116 | {&bcopy_nc_nop_if_32bit,0x60000000, PATCH_FEATURE, PatchExt32}, | |
117 | {&memcpy_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32}, | |
118 | #if !MACH_LDEBUG | |
119 | {&retfsectPatch_isync, 0x60000000, PATCH_FEATURE, PatchLwsync}, | |
120 | {&retfsectPatch_eieio, 0x7c2004ac, PATCH_FEATURE, PatchLwsync}, | |
121 | #endif | |
122 | {&xsum_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32}, | |
123 | {&uft_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32}, | |
124 | {&uft_uaw_nop_if_32bit, 0x60000000, PATCH_FEATURE, PatchExt32}, | |
125 | {&uft_cuttrace, 0x60000000, PATCH_FEATURE, PatchExt32}, | |
126 | {NULL, 0x00000000, PATCH_END_OF_TABLE, 0} | |
127 | }; | |
128 | ||
129 | ||
130 | /* | |
131 | * Forward definition | |
132 | */ | |
133 | void ppc_init( | |
134 | boot_args *args); | |
135 | ||
136 | void ppc_init_cpu( | |
137 | struct per_proc_info *proc_info); | |
138 | ||
139 | /* | |
140 | * Routine: ppc_init | |
141 | * Function: | |
142 | */ | |
143 | void | |
144 | ppc_init( | |
145 | boot_args *args) | |
146 | { | |
147 | unsigned int maxmem; | |
148 | uint64_t xmaxmem; | |
149 | uint64_t newhid; | |
150 | unsigned int cputrace; | |
151 | unsigned int novmx; | |
152 | unsigned int mcksoft; | |
153 | thread_t thread; | |
154 | mapping_t *mp; | |
155 | uint64_t scdata; | |
156 | ||
157 | ||
158 | ||
159 | /* | |
160 | * Setup per_proc info for first cpu. | |
161 | */ | |
162 | ||
163 | BootProcInfo.cpu_number = 0; | |
164 | BootProcInfo.cpu_flags = 0; | |
165 | BootProcInfo.istackptr = 0; /* we're on the interrupt stack */ | |
166 | BootProcInfo.intstack_top_ss = (vm_offset_t)&intstack + INTSTACK_SIZE - FM_SIZE; | |
167 | BootProcInfo.debstack_top_ss = (vm_offset_t)&debstack + KERNEL_STACK_SIZE - FM_SIZE; | |
168 | BootProcInfo.debstackptr = BootProcInfo.debstack_top_ss; | |
169 | BootProcInfo.interrupts_enabled = 0; | |
170 | BootProcInfo.pending_ast = AST_NONE; | |
171 | BootProcInfo.FPU_owner = 0; | |
172 | BootProcInfo.VMX_owner = 0; | |
173 | BootProcInfo.pp_cbfr = console_per_proc_alloc(TRUE); | |
174 | BootProcInfo.rtcPop = EndOfAllTime; | |
175 | BootProcInfo.pp2ndPage = (addr64_t)&BootProcInfo; /* Initial physical address of the second page */ | |
176 | ||
177 | BootProcInfo.pms.pmsStamp = 0; /* Dummy transition time */ | |
178 | BootProcInfo.pms.pmsPop = EndOfAllTime; /* Set the pop way into the future */ | |
179 | ||
180 | BootProcInfo.pms.pmsState = pmsParked; /* Park the power stepper */ | |
181 | BootProcInfo.pms.pmsCSetCmd = pmsCInit; /* Set dummy initial hardware state */ | |
182 | ||
183 | mp = (mapping_t *)BootProcInfo.ppUMWmp; | |
184 | mp->mpFlags = 0x01000000 | mpLinkage | mpPerm | 1; | |
185 | mp->mpSpace = invalSpace; | |
186 | ||
187 | pmsInit(); /* Initialize the stepper */ | |
188 | ||
189 | thread_bootstrap(); | |
190 | ||
191 | thread = current_thread(); | |
192 | thread->machine.curctx = &thread->machine.facctx; | |
193 | thread->machine.facctx.facAct = thread; | |
194 | thread->machine.umwSpace = invalSpace; /* Initialize user memory window space to invalid */ | |
195 | thread->machine.preemption_count = 1; | |
196 | ||
197 | cpu_bootstrap(); | |
198 | cpu_init(); | |
199 | ||
200 | master_cpu = 0; | |
201 | processor_bootstrap(); | |
202 | ||
203 | timer_switch((uint32_t)mach_absolute_time(), &thread->system_timer); | |
204 | ||
205 | static_memory_end = round_page(args->topOfKernelData);; | |
206 | ||
207 | PE_init_platform(FALSE, args); /* Get platform expert set up */ | |
208 | ||
209 | if (!PE_parse_boot_arg("novmx", &novmx)) novmx=0; /* Special run without VMX? */ | |
210 | if(novmx) { /* Yeah, turn it off */ | |
211 | BootProcInfo.pf.Available &= ~pfAltivec; /* Turn off Altivec available */ | |
212 | __asm__ volatile("mtsprg 2,%0" : : "r" (BootProcInfo.pf.Available)); /* Set live value */ | |
213 | } | |
214 | ||
215 | if (!PE_parse_boot_arg("fn", &forcenap)) forcenap = 0; /* If force nap not set, make 0 */ | |
216 | else { | |
217 | if(forcenap < 2) forcenap = forcenap + 1; /* Else set 1 for off, 2 for on */ | |
218 | else forcenap = 0; /* Clear for error case */ | |
219 | } | |
220 | ||
221 | if (!PE_parse_boot_arg("pmsx", &pmsExperimental)) pmsExperimental = 0; /* Check if we should start in experimental power management stepper mode */ | |
222 | if (!PE_parse_boot_arg("lcks", &LcksOpts)) LcksOpts = 0; /* Set lcks options */ | |
223 | if (!PE_parse_boot_arg("diag", &dgWork.dgFlags)) dgWork.dgFlags = 0; /* Set diagnostic flags */ | |
224 | if(dgWork.dgFlags & enaExpTrace) trcWork.traceMask = 0xFFFFFFFF; /* If tracing requested, enable it */ | |
225 | ||
226 | if(PE_parse_boot_arg("ctrc", &cputrace)) { /* See if tracing is limited to a specific cpu */ | |
227 | trcWork.traceMask = (trcWork.traceMask & 0xFFFFFFF0) | (cputrace & 0xF); /* Limit to 4 */ | |
228 | } | |
229 | ||
230 | if(!PE_parse_boot_arg("tb", &trcWork.traceSize)) { /* See if non-default trace buffer size */ | |
231 | #if DEBUG | |
232 | trcWork.traceSize = 32; /* Default 32 page trace table for DEBUG */ | |
233 | #else | |
234 | trcWork.traceSize = 8; /* Default 8 page trace table for RELEASE */ | |
235 | #endif | |
236 | } | |
237 | ||
238 | if(trcWork.traceSize < 1) trcWork.traceSize = 1; /* Minimum size of 1 page */ | |
239 | if(trcWork.traceSize > 256) trcWork.traceSize = 256; /* Maximum size of 256 pages */ | |
240 | trcWork.traceSize = trcWork.traceSize * 4096; /* Change page count to size */ | |
241 | ||
242 | if (!PE_parse_boot_arg("maxmem", &maxmem)) | |
243 | xmaxmem=0; | |
244 | else | |
245 | xmaxmem = (uint64_t)maxmem * (1024 * 1024); | |
246 | ||
247 | if (!PE_parse_boot_arg("wcte", &wcte)) wcte = 0; /* If write combine timer enable not supplied, make 1 */ | |
248 | else wcte = (wcte != 0); /* Force to 0 or 1 */ | |
249 | ||
250 | if (!PE_parse_boot_arg("mcklog", &mckFlags)) mckFlags = 0; /* If machine check flags not specified, clear */ | |
251 | else if(mckFlags > 1) mckFlags = 0; /* If bogus, clear */ | |
252 | ||
253 | if (!PE_parse_boot_arg("ht_shift", &hash_table_shift)) /* should we use a non-default hash table size? */ | |
254 | hash_table_shift = 0; /* no, use default size */ | |
255 | ||
256 | /* | |
257 | * VM initialization, after this we're using page tables... | |
258 | */ | |
259 | ||
260 | ppc_vm_init(xmaxmem, args); | |
261 | ||
262 | if(BootProcInfo.pf.Available & pf64Bit) { /* Are we on a 64-bit machine */ | |
263 | ||
264 | if(!wcte) { | |
265 | (void)ml_scom_read(GUSModeReg << 8, &scdata); /* Get GUS mode register */ | |
266 | scdata = scdata | GUSMstgttoff; /* Disable the NCU store gather timer */ | |
267 | (void)ml_scom_write(GUSModeReg << 8, scdata); /* Get GUS mode register */ | |
268 | } | |
269 | ||
270 | if(PE_parse_boot_arg("mcksoft", &mcksoft)) { /* Have they supplied "machine check software recovery? */ | |
271 | newhid = BootProcInfo.pf.pfHID5; /* Get the old HID5 */ | |
272 | if(mcksoft < 2) { | |
273 | newhid &= 0xFFFFFFFFFFFFDFFFULL; /* Clear the old one */ | |
274 | newhid |= (mcksoft & 1) << 13; /* Set new value to enable machine check recovery */ | |
275 | BootProcInfo.pf.pfHID5 = newhid; /* Set the new one */ | |
276 | hid5set64(newhid); /* Set the hid for this processir */ | |
277 | } | |
278 | } | |
279 | } | |
280 | ||
281 | machine_startup(args); | |
282 | } | |
283 | ||
284 | /* | |
285 | * Routine: ppc_init_cpu | |
286 | * Function: | |
287 | */ | |
288 | void | |
289 | ppc_init_cpu( | |
290 | struct per_proc_info *proc_info) | |
291 | { | |
292 | uint64_t scdata; | |
293 | ||
294 | proc_info->cpu_flags &= ~SleepState; | |
295 | ||
296 | if((BootProcInfo.pf.Available & pf64Bit) && !wcte) { /* Should we disable the store gather timer? */ | |
297 | (void)ml_scom_read(GUSModeReg << 8, &scdata); /* Get GUS mode register */ | |
298 | scdata = scdata | GUSMstgttoff; /* Disable the NCU store gather timer */ | |
299 | (void)ml_scom_write(GUSModeReg << 8, scdata); /* Get GUS mode register */ | |
300 | } | |
301 | ||
302 | cpu_init(); | |
303 | ||
304 | slave_main(); | |
305 | } |