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b0d623f7 A |
1 | /* |
2 | * Copyright (c) 2000-2006 Apple Computer, Inc. All rights reserved. | |
3 | * | |
4 | * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ | |
5 | * | |
6 | * This file contains Original Code and/or Modifications of Original Code | |
7 | * as defined in and that are subject to the Apple Public Source License | |
8 | * Version 2.0 (the 'License'). You may not use this file except in | |
9 | * compliance with the License. The rights granted to you under the License | |
10 | * may not be used to create, or enable the creation or redistribution of, | |
11 | * unlawful or unlicensed copies of an Apple operating system, or to | |
12 | * circumvent, violate, or enable the circumvention or violation of, any | |
13 | * terms of an Apple operating system software license agreement. | |
14 | * | |
15 | * Please obtain a copy of the License at | |
16 | * http://www.opensource.apple.com/apsl/ and read it before using this file. | |
17 | * | |
18 | * The Original Code and all software distributed under the License are | |
19 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
20 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, | |
21 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
22 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. | |
23 | * Please see the License for the specific language governing rights and | |
24 | * limitations under the License. | |
25 | * | |
26 | * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ | |
27 | */ | |
28 | /* | |
29 | * @OSF_COPYRIGHT@ | |
30 | */ | |
31 | /* | |
32 | * Mach Operating System | |
33 | * Copyright (c) 1991,1990,1989 Carnegie Mellon University | |
34 | * All Rights Reserved. | |
35 | * | |
36 | * Permission to use, copy, modify and distribute this software and its | |
37 | * documentation is hereby granted, provided that both the copyright | |
38 | * notice and this permission notice appear in all copies of the | |
39 | * software, derivative works or modified versions, and any portions | |
40 | * thereof, and that both notices appear in supporting documentation. | |
41 | * | |
42 | * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" | |
43 | * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR | |
44 | * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. | |
45 | * | |
46 | * Carnegie Mellon requests users of this software to return to | |
47 | * | |
48 | * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU | |
49 | * School of Computer Science | |
50 | * Carnegie Mellon University | |
51 | * Pittsburgh PA 15213-3890 | |
52 | * | |
53 | * any improvements or extensions that they make and grant Carnegie Mellon | |
54 | * the rights to redistribute these changes. | |
55 | */ | |
56 | /* | |
57 | */ | |
58 | #include <mach_assert.h> | |
59 | ||
60 | #include <string.h> | |
61 | #include <mach/boolean.h> | |
62 | #include <mach/i386/vm_types.h> | |
63 | #include <mach/i386/vm_param.h> | |
64 | #include <kern/kern_types.h> | |
65 | #include <kern/misc_protos.h> | |
66 | #include <sys/errno.h> | |
67 | #include <i386/param.h> | |
68 | #include <i386/misc_protos.h> | |
69 | #include <i386/cpu_data.h> | |
70 | #include <i386/machine_routines.h> | |
71 | #include <i386/cpuid.h> | |
72 | #include <i386/vmx.h> | |
73 | #include <vm/pmap.h> | |
74 | #include <vm/vm_map.h> | |
75 | #include <vm/vm_kern.h> | |
76 | #include <vm/vm_fault.h> | |
77 | ||
78 | #include <libkern/OSAtomic.h> | |
79 | #include <sys/kdebug.h> | |
80 | ||
81 | #if 0 | |
82 | ||
83 | #undef KERNEL_DEBUG | |
84 | #define KERNEL_DEBUG KERNEL_DEBUG_CONSTANT | |
85 | #define KDEBUG 1 | |
86 | ||
87 | #endif | |
88 | ||
89 | /* XXX - should be gone from here */ | |
90 | extern void invalidate_icache64(addr64_t addr, unsigned cnt, int phys); | |
91 | extern void flush_dcache64(addr64_t addr, unsigned count, int phys); | |
92 | extern boolean_t phys_page_exists(ppnum_t); | |
93 | extern void bcopy_no_overwrite(const char *from, char *to,vm_size_t bytes); | |
94 | extern void pmap_set_reference(ppnum_t pn); | |
95 | extern void mapping_set_mod(ppnum_t pa); | |
96 | extern void mapping_set_ref(ppnum_t pn); | |
97 | ||
98 | extern void ovbcopy(const char *from, | |
99 | char *to, | |
100 | vm_size_t nbytes); | |
101 | void machine_callstack(natural_t *buf, vm_size_t callstack_max); | |
102 | ||
103 | ||
104 | #define value_64bit(value) ((value) & 0xFFFFFFFF00000000ULL) | |
105 | #define low32(x) ((unsigned int)((x) & 0x00000000FFFFFFFFULL)) | |
106 | ||
107 | #define INT_SIZE (BYTE_SIZE * sizeof (int)) | |
108 | ||
109 | /* | |
110 | * Set indicated bit in bit string. | |
111 | */ | |
112 | void | |
113 | setbit(int bitno, int *s) | |
114 | { | |
115 | s[bitno / INT_SIZE] |= 1 << (bitno % INT_SIZE); | |
116 | } | |
117 | ||
118 | /* | |
119 | * Clear indicated bit in bit string. | |
120 | */ | |
121 | void | |
122 | clrbit(int bitno, int *s) | |
123 | { | |
124 | s[bitno / INT_SIZE] &= ~(1 << (bitno % INT_SIZE)); | |
125 | } | |
126 | ||
127 | /* | |
128 | * Test if indicated bit is set in bit string. | |
129 | */ | |
130 | int | |
131 | testbit(int bitno, int *s) | |
132 | { | |
133 | return s[bitno / INT_SIZE] & (1 << (bitno % INT_SIZE)); | |
134 | } | |
135 | ||
136 | /* | |
137 | * Find first bit set in bit string. | |
138 | */ | |
139 | int | |
140 | ffsbit(int *s) | |
141 | { | |
142 | int offset; | |
143 | ||
144 | for (offset = 0; !*s; offset += (int)INT_SIZE, ++s); | |
145 | return offset + __builtin_ctz(*s); | |
146 | } | |
147 | ||
148 | int | |
149 | ffs(unsigned int mask) | |
150 | { | |
151 | if (mask == 0) | |
152 | return 0; | |
153 | ||
154 | /* | |
155 | * NOTE: cannot use __builtin_ffs because it generates a call to | |
156 | * 'ffs' | |
157 | */ | |
158 | return 1 + __builtin_ctz(mask); | |
159 | } | |
160 | ||
161 | void | |
162 | bzero_phys_nc( | |
163 | addr64_t src64, | |
164 | uint32_t bytes) | |
165 | { | |
166 | bzero_phys(src64,bytes); | |
167 | } | |
168 | ||
169 | void | |
170 | bzero_phys( | |
171 | addr64_t src64, | |
172 | uint32_t bytes) | |
173 | { | |
174 | bzero(PHYSMAP_PTOV(src64), bytes); | |
175 | } | |
176 | ||
177 | ||
178 | /* | |
179 | * bcopy_phys - like bcopy but copies from/to physical addresses. | |
180 | */ | |
181 | ||
182 | void | |
183 | bcopy_phys( | |
184 | addr64_t src64, | |
185 | addr64_t dst64, | |
186 | vm_size_t bytes) | |
187 | { | |
188 | /* Not necessary for K64 - but ensure we stay within a page */ | |
189 | if (((((uint32_t)src64 & (NBPG-1)) + bytes) > NBPG) || | |
190 | ((((uint32_t)dst64 & (NBPG-1)) + bytes) > NBPG) ) { | |
191 | panic("bcopy_phys alignment"); | |
192 | } | |
193 | bcopy(PHYSMAP_PTOV(src64), PHYSMAP_PTOV(dst64), bytes); | |
194 | } | |
195 | ||
6d2010ae A |
196 | /* |
197 | * allow a function to get a quick virtual mapping of a physical page | |
198 | */ | |
199 | ||
200 | int | |
201 | apply_func_phys( | |
202 | addr64_t dst64, | |
203 | vm_size_t bytes, | |
204 | int (*func)(void * buffer, vm_size_t bytes, void * arg), | |
205 | void * arg) | |
206 | { | |
207 | /* Not necessary for K64 - but ensure we stay within a page */ | |
208 | if (((((uint32_t)dst64 & (NBPG-1)) + bytes) > NBPG) ) { | |
209 | panic("apply_func_phys alignment"); | |
210 | } | |
211 | ||
212 | return func(PHYSMAP_PTOV(dst64), bytes, arg); | |
213 | } | |
214 | ||
b0d623f7 A |
215 | /* |
216 | * ovbcopy - like bcopy, but recognizes overlapping ranges and handles | |
217 | * them correctly. | |
218 | */ | |
219 | ||
220 | void | |
221 | ovbcopy( | |
222 | const char *from, | |
223 | char *to, | |
224 | vm_size_t bytes) /* num bytes to copy */ | |
225 | { | |
226 | /* Assume that bcopy copies left-to-right (low addr first). */ | |
227 | if (from + bytes <= to || to + bytes <= from || to == from) | |
228 | bcopy_no_overwrite(from, to, bytes); /* non-overlapping or no-op*/ | |
229 | else if (from > to) | |
230 | bcopy_no_overwrite(from, to, bytes); /* overlapping but OK */ | |
231 | else { | |
232 | /* to > from: overlapping, and must copy right-to-left. */ | |
233 | from += bytes - 1; | |
234 | to += bytes - 1; | |
235 | while (bytes-- > 0) | |
236 | *to-- = *from--; | |
237 | } | |
238 | } | |
239 | ||
240 | ||
241 | /* | |
242 | * Read data from a physical address. Memory should not be cache inhibited. | |
243 | */ | |
244 | ||
245 | ||
6d2010ae | 246 | static inline unsigned int |
b0d623f7 A |
247 | ml_phys_read_data(pmap_paddr_t paddr, int size) |
248 | { | |
249 | unsigned int result; | |
250 | ||
251 | switch (size) { | |
252 | unsigned char s1; | |
253 | unsigned short s2; | |
254 | case 1: | |
255 | s1 = *(unsigned char *)PHYSMAP_PTOV(paddr); | |
256 | result = s1; | |
257 | break; | |
258 | case 2: | |
259 | s2 = *(unsigned short *)PHYSMAP_PTOV(paddr); | |
260 | result = s2; | |
261 | break; | |
262 | case 4: | |
263 | default: | |
264 | result = *(unsigned int *)PHYSMAP_PTOV(paddr); | |
265 | break; | |
266 | } | |
267 | ||
268 | return result; | |
269 | } | |
270 | ||
271 | static unsigned long long | |
272 | ml_phys_read_long_long(pmap_paddr_t paddr ) | |
273 | { | |
274 | return *(unsigned long long *)PHYSMAP_PTOV(paddr); | |
275 | } | |
276 | ||
b0d623f7 A |
277 | unsigned int ml_phys_read( vm_offset_t paddr) |
278 | { | |
279 | return ml_phys_read_data((pmap_paddr_t)paddr, 4); | |
280 | } | |
281 | ||
282 | unsigned int ml_phys_read_word(vm_offset_t paddr) { | |
283 | ||
284 | return ml_phys_read_data((pmap_paddr_t)paddr, 4); | |
285 | } | |
286 | ||
287 | unsigned int ml_phys_read_64(addr64_t paddr64) | |
288 | { | |
289 | return ml_phys_read_data((pmap_paddr_t)paddr64, 4); | |
290 | } | |
291 | ||
292 | unsigned int ml_phys_read_word_64(addr64_t paddr64) | |
293 | { | |
294 | return ml_phys_read_data((pmap_paddr_t)paddr64, 4); | |
295 | } | |
296 | ||
297 | unsigned int ml_phys_read_half(vm_offset_t paddr) | |
298 | { | |
299 | return ml_phys_read_data((pmap_paddr_t)paddr, 2); | |
300 | } | |
301 | ||
302 | unsigned int ml_phys_read_half_64(addr64_t paddr64) | |
303 | { | |
304 | return ml_phys_read_data((pmap_paddr_t)paddr64, 2); | |
305 | } | |
306 | ||
307 | unsigned int ml_phys_read_byte(vm_offset_t paddr) | |
308 | { | |
309 | return ml_phys_read_data((pmap_paddr_t)paddr, 1); | |
310 | } | |
311 | ||
312 | unsigned int ml_phys_read_byte_64(addr64_t paddr64) | |
313 | { | |
314 | return ml_phys_read_data((pmap_paddr_t)paddr64, 1); | |
315 | } | |
316 | ||
317 | unsigned long long ml_phys_read_double(vm_offset_t paddr) | |
318 | { | |
319 | return ml_phys_read_long_long((pmap_paddr_t)paddr); | |
320 | } | |
321 | ||
322 | unsigned long long ml_phys_read_double_64(addr64_t paddr64) | |
323 | { | |
324 | return ml_phys_read_long_long((pmap_paddr_t)paddr64); | |
325 | } | |
326 | ||
327 | ||
328 | ||
329 | /* | |
330 | * Write data to a physical address. Memory should not be cache inhibited. | |
331 | */ | |
332 | ||
6d2010ae | 333 | static inline void |
b0d623f7 A |
334 | ml_phys_write_data(pmap_paddr_t paddr, unsigned long data, int size) |
335 | { | |
336 | switch (size) { | |
337 | case 1: | |
338 | *(unsigned char *)PHYSMAP_PTOV(paddr) = (unsigned char)data; | |
339 | break; | |
340 | case 2: | |
341 | *(unsigned short *)PHYSMAP_PTOV(paddr) = (unsigned short)data; | |
342 | break; | |
343 | case 4: | |
344 | default: | |
345 | *(unsigned int *)PHYSMAP_PTOV(paddr) = (unsigned int)data; | |
346 | break; | |
347 | } | |
348 | } | |
349 | ||
350 | static void | |
351 | ml_phys_write_long_long(pmap_paddr_t paddr, unsigned long long data) | |
352 | { | |
353 | *(unsigned long long *)PHYSMAP_PTOV(paddr) = data; | |
354 | } | |
355 | ||
b0d623f7 A |
356 | void ml_phys_write_byte(vm_offset_t paddr, unsigned int data) |
357 | { | |
358 | ml_phys_write_data((pmap_paddr_t)paddr, data, 1); | |
359 | } | |
360 | ||
361 | void ml_phys_write_byte_64(addr64_t paddr64, unsigned int data) | |
362 | { | |
363 | ml_phys_write_data((pmap_paddr_t)paddr64, data, 1); | |
364 | } | |
365 | ||
366 | void ml_phys_write_half(vm_offset_t paddr, unsigned int data) | |
367 | { | |
368 | ml_phys_write_data((pmap_paddr_t)paddr, data, 2); | |
369 | } | |
370 | ||
371 | void ml_phys_write_half_64(addr64_t paddr64, unsigned int data) | |
372 | { | |
373 | ml_phys_write_data((pmap_paddr_t)paddr64, data, 2); | |
374 | } | |
375 | ||
376 | void ml_phys_write(vm_offset_t paddr, unsigned int data) | |
377 | { | |
378 | ml_phys_write_data((pmap_paddr_t)paddr, data, 4); | |
379 | } | |
380 | ||
381 | void ml_phys_write_64(addr64_t paddr64, unsigned int data) | |
382 | { | |
383 | ml_phys_write_data((pmap_paddr_t)paddr64, data, 4); | |
384 | } | |
385 | ||
386 | void ml_phys_write_word(vm_offset_t paddr, unsigned int data) | |
387 | { | |
388 | ml_phys_write_data((pmap_paddr_t)paddr, data, 4); | |
389 | } | |
390 | ||
391 | void ml_phys_write_word_64(addr64_t paddr64, unsigned int data) | |
392 | { | |
393 | ml_phys_write_data((pmap_paddr_t)paddr64, data, 4); | |
394 | } | |
395 | ||
396 | void ml_phys_write_double(vm_offset_t paddr, unsigned long long data) | |
397 | { | |
398 | ml_phys_write_long_long((pmap_paddr_t)paddr, data); | |
399 | } | |
400 | ||
401 | void ml_phys_write_double_64(addr64_t paddr64, unsigned long long data) | |
402 | { | |
403 | ml_phys_write_long_long((pmap_paddr_t)paddr64, data); | |
404 | } | |
405 | ||
406 | ||
407 | /* PCI config cycle probing | |
408 | * | |
409 | * | |
410 | * Read the memory location at physical address paddr. | |
411 | * This is a part of a device probe, so there is a good chance we will | |
412 | * have a machine check here. So we have to be able to handle that. | |
413 | * We assume that machine checks are enabled both in MSR and HIDs | |
414 | */ | |
415 | ||
416 | boolean_t | |
417 | ml_probe_read(vm_offset_t paddr, unsigned int *val) | |
418 | { | |
419 | if ((PAGE_SIZE - (paddr & PAGE_MASK)) < 4) | |
420 | return FALSE; | |
421 | ||
422 | *val = ml_phys_read((pmap_paddr_t)paddr); | |
423 | ||
424 | return TRUE; | |
425 | } | |
426 | ||
427 | /* | |
428 | * Read the memory location at physical address paddr. | |
429 | * This is a part of a device probe, so there is a good chance we will | |
430 | * have a machine check here. So we have to be able to handle that. | |
431 | * We assume that machine checks are enabled both in MSR and HIDs | |
432 | */ | |
433 | boolean_t | |
434 | ml_probe_read_64(addr64_t paddr64, unsigned int *val) | |
435 | { | |
436 | if ((PAGE_SIZE - (paddr64 & PAGE_MASK)) < 4) | |
437 | return FALSE; | |
438 | ||
439 | *val = ml_phys_read_64((pmap_paddr_t)paddr64); | |
440 | return TRUE; | |
441 | } | |
442 | ||
443 | ||
444 | int bcmp( | |
445 | const void *pa, | |
446 | const void *pb, | |
447 | size_t len) | |
448 | { | |
449 | const char *a = (const char *)pa; | |
450 | const char *b = (const char *)pb; | |
451 | ||
452 | if (len == 0) | |
453 | return 0; | |
454 | ||
455 | do | |
456 | if (*a++ != *b++) | |
457 | break; | |
458 | while (--len); | |
459 | ||
460 | return (int)len; | |
461 | } | |
462 | ||
463 | int | |
464 | memcmp(const void *s1, const void *s2, size_t n) | |
465 | { | |
466 | if (n != 0) { | |
467 | const unsigned char *p1 = s1, *p2 = s2; | |
468 | ||
469 | do { | |
470 | if (*p1++ != *p2++) | |
471 | return (*--p1 - *--p2); | |
472 | } while (--n != 0); | |
473 | } | |
474 | return (0); | |
475 | } | |
476 | ||
477 | /* | |
478 | * Abstract: | |
479 | * strlen returns the number of characters in "string" preceeding | |
480 | * the terminating null character. | |
481 | */ | |
482 | ||
483 | size_t | |
484 | strlen( | |
485 | register const char *string) | |
486 | { | |
487 | register const char *ret = string; | |
488 | ||
489 | while (*string++ != '\0') | |
490 | continue; | |
491 | return string - 1 - ret; | |
492 | } | |
493 | ||
494 | uint32_t | |
495 | hw_compare_and_store(uint32_t oldval, uint32_t newval, volatile uint32_t *dest) | |
496 | { | |
497 | return OSCompareAndSwap((UInt32)oldval, | |
498 | (UInt32)newval, | |
499 | (volatile UInt32 *)dest); | |
500 | } | |
501 | ||
502 | #if MACH_ASSERT | |
503 | ||
504 | /* | |
505 | * Machine-dependent routine to fill in an array with up to callstack_max | |
506 | * levels of return pc information. | |
507 | */ | |
508 | void machine_callstack( | |
509 | __unused natural_t *buf, | |
510 | __unused vm_size_t callstack_max) | |
511 | { | |
512 | } | |
513 | ||
514 | #endif /* MACH_ASSERT */ | |
515 | ||
516 | void fillPage(ppnum_t pa, unsigned int fill) | |
517 | { | |
518 | pmap_paddr_t src; | |
519 | int i; | |
520 | int cnt = PAGE_SIZE / sizeof(unsigned int); | |
521 | unsigned int *addr; | |
522 | ||
523 | src = i386_ptob(pa); | |
524 | for (i = 0, addr = (unsigned int *)PHYSMAP_PTOV(src); i < cnt; i++) | |
525 | *addr++ = fill; | |
526 | } | |
527 | ||
528 | static inline void __sfence(void) | |
529 | { | |
530 | __asm__ volatile("sfence"); | |
531 | } | |
532 | static inline void __mfence(void) | |
533 | { | |
534 | __asm__ volatile("mfence"); | |
535 | } | |
536 | static inline void __wbinvd(void) | |
537 | { | |
538 | __asm__ volatile("wbinvd"); | |
539 | } | |
540 | static inline void __clflush(void *ptr) | |
541 | { | |
542 | __asm__ volatile("clflush (%0)" : : "r" (ptr)); | |
543 | } | |
544 | ||
545 | void dcache_incoherent_io_store64(addr64_t pa, unsigned int count) | |
546 | { | |
6d2010ae A |
547 | addr64_t linesize = cpuid_info()->cache_linesize; |
548 | addr64_t bound = (pa + count + linesize - 1) & ~(linesize - 1); | |
b0d623f7 A |
549 | |
550 | __mfence(); | |
551 | ||
6d2010ae A |
552 | while (pa < bound) { |
553 | __clflush(PHYSMAP_PTOV(pa)); | |
554 | pa += linesize; | |
555 | } | |
b0d623f7 A |
556 | |
557 | __mfence(); | |
558 | } | |
559 | ||
560 | void dcache_incoherent_io_flush64(addr64_t pa, unsigned int count) | |
561 | { | |
562 | return(dcache_incoherent_io_store64(pa,count)); | |
563 | } | |
564 | ||
565 | void | |
6d2010ae | 566 | flush_dcache64(addr64_t addr, unsigned count, int phys) |
b0d623f7 | 567 | { |
6d2010ae A |
568 | if (phys) { |
569 | dcache_incoherent_io_flush64(addr, count); | |
570 | } | |
571 | else { | |
572 | uint32_t linesize = cpuid_info()->cache_linesize; | |
573 | addr64_t bound = (addr + count + linesize -1) & ~(linesize - 1); | |
574 | __mfence(); | |
575 | while (addr < bound) { | |
576 | __clflush((void *) (uintptr_t) addr); | |
577 | addr += linesize; | |
578 | } | |
579 | __mfence(); | |
580 | } | |
b0d623f7 A |
581 | } |
582 | ||
583 | void | |
584 | invalidate_icache64(__unused addr64_t addr, | |
585 | __unused unsigned count, | |
586 | __unused int phys) | |
587 | { | |
588 | } | |
589 | ||
590 | ||
591 | addr64_t vm_last_addr; | |
592 | ||
593 | void | |
594 | mapping_set_mod(ppnum_t pn) | |
595 | { | |
596 | pmap_set_modify(pn); | |
597 | } | |
598 | ||
599 | void | |
600 | mapping_set_ref(ppnum_t pn) | |
601 | { | |
602 | pmap_set_reference(pn); | |
603 | } | |
604 | ||
605 | void | |
606 | cache_flush_page_phys(ppnum_t pa) | |
607 | { | |
608 | boolean_t istate; | |
609 | unsigned char *cacheline_addr; | |
610 | int cacheline_size = cpuid_info()->cache_linesize; | |
611 | int cachelines_to_flush = PAGE_SIZE/cacheline_size; | |
612 | ||
613 | __mfence(); | |
614 | ||
615 | istate = ml_set_interrupts_enabled(FALSE); | |
616 | ||
617 | for (cacheline_addr = (unsigned char *)PHYSMAP_PTOV(i386_ptob(pa)); | |
618 | cachelines_to_flush > 0; | |
619 | cachelines_to_flush--, cacheline_addr += cacheline_size) { | |
620 | __clflush((void *) cacheline_addr); | |
621 | } | |
622 | ||
623 | (void) ml_set_interrupts_enabled(istate); | |
624 | ||
625 | __mfence(); | |
626 | } | |
627 | ||
628 | ||
b0d623f7 A |
629 | #if !MACH_KDP |
630 | void | |
631 | kdp_register_callout(void) | |
632 | { | |
633 | } | |
634 | #endif | |
635 | ||
636 | #if !CONFIG_VMX | |
637 | int host_vmxon(boolean_t exclusive __unused) | |
638 | { | |
639 | return VMX_UNSUPPORTED; | |
640 | } | |
641 | ||
642 | void host_vmxoff(void) | |
643 | { | |
644 | return; | |
645 | } | |
646 | #endif |