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1/*
2 * Copyright (c) 2007 Apple Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
0a7de745 28#ifdef PRIVATE
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29
30#ifndef _ARM_CPU_CAPABILITIES_H
31#define _ARM_CPU_CAPABILITIES_H
32
0a7de745 33#ifndef __ASSEMBLER__
5ba3f43e 34#include <stdint.h>
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35#include <mach/vm_types.h>
36#endif
0a7de745 37
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38#define USER_TIMEBASE_NONE 0
39#define USER_TIMEBASE_SPEC 1
40
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41/*
42 * This is the authoritative way to determine from user mode what
43 * implementation-specific processor features are available.
44 * This API only supported for Apple internal use.
0a7de745 45 *
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46 */
47
48/*
49 * Bit definitions for _cpu_capabilities:
50 */
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51#define kHasICDSBShift 2
52#define kHasICDSB 0x00000004 // ICache Data Syncronization on DSB enabled (H13)
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53#define kHasNeonFP16 0x00000008 // ARM v8.2 NEON FP16 supported
54#define kCache32 0x00000010 // cache line size is 32 bytes
55#define kCache64 0x00000020 // cache line size is 64 bytes
56#define kCache128 0x00000040 // cache line size is 128 bytes
57#define kFastThreadLocalStorage 0x00000080 // TLS ptr is kept in a user-mode-readable register
58#define kHasNeon 0x00000100 // Advanced SIMD is supported
59#define kHasNeonHPFP 0x00000200 // Advanced SIMD half-precision
60#define kHasVfp 0x00000400 // VFP is supported
cb323159 61#define kHasUCNormalMemory 0x00000800 // Uncacheable normal memory type supported
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62#define kHasEvent 0x00001000 // WFE/SVE and period event wakeup
63#define kHasFMA 0x00002000 // Fused multiply add is supported
cb323159 64#define kHasARMv82FHM 0x00004000 // Optional ARMv8.2 FMLAL/FMLSL instructions (required in ARMv8.4)
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65#define kUP 0x00008000 // set if (kNumCPUs == 1)
66#define kNumCPUs 0x00FF0000 // number of CPUs (see _NumCPUs() below)
67#define kHasARMv8Crypto 0x01000000 // Optional ARMv8 Crypto extensions
68#define kHasARMv81Atomics 0x02000000 // ARMv8.1 Atomic instructions supported
69#define kHasARMv8Crc32 0x04000000 // Optional ARMv8 crc32 instructions (required in ARMv8.1)
70
cb323159 71#define kNumCPUsShift 16 // see _NumCPUs() below
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72/*
73 * Bit definitions for multiuser_config:
74 */
75#define kIsMultiUserDevice 0x80000000 // this device is in multiuser mode
76#define kMultiUserCurrentUserMask 0x7fffffff // the current user UID of the multiuser device
77
78#ifndef __ASSEMBLER__
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79#include <sys/commpage.h>
80
cb323159 81__BEGIN_DECLS
5ba3f43e 82extern int _get_cpu_capabilities( void );
cb323159 83__END_DECLS
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84
85__inline static
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86int
87_NumCPUs( void )
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88{
89 return (_get_cpu_capabilities() & kNumCPUs) >> kNumCPUsShift;
90}
91
cb323159 92
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93typedef struct {
94 volatile uint64_t TimeBase;
95 volatile uint32_t TimeStamp_sec;
96 volatile uint32_t TimeStamp_usec;
97 volatile uint32_t TimeBaseTicks_per_sec;
98 volatile uint32_t TimeBaseTicks_per_usec;
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99 volatile uint64_t TimeBase_magic;
100 volatile uint32_t TimeBase_add;
101 volatile uint32_t TimeBase_shift;
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102} commpage_timeofday_data_t;
103
cb323159 104__BEGIN_DECLS
0a7de745 105extern vm_address_t _get_commpage_priv_address(void);
cb323159 106__END_DECLS
d9a64523 107
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108#endif /* __ASSEMBLER__ */
109
110
111/*
112 * The shared kernel/user "comm page(s)":
113 */
114
d9a64523 115#if defined(__LP64__)
5ba3f43e 116
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117#define _COMM_PAGE64_BASE_ADDRESS (0x0000000FFFFFC000ULL) /* In TTBR0 */
118#define _COMM_HIGH_PAGE64_BASE_ADDRESS (0xFFFFFFF0001FC000ULL) /* Just below the kernel, safely in TTBR1; only used for testing */
5ba3f43e 119
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120#define _COMM_PAGE64_AREA_LENGTH (_COMM_PAGE32_AREA_LENGTH)
121#define _COMM_PAGE64_AREA_USED (-1)
5ba3f43e 122
0a7de745 123#define _COMM_PAGE_PRIV(_addr_) ((_addr_) - (_COMM_PAGE_START_ADDRESS) + _get_commpage_priv_address())
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124
125#ifdef KERNEL_PRIVATE
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126#define _COMM_PAGE_RW_OFFSET (0)
127#define _COMM_PAGE_AREA_LENGTH (PAGE_SIZE)
5ba3f43e 128
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129#define _COMM_PAGE_BASE_ADDRESS (_get_commpage_priv_address())
130#define _COMM_PAGE_START_ADDRESS (_get_commpage_priv_address())
5c9f4661 131#else /* KERNEL_PRIVATE */
0a7de745 132#define _COMM_PAGE_AREA_LENGTH (4096)
5ba3f43e 133
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134#define _COMM_PAGE_BASE_ADDRESS _COMM_PAGE64_BASE_ADDRESS
135#define _COMM_PAGE_START_ADDRESS _COMM_PAGE64_BASE_ADDRESS
5c9f4661 136#endif /* KERNEL_PRIVATE */
5ba3f43e 137
d9a64523 138#else
5ba3f43e 139
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140#define _COMM_PAGE64_BASE_ADDRESS (-1)
141#define _COMM_PAGE64_AREA_LENGTH (-1)
142#define _COMM_PAGE64_AREA_USED (-1)
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143
144// macro to change a user comm page address to one that is accessible from privileged mode
145// this macro is stubbed as PAN is not available on AARCH32,
146// but this may still be required for compatibility
0a7de745 147#define _COMM_PAGE_PRIV(_addr_) (_addr_)
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148
149#ifdef KERNEL_PRIVATE
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150#define _COMM_PAGE_RW_OFFSET (_get_commpage_priv_address()-_COMM_PAGE_BASE_ADDRESS)
151#define _COMM_PAGE_AREA_LENGTH (PAGE_SIZE)
5ba3f43e 152#else
0a7de745 153#define _COMM_PAGE_AREA_LENGTH (4096)
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154#endif
155
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156#define _COMM_PAGE_BASE_ADDRESS _COMM_PAGE32_BASE_ADDRESS
157#define _COMM_PAGE_START_ADDRESS _COMM_PAGE32_BASE_ADDRESS
5ba3f43e 158
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159#endif
160
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161#define _COMM_PAGE32_BASE_ADDRESS (0xFFFF4000) /* Must be outside of normal map bounds */
162#define _COMM_PAGE32_AREA_LENGTH (_COMM_PAGE_AREA_LENGTH)
163
164#define _COMM_PAGE_TEXT_START (-1)
165#define _COMM_PAGE32_TEXT_START (-1)
166#define _COMM_PAGE64_TEXT_START (-1)
167#define _COMM_PAGE_PFZ_START_OFFSET (-1)
168#define _COMM_PAGE_PFZ_END_OFFSET (-1)
5ba3f43e 169
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170#define _COMM_PAGE32_OBJC_SIZE 0ULL
171#define _COMM_PAGE32_OBJC_BASE 0ULL
172#define _COMM_PAGE64_OBJC_SIZE 0ULL
173#define _COMM_PAGE64_OBJC_BASE 0ULL
5ba3f43e 174
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175/*
176 * data in the comm pages
177 * apply _COMM_PAGE_PRIV macro to use these in privileged mode
178 */
0a7de745 179#define _COMM_PAGE_SIGNATURE (_COMM_PAGE_START_ADDRESS+0x000) // first few bytes are a signature
cb323159 180#define _COMM_PAGE_SIGNATURELEN (0x10)
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181#define _COMM_PAGE_VERSION (_COMM_PAGE_START_ADDRESS+0x01E) // 16-bit version#
182#define _COMM_PAGE_THIS_VERSION 3 // version of the commarea format
183
184#define _COMM_PAGE_CPU_CAPABILITIES (_COMM_PAGE_START_ADDRESS+0x020) // uint32_t _cpu_capabilities
185#define _COMM_PAGE_NCPUS (_COMM_PAGE_START_ADDRESS+0x022) // uint8_t number of configured CPUs
186#define _COMM_PAGE_USER_PAGE_SHIFT_32 (_COMM_PAGE_START_ADDRESS+0x024) // VM page shift for 32-bit processes
187#define _COMM_PAGE_USER_PAGE_SHIFT_64 (_COMM_PAGE_START_ADDRESS+0x025) // VM page shift for 64-bit processes
188#define _COMM_PAGE_CACHE_LINESIZE (_COMM_PAGE_START_ADDRESS+0x026) // uint16_t cache line size
189#define _COMM_PAGE_SCHED_GEN (_COMM_PAGE_START_ADDRESS+0x028) // uint32_t scheduler generation number (count of pre-emptions)
190#define _COMM_PAGE_SPIN_COUNT (_COMM_PAGE_START_ADDRESS+0x02C) // uint32_t max spin count for mutex's
191#define _COMM_PAGE_MEMORY_PRESSURE (_COMM_PAGE_START_ADDRESS+0x030) // uint32_t copy of vm_memory_pressure
192#define _COMM_PAGE_ACTIVE_CPUS (_COMM_PAGE_START_ADDRESS+0x034) // uint8_t number of active CPUs (hw.activecpu)
193#define _COMM_PAGE_PHYSICAL_CPUS (_COMM_PAGE_START_ADDRESS+0x035) // uint8_t number of physical CPUs (hw.physicalcpu_max)
194#define _COMM_PAGE_LOGICAL_CPUS (_COMM_PAGE_START_ADDRESS+0x036) // uint8_t number of logical CPUs (hw.logicalcpu_max)
195#define _COMM_PAGE_KERNEL_PAGE_SHIFT (_COMM_PAGE_START_ADDRESS+0x037) // uint8_t kernel vm page shift */
196#define _COMM_PAGE_MEMORY_SIZE (_COMM_PAGE_START_ADDRESS+0x038) // uint64_t max memory size */
197#define _COMM_PAGE_TIMEOFDAY_DATA (_COMM_PAGE_START_ADDRESS+0x040) // used by gettimeofday(). Currently, sizeof(commpage_timeofday_data_t) = 40. A new struct is used on gettimeofday but space is reserved on the commpage for compatibility
198#define _COMM_PAGE_CPUFAMILY (_COMM_PAGE_START_ADDRESS+0x080) // used by memcpy() resolver
199#define _COMM_PAGE_DEV_FIRM (_COMM_PAGE_START_ADDRESS+0x084) // uint32_t handle on PE_i_can_has_debugger
200#define _COMM_PAGE_TIMEBASE_OFFSET (_COMM_PAGE_START_ADDRESS+0x088) // uint64_t timebase offset for constructing mach_absolute_time()
201#define _COMM_PAGE_USER_TIMEBASE (_COMM_PAGE_START_ADDRESS+0x090) // uint8_t is userspace mach_absolute_time supported (can read the timebase)
202#define _COMM_PAGE_CONT_HWCLOCK (_COMM_PAGE_START_ADDRESS+0x091) // uint8_t is always-on hardware clock present for mach_continuous_time()
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203#define _COMM_PAGE_DTRACE_DOF_ENABLED (_COMM_PAGE_START_ADDRESS+0x092) // uint8_t 0 if userspace DOF disable, 1 if enabled
204#define _COMM_PAGE_UNUSED0 (_COMM_PAGE_START_ADDRESS+0x093) // 5 unused bytes
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205#define _COMM_PAGE_CONT_TIMEBASE (_COMM_PAGE_START_ADDRESS+0x098) // uint64_t base for mach_continuous_time()
206#define _COMM_PAGE_BOOTTIME_USEC (_COMM_PAGE_START_ADDRESS+0x0A0) // uint64_t boottime in microseconds
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207
208// aligning to 64byte for cacheline size
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209#define _COMM_PAGE_APPROX_TIME (_COMM_PAGE_START_ADDRESS+0x0C0) // uint64_t last known mach_absolute_time()
210#define _COMM_PAGE_APPROX_TIME_SUPPORTED (_COMM_PAGE_START_ADDRESS+0x0C8) // uint8_t is mach_approximate_time supported
211#define _COMM_PAGE_UNUSED1 (_COMM_PAGE_START_ADDRESS+0x0C9) // 55 unused bytes, align next mutable value to a separate cache line
5ba3f43e 212
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213#define _COMM_PAGE_KDEBUG_ENABLE (_COMM_PAGE_START_ADDRESS+0x100) // uint32_t export kdebug status bits to userspace
214#define _COMM_PAGE_ATM_DIAGNOSTIC_CONFIG (_COMM_PAGE_START_ADDRESS+0x104) // uint32_t export "atm_diagnostic_config" to userspace
215#define _COMM_PAGE_MULTIUSER_CONFIG (_COMM_PAGE_START_ADDRESS+0x108) // uint32_t export "multiuser_config" to userspace
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216
217
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218#define _COMM_PAGE_NEWTIMEOFDAY_DATA (_COMM_PAGE_START_ADDRESS+0x120) // used by gettimeofday(). Currently, sizeof(new_commpage_timeofday_data_t) = 40.
219#define _COMM_PAGE_REMOTETIME_PARAMS (_COMM_PAGE_START_ADDRESS+0x148) // used by mach_bridge_remote_time(). Currently, sizeof(struct bt_params) = 24
cb323159 220#define _COMM_PAGE_DYLD_SYSTEM_FLAGS (_COMM_PAGE_START_ADDRESS+0x160) // uint64_t export kern.dyld_system_flags to userspace
d26ffc64 221
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222// aligning to 128 bytes for cacheline/fabric size
223#define _COMM_PAGE_CPU_QUIESCENT_COUNTER (_COMM_PAGE_START_ADDRESS+0x180) // uint64_t, but reserve the whole 128 (0x80) bytes
224
0a7de745 225#define _COMM_PAGE_END (_COMM_PAGE_START_ADDRESS+0x1000) // end of common page
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226
227#endif /* _ARM_CPU_CAPABILITIES_H */
228#endif /* PRIVATE */