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1/*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
11 *
12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
18 * under the License.
19 *
20 * @APPLE_LICENSE_HEADER_END@
21 */
22/*
23 * @OSF_COPYRIGHT@
24 */
25/*
26 * Mach Operating System
27 * Copyright (c) 1991,1990,1989,1988 Carnegie Mellon University
28 * All Rights Reserved.
29 *
30 * Permission to use, copy, modify and distribute this software and its
31 * documentation is hereby granted, provided that both the copyright
32 * notice and this permission notice appear in all copies of the
33 * software, derivative works or modified versions, and any portions
34 * thereof, and that both notices appear in supporting documentation.
35 *
36 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
37 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
38 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
39 *
40 * Carnegie Mellon requests users of this software to return to
41 *
42 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
43 * School of Computer Science
44 * Carnegie Mellon University
45 * Pittsburgh PA 15213-3890
46 *
47 * any improvements or extensions that they make and grant Carnegie Mellon
48 * the rights to redistribute these changes.
49 */
50/*
51 */
52
53/*
54 * File: pmap.c
55 * Author: Avadis Tevanian, Jr., Michael Wayne Young
56 * (These guys wrote the Vax version)
57 *
58 * Physical Map management code for Intel i386, i486, and i860.
59 *
60 * Manages physical address maps.
61 *
62 * In addition to hardware address maps, this
63 * module is called upon to provide software-use-only
64 * maps which may or may not be stored in the same
65 * form as hardware maps. These pseudo-maps are
66 * used to store intermediate results from copy
67 * operations to and from address spaces.
68 *
69 * Since the information managed by this module is
70 * also stored by the logical address mapping module,
71 * this module may throw away valid virtual-to-physical
72 * mappings at almost any time. However, invalidations
73 * of virtual-to-physical mappings must be done as
74 * requested.
75 *
76 * In order to cope with hardware architectures which
77 * make virtual-to-physical map invalidates expensive,
78 * this module may delay invalidate or reduced protection
79 * operations until such time as they are actually
80 * necessary. This module is given full information as
81 * to which processors are currently using which maps,
82 * and to when physical maps must be made correct.
83 */
84
85#include <cpus.h>
86
87#include <string.h>
88#include <norma_vm.h>
89#include <mach_kdb.h>
90#include <mach_ldebug.h>
91
92#include <mach/machine/vm_types.h>
93
94#include <mach/boolean.h>
95#include <kern/thread.h>
96#include <kern/zalloc.h>
97
98#include <kern/lock.h>
99#include <kern/spl.h>
100
101#include <vm/pmap.h>
102#include <vm/vm_map.h>
103#include <vm/vm_kern.h>
104#include <mach/vm_param.h>
105#include <mach/vm_prot.h>
106#include <vm/vm_object.h>
107#include <vm/vm_page.h>
108
109#include <mach/machine/vm_param.h>
110#include <machine/thread.h>
111
112#include <kern/misc_protos.h> /* prototyping */
113#include <i386/misc_protos.h>
114
115#include <i386/cpuid.h>
116
117#if MACH_KDB
118#include <ddb/db_command.h>
119#include <ddb/db_output.h>
120#include <ddb/db_sym.h>
121#include <ddb/db_print.h>
122#endif /* MACH_KDB */
123
124#include <kern/xpr.h>
125
126#if NCPUS > 1
127#include <i386/AT386/mp/mp_events.h>
128#endif
129
130/*
131 * Forward declarations for internal functions.
132 */
133void pmap_expand(
134 pmap_t map,
135 vm_offset_t v);
136
137extern void pmap_remove_range(
138 pmap_t pmap,
139 vm_offset_t va,
140 pt_entry_t *spte,
141 pt_entry_t *epte);
142
143void phys_attribute_clear(
144 vm_offset_t phys,
145 int bits);
146
147boolean_t phys_attribute_test(
148 vm_offset_t phys,
149 int bits);
150
151void pmap_set_modify(vm_offset_t phys);
152
153void phys_attribute_set(
154 vm_offset_t phys,
155 int bits);
156
157
158#ifndef set_dirbase
159void set_dirbase(vm_offset_t dirbase);
160#endif /* set_dirbase */
161
162#define PA_TO_PTE(pa) (pa_to_pte((pa) - VM_MIN_KERNEL_ADDRESS))
163#define iswired(pte) ((pte) & INTEL_PTE_WIRED)
164
165pmap_t real_pmap[NCPUS];
166
167#define WRITE_PTE(pte_p, pte_entry) *(pte_p) = (pte_entry);
168#define WRITE_PTE_FAST(pte_p, pte_entry) *(pte_p) = (pte_entry);
169
170/*
171 * Private data structures.
172 */
173
174/*
175 * For each vm_page_t, there is a list of all currently
176 * valid virtual mappings of that page. An entry is
177 * a pv_entry_t; the list is the pv_table.
178 */
179
180typedef struct pv_entry {
181 struct pv_entry *next; /* next pv_entry */
182 pmap_t pmap; /* pmap where mapping lies */
183 vm_offset_t va; /* virtual address for mapping */
184} *pv_entry_t;
185
186#define PV_ENTRY_NULL ((pv_entry_t) 0)
187
188pv_entry_t pv_head_table; /* array of entries, one per page */
189
190/*
191 * pv_list entries are kept on a list that can only be accessed
192 * with the pmap system locked (at SPLVM, not in the cpus_active set).
193 * The list is refilled from the pv_list_zone if it becomes empty.
194 */
195pv_entry_t pv_free_list; /* free list at SPLVM */
196decl_simple_lock_data(,pv_free_list_lock)
197
198#define PV_ALLOC(pv_e) { \
199 simple_lock(&pv_free_list_lock); \
200 if ((pv_e = pv_free_list) != 0) { \
201 pv_free_list = pv_e->next; \
202 } \
203 simple_unlock(&pv_free_list_lock); \
204}
205
206#define PV_FREE(pv_e) { \
207 simple_lock(&pv_free_list_lock); \
208 pv_e->next = pv_free_list; \
209 pv_free_list = pv_e; \
210 simple_unlock(&pv_free_list_lock); \
211}
212
213zone_t pv_list_zone; /* zone of pv_entry structures */
214
215/*
216 * Each entry in the pv_head_table is locked by a bit in the
217 * pv_lock_table. The lock bits are accessed by the physical
218 * address of the page they lock.
219 */
220
221char *pv_lock_table; /* pointer to array of bits */
222#define pv_lock_table_size(n) (((n)+BYTE_SIZE-1)/BYTE_SIZE)
223
224/*
225 * First and last physical addresses that we maintain any information
226 * for. Initialized to zero so that pmap operations done before
227 * pmap_init won't touch any non-existent structures.
228 */
229vm_offset_t vm_first_phys = (vm_offset_t) 0;
230vm_offset_t vm_last_phys = (vm_offset_t) 0;
231boolean_t pmap_initialized = FALSE;/* Has pmap_init completed? */
232
233/*
234 * Index into pv_head table, its lock bits, and the modify/reference
235 * bits starting at vm_first_phys.
236 */
237
238#define pa_index(pa) (atop(pa - vm_first_phys))
239
240#define pai_to_pvh(pai) (&pv_head_table[pai])
241#define lock_pvh_pai(pai) bit_lock(pai, (void *)pv_lock_table)
242#define unlock_pvh_pai(pai) bit_unlock(pai, (void *)pv_lock_table)
243
244/*
245 * Array of physical page attribites for managed pages.
246 * One byte per physical page.
247 */
248char *pmap_phys_attributes;
249
250/*
251 * Physical page attributes. Copy bits from PTE definition.
252 */
253#define PHYS_MODIFIED INTEL_PTE_MOD /* page modified */
254#define PHYS_REFERENCED INTEL_PTE_REF /* page referenced */
255
256/*
257 * Amount of virtual memory mapped by one
258 * page-directory entry.
259 */
260#define PDE_MAPPED_SIZE (pdetova(1))
261
262/*
263 * We allocate page table pages directly from the VM system
264 * through this object. It maps physical memory.
265 */
266vm_object_t pmap_object = VM_OBJECT_NULL;
267
268/*
269 * Locking and TLB invalidation
270 */
271
272/*
273 * Locking Protocols:
274 *
275 * There are two structures in the pmap module that need locking:
276 * the pmaps themselves, and the per-page pv_lists (which are locked
277 * by locking the pv_lock_table entry that corresponds to the pv_head
278 * for the list in question.) Most routines want to lock a pmap and
279 * then do operations in it that require pv_list locking -- however
280 * pmap_remove_all and pmap_copy_on_write operate on a physical page
281 * basis and want to do the locking in the reverse order, i.e. lock
282 * a pv_list and then go through all the pmaps referenced by that list.
283 * To protect against deadlock between these two cases, the pmap_lock
284 * is used. There are three different locking protocols as a result:
285 *
286 * 1. pmap operations only (pmap_extract, pmap_access, ...) Lock only
287 * the pmap.
288 *
289 * 2. pmap-based operations (pmap_enter, pmap_remove, ...) Get a read
290 * lock on the pmap_lock (shared read), then lock the pmap
291 * and finally the pv_lists as needed [i.e. pmap lock before
292 * pv_list lock.]
293 *
294 * 3. pv_list-based operations (pmap_remove_all, pmap_copy_on_write, ...)
295 * Get a write lock on the pmap_lock (exclusive write); this
296 * also guaranteees exclusive access to the pv_lists. Lock the
297 * pmaps as needed.
298 *
299 * At no time may any routine hold more than one pmap lock or more than
300 * one pv_list lock. Because interrupt level routines can allocate
301 * mbufs and cause pmap_enter's, the pmap_lock and the lock on the
302 * kernel_pmap can only be held at splhigh.
303 */
304
305#if NCPUS > 1
306/*
307 * We raise the interrupt level to splhigh, to block interprocessor
308 * interrupts during pmap operations. We must take the CPU out of
309 * the cpus_active set while interrupts are blocked.
310 */
311#define SPLVM(spl) { \
312 spl = splhigh(); \
313 mp_disable_preemption(); \
314 i_bit_clear(cpu_number(), &cpus_active); \
315 mp_enable_preemption(); \
316}
317
318#define SPLX(spl) { \
319 mp_disable_preemption(); \
320 i_bit_set(cpu_number(), &cpus_active); \
321 mp_enable_preemption(); \
322 splx(spl); \
323}
324
325/*
326 * Lock on pmap system
327 */
328lock_t pmap_system_lock;
329
330#define PMAP_READ_LOCK(pmap, spl) { \
331 SPLVM(spl); \
332 lock_read(&pmap_system_lock); \
333 simple_lock(&(pmap)->lock); \
334}
335
336#define PMAP_WRITE_LOCK(spl) { \
337 SPLVM(spl); \
338 lock_write(&pmap_system_lock); \
339}
340
341#define PMAP_READ_UNLOCK(pmap, spl) { \
342 simple_unlock(&(pmap)->lock); \
343 lock_read_done(&pmap_system_lock); \
344 SPLX(spl); \
345}
346
347#define PMAP_WRITE_UNLOCK(spl) { \
348 lock_write_done(&pmap_system_lock); \
349 SPLX(spl); \
350}
351
352#define PMAP_WRITE_TO_READ_LOCK(pmap) { \
353 simple_lock(&(pmap)->lock); \
354 lock_write_to_read(&pmap_system_lock); \
355}
356
357#define LOCK_PVH(index) lock_pvh_pai(index)
358
359#define UNLOCK_PVH(index) unlock_pvh_pai(index)
360
361#define PMAP_FLUSH_TLBS() \
362{ \
363 flush_tlb(); \
364 i386_signal_cpus(MP_TLB_FLUSH); \
365}
366
367#define PMAP_RELOAD_TLBS() { \
368 i386_signal_cpus(MP_TLB_RELOAD); \
369 set_cr3(kernel_pmap->pdirbase); \
370}
371
372#define PMAP_INVALIDATE_PAGE(map, addr) { \
373 if (map == kernel_pmap) \
374 invlpg((vm_offset_t) addr); \
375 else \
376 flush_tlb(); \
377 i386_signal_cpus(MP_TLB_FLUSH); \
378}
379
380#else /* NCPUS > 1 */
381
382#if MACH_RT
383#define SPLVM(spl) { (spl) = splhigh(); }
384#define SPLX(spl) splx (spl)
385#else /* MACH_RT */
386#define SPLVM(spl)
387#define SPLX(spl)
388#endif /* MACH_RT */
389
390#define PMAP_READ_LOCK(pmap, spl) SPLVM(spl)
391#define PMAP_WRITE_LOCK(spl) SPLVM(spl)
392#define PMAP_READ_UNLOCK(pmap, spl) SPLX(spl)
393#define PMAP_WRITE_UNLOCK(spl) SPLX(spl)
394#define PMAP_WRITE_TO_READ_LOCK(pmap)
395
396#if MACH_RT
397#define LOCK_PVH(index) disable_preemption()
398#define UNLOCK_PVH(index) enable_preemption()
399#else /* MACH_RT */
400#define LOCK_PVH(index)
401#define UNLOCK_PVH(index)
402#endif /* MACH_RT */
403
404#define PMAP_FLUSH_TLBS() flush_tlb()
405#define PMAP_RELOAD_TLBS() set_cr3(kernel_pmap->pdirbase)
406#define PMAP_INVALIDATE_PAGE(map, addr) { \
407 if (map == kernel_pmap) \
408 invlpg((vm_offset_t) addr); \
409 else \
410 flush_tlb(); \
411}
412
413#endif /* NCPUS > 1 */
414
415#define MAX_TBIS_SIZE 32 /* > this -> TBIA */ /* XXX */
416
417#if NCPUS > 1
418/*
419 * Structures to keep track of pending TLB invalidations
420 */
421cpu_set cpus_active;
422cpu_set cpus_idle;
423volatile boolean_t cpu_update_needed[NCPUS];
424
425
426#endif /* NCPUS > 1 */
427
428/*
429 * Other useful macros.
430 */
431#define current_pmap() (vm_map_pmap(current_act()->map))
432#define pmap_in_use(pmap, cpu) (((pmap)->cpus_using & (1 << (cpu))) != 0)
433
434struct pmap kernel_pmap_store;
435pmap_t kernel_pmap;
436
437struct zone *pmap_zone; /* zone of pmap structures */
438
439int pmap_debug = 0; /* flag for debugging prints */
440int ptes_per_vm_page; /* number of hardware ptes needed
441 to map one VM page. */
442unsigned int inuse_ptepages_count = 0; /* debugging */
443
444/*
445 * Pmap cache. Cache is threaded through ref_count field of pmap.
446 * Max will eventually be constant -- variable for experimentation.
447 */
448int pmap_cache_max = 32;
449int pmap_alloc_chunk = 8;
450pmap_t pmap_cache_list;
451int pmap_cache_count;
452decl_simple_lock_data(,pmap_cache_lock)
453
454extern vm_offset_t hole_start, hole_end;
455
456extern char end;
457
458/*
459 * Page directory for kernel.
460 */
461pt_entry_t *kpde = 0; /* set by start.s - keep out of bss */
462
463#if DEBUG_ALIAS
464#define PMAP_ALIAS_MAX 32
465struct pmap_alias {
466 vm_offset_t rpc;
467 pmap_t pmap;
468 vm_offset_t va;
469 int cookie;
470#define PMAP_ALIAS_COOKIE 0xdeadbeef
471} pmap_aliasbuf[PMAP_ALIAS_MAX];
472int pmap_alias_index = 0;
473extern vm_offset_t get_rpc();
474
475#endif /* DEBUG_ALIAS */
476
477/*
478 * Given an offset and a map, compute the address of the
479 * pte. If the address is invalid with respect to the map
480 * then PT_ENTRY_NULL is returned (and the map may need to grow).
481 *
482 * This is only used in machine-dependent code.
483 */
484
485pt_entry_t *
486pmap_pte(
487 register pmap_t pmap,
488 register vm_offset_t addr)
489{
490 register pt_entry_t *ptp;
491 register pt_entry_t pte;
492
493 pte = pmap->dirbase[pdenum(pmap, addr)];
494 if ((pte & INTEL_PTE_VALID) == 0)
495 return(PT_ENTRY_NULL);
496 ptp = (pt_entry_t *)ptetokv(pte);
497 return(&ptp[ptenum(addr)]);
498
499}
500
501#define pmap_pde(pmap, addr) (&(pmap)->dirbase[pdenum(pmap, addr)])
502
503#define DEBUG_PTE_PAGE 0
504
505#if DEBUG_PTE_PAGE
506void
507ptep_check(
508 ptep_t ptep)
509{
510 register pt_entry_t *pte, *epte;
511 int ctu, ctw;
512
513 /* check the use and wired counts */
514 if (ptep == PTE_PAGE_NULL)
515 return;
516 pte = pmap_pte(ptep->pmap, ptep->va);
517 epte = pte + INTEL_PGBYTES/sizeof(pt_entry_t);
518 ctu = 0;
519 ctw = 0;
520 while (pte < epte) {
521 if (pte->pfn != 0) {
522 ctu++;
523 if (pte->wired)
524 ctw++;
525 }
526 pte += ptes_per_vm_page;
527 }
528
529 if (ctu != ptep->use_count || ctw != ptep->wired_count) {
530 printf("use %d wired %d - actual use %d wired %d\n",
531 ptep->use_count, ptep->wired_count, ctu, ctw);
532 panic("pte count");
533 }
534}
535#endif /* DEBUG_PTE_PAGE */
536
537/*
538 * Map memory at initialization. The physical addresses being
539 * mapped are not managed and are never unmapped.
540 *
541 * For now, VM is already on, we only need to map the
542 * specified memory.
543 */
544vm_offset_t
545pmap_map(
546 register vm_offset_t virt,
547 register vm_offset_t start,
548 register vm_offset_t end,
549 register vm_prot_t prot)
550{
551 register int ps;
552
553 ps = PAGE_SIZE;
554 while (start < end) {
555 pmap_enter(kernel_pmap, virt, start, prot, FALSE);
556 virt += ps;
557 start += ps;
558 }
559 return(virt);
560}
561
562/*
563 * Back-door routine for mapping kernel VM at initialization.
564 * Useful for mapping memory outside the range
565 * Sets no-cache, A, D.
566 * [vm_first_phys, vm_last_phys) (i.e., devices).
567 * Otherwise like pmap_map.
568 */
569vm_offset_t
570pmap_map_bd(
571 register vm_offset_t virt,
572 register vm_offset_t start,
573 register vm_offset_t end,
574 vm_prot_t prot)
575{
576 register pt_entry_t template;
577 register pt_entry_t *pte;
578
579 template = pa_to_pte(start)
580 | INTEL_PTE_NCACHE
581 | INTEL_PTE_REF
582 | INTEL_PTE_MOD
583 | INTEL_PTE_WIRED
584 | INTEL_PTE_VALID;
585 if (prot & VM_PROT_WRITE)
586 template |= INTEL_PTE_WRITE;
587
588 while (start < end) {
589 pte = pmap_pte(kernel_pmap, virt);
590 if (pte == PT_ENTRY_NULL)
591 panic("pmap_map_bd: Invalid kernel address\n");
592 WRITE_PTE_FAST(pte, template)
593 pte_increment_pa(template);
594 virt += PAGE_SIZE;
595 start += PAGE_SIZE;
596 }
597
598 PMAP_FLUSH_TLBS();
599
600 return(virt);
601}
602
603extern int cnvmem;
604extern char *first_avail;
605extern vm_offset_t virtual_avail, virtual_end;
606extern vm_offset_t avail_start, avail_end, avail_next;
607
608/*
609 * Bootstrap the system enough to run with virtual memory.
610 * Map the kernel's code and data, and allocate the system page table.
611 * Called with mapping OFF. Page_size must already be set.
612 *
613 * Parameters:
614 * load_start: PA where kernel was loaded
615 * avail_start PA of first available physical page -
616 * after kernel page tables
617 * avail_end PA of last available physical page
618 * virtual_avail VA of first available page -
619 * after kernel page tables
620 * virtual_end VA of last available page -
621 * end of kernel address space
622 *
623 * &start_text start of kernel text
624 * &etext end of kernel text
625 */
626
627void
628pmap_bootstrap(
629 vm_offset_t load_start)
630{
631 vm_offset_t va, tva, paddr;
632 pt_entry_t template;
633 pt_entry_t *pde, *pte, *ptend;
634 vm_size_t morevm; /* VM space for kernel map */
635
636 /*
637 * Set ptes_per_vm_page for general use.
638 */
639 ptes_per_vm_page = PAGE_SIZE / INTEL_PGBYTES;
640
641 /*
642 * The kernel's pmap is statically allocated so we don't
643 * have to use pmap_create, which is unlikely to work
644 * correctly at this part of the boot sequence.
645 */
646
647 kernel_pmap = &kernel_pmap_store;
648
649#if NCPUS > 1
650 lock_init(&pmap_system_lock,
651 FALSE, /* NOT a sleep lock */
652 ETAP_VM_PMAP_SYS,
653 ETAP_VM_PMAP_SYS_I);
654#endif /* NCPUS > 1 */
655
656 simple_lock_init(&kernel_pmap->lock, ETAP_VM_PMAP_KERNEL);
657 simple_lock_init(&pv_free_list_lock, ETAP_VM_PMAP_FREE);
658
659 kernel_pmap->ref_count = 1;
660
661 /*
662 * The kernel page directory has been allocated;
663 * its virtual address is in kpde.
664 *
665 * Enough kernel page table pages have been allocated
666 * to map low system memory, kernel text, kernel data/bss,
667 * kdb's symbols, and the page directory and page tables.
668 *
669 * No other physical memory has been allocated.
670 */
671
672 /*
673 * Start mapping virtual memory to physical memory, 1-1,
674 * at end of mapped memory.
675 */
676
677 virtual_avail = phystokv(avail_start);
678 virtual_end = phystokv(avail_end);
679
680 pde = kpde;
681 pde += pdenum(kernel_pmap, virtual_avail);
682
683 if (pte_to_pa(*pde) == 0) {
684 /* This pte has not been allocated */
685 pte = 0; ptend = 0;
686 }
687 else {
688 pte = (pt_entry_t *)ptetokv(*pde);
689 /* first pte of page */
690 ptend = pte+NPTES; /* last pte of page */
691 pte += ptenum(virtual_avail); /* point to pte that
692 maps first avail VA */
693 pde++; /* point pde to first empty slot */
694 }
695
696 template = pa_to_pte(avail_start)
697 | INTEL_PTE_VALID
698 | INTEL_PTE_WRITE;
699
700 for (va = virtual_avail; va < virtual_end; va += INTEL_PGBYTES) {
701 if (pte >= ptend) {
702 pte = (pt_entry_t *)phystokv(virtual_avail);
703 ptend = pte + NPTES;
704 virtual_avail = (vm_offset_t)ptend;
705 if (virtual_avail == hole_start)
706 virtual_avail = hole_end;
707 *pde = PA_TO_PTE((vm_offset_t) pte)
708 | INTEL_PTE_VALID
709 | INTEL_PTE_WRITE;
710 pde++;
711 }
712 WRITE_PTE_FAST(pte, template)
713 pte++;
714 pte_increment_pa(template);
715 }
716
717 avail_start = virtual_avail - VM_MIN_KERNEL_ADDRESS;
718 avail_next = avail_start;
719
720 /*
721 * Figure out maximum kernel address.
722 * Kernel virtual space is:
723 * - at least three times physical memory
724 * - at least VM_MIN_KERNEL_ADDRESS
725 * - limited by VM_MAX_KERNEL_ADDRESS
726 */
727
728 morevm = 3*avail_end;
729 if (virtual_end + morevm > VM_MAX_KERNEL_ADDRESS)
730 morevm = VM_MAX_KERNEL_ADDRESS - virtual_end + 1;
731
732/*
733 * startup requires additional virtual memory (for tables, buffers,
734 * etc.). The kd driver may also require some of that memory to
735 * access the graphics board.
736 *
737 */
738 *(int *)&template = 0;
739
740 /*
741 * Leave room for kernel-loaded servers, which have been linked at
742 * addresses from VM_MIN_KERNEL_LOADED_ADDRESS to
743 * VM_MAX_KERNEL_LOADED_ADDRESS.
744 */
745 if (virtual_end + morevm < VM_MAX_KERNEL_LOADED_ADDRESS + 1)
746 morevm = VM_MAX_KERNEL_LOADED_ADDRESS + 1 - virtual_end;
747
748
749 virtual_end += morevm;
750 for (tva = va; tva < virtual_end; tva += INTEL_PGBYTES) {
751 if (pte >= ptend) {
752 pmap_next_page(&paddr);
753 pte = (pt_entry_t *)phystokv(paddr);
754 ptend = pte + NPTES;
755 *pde = PA_TO_PTE((vm_offset_t) pte)
756 | INTEL_PTE_VALID
757 | INTEL_PTE_WRITE;
758 pde++;
759 }
760 WRITE_PTE_FAST(pte, template)
761 pte++;
762 }
763
764 virtual_avail = va;
765
766 /* Push the virtual avail address above hole_end */
767 if (virtual_avail < hole_end)
768 virtual_avail = hole_end;
769
770 /*
771 * c.f. comment above
772 *
773 */
774 virtual_end = va + morevm;
775 while (pte < ptend)
776 *pte++ = 0;
777
778 /*
779 * invalidate user virtual addresses
780 */
781 memset((char *)kpde,
782 0,
783 pdenum(kernel_pmap,VM_MIN_KERNEL_ADDRESS)*sizeof(pt_entry_t));
784 kernel_pmap->dirbase = kpde;
785 printf("Kernel virtual space from 0x%x to 0x%x.\n",
786 VM_MIN_KERNEL_ADDRESS, virtual_end);
787
788 avail_start = avail_next;
789 printf("Available physical space from 0x%x to 0x%x\n",
790 avail_start, avail_end);
791
792 kernel_pmap->pdirbase = kvtophys((vm_offset_t)kernel_pmap->dirbase);
793
794}
795
796void
797pmap_virtual_space(
798 vm_offset_t *startp,
799 vm_offset_t *endp)
800{
801 *startp = virtual_avail;
802 *endp = virtual_end;
803}
804
805/*
806 * Initialize the pmap module.
807 * Called by vm_init, to initialize any structures that the pmap
808 * system needs to map virtual memory.
809 */
810void
811pmap_init(void)
812{
813 register long npages;
814 vm_offset_t addr;
815 register vm_size_t s;
816 int i;
817
818 /*
819 * Allocate memory for the pv_head_table and its lock bits,
820 * the modify bit array, and the pte_page table.
821 */
822
823 npages = atop(avail_end - avail_start);
824 s = (vm_size_t) (sizeof(struct pv_entry) * npages
825 + pv_lock_table_size(npages)
826 + npages);
827
828 s = round_page(s);
829 if (kmem_alloc_wired(kernel_map, &addr, s) != KERN_SUCCESS)
830 panic("pmap_init");
831
832 memset((char *)addr, 0, s);
833
834 /*
835 * Allocate the structures first to preserve word-alignment.
836 */
837 pv_head_table = (pv_entry_t) addr;
838 addr = (vm_offset_t) (pv_head_table + npages);
839
840 pv_lock_table = (char *) addr;
841 addr = (vm_offset_t) (pv_lock_table + pv_lock_table_size(npages));
842
843 pmap_phys_attributes = (char *) addr;
844
845 /*
846 * Create the zone of physical maps,
847 * and of the physical-to-virtual entries.
848 */
849 s = (vm_size_t) sizeof(struct pmap);
850 pmap_zone = zinit(s, 400*s, 4096, "pmap"); /* XXX */
851 s = (vm_size_t) sizeof(struct pv_entry);
852 pv_list_zone = zinit(s, 10000*s, 4096, "pv_list"); /* XXX */
853
854 /*
855 * Only now, when all of the data structures are allocated,
856 * can we set vm_first_phys and vm_last_phys. If we set them
857 * too soon, the kmem_alloc_wired above will try to use these
858 * data structures and blow up.
859 */
860
861 vm_first_phys = avail_start;
862 vm_last_phys = avail_end;
863 pmap_initialized = TRUE;
864
865 /*
866 * Initializie pmap cache.
867 */
868 pmap_cache_list = PMAP_NULL;
869 pmap_cache_count = 0;
870 simple_lock_init(&pmap_cache_lock, ETAP_VM_PMAP_CACHE);
871}
872
873
874#define pmap_valid_page(x) ((avail_start <= x) && (x < avail_end))
875
876
877#define valid_page(x) (pmap_initialized && pmap_valid_page(x))
878
879boolean_t
880pmap_verify_free(
881 vm_offset_t phys)
882{
883 pv_entry_t pv_h;
884 int pai;
885 spl_t spl;
886 boolean_t result;
887
888 assert(phys != vm_page_fictitious_addr);
889 if (!pmap_initialized)
890 return(TRUE);
891
892 if (!pmap_valid_page(phys))
893 return(FALSE);
894
895 PMAP_WRITE_LOCK(spl);
896
897 pai = pa_index(phys);
898 pv_h = pai_to_pvh(pai);
899
900 result = (pv_h->pmap == PMAP_NULL);
901 PMAP_WRITE_UNLOCK(spl);
902
903 return(result);
904}
905
906/*
907 * Create and return a physical map.
908 *
909 * If the size specified for the map
910 * is zero, the map is an actual physical
911 * map, and may be referenced by the
912 * hardware.
913 *
914 * If the size specified is non-zero,
915 * the map will be used in software only, and
916 * is bounded by that size.
917 */
918pmap_t
919pmap_create(
920 vm_size_t size)
921{
922 register pmap_t p;
923 register pmap_statistics_t stats;
924
925 /*
926 * A software use-only map doesn't even need a map.
927 */
928
929 if (size != 0) {
930 return(PMAP_NULL);
931 }
932
933 /*
934 * Try to get cached pmap, if this fails,
935 * allocate a pmap struct from the pmap_zone. Then allocate
936 * the page descriptor table from the pd_zone.
937 */
938
939 simple_lock(&pmap_cache_lock);
940 while ((p = pmap_cache_list) == PMAP_NULL) {
941
942 vm_offset_t dirbases;
943 register int i;
944
945 simple_unlock(&pmap_cache_lock);
946
947#if NCPUS > 1
948 /*
949 * XXX NEEDS MP DOING ALLOC logic so that if multiple processors
950 * XXX get here, only one allocates a chunk of pmaps.
951 * (for now we'll just let it go - safe but wasteful)
952 */
953#endif
954
955 /*
956 * Allocate a chunck of pmaps. Single kmem_alloc_wired
957 * operation reduces kernel map fragmentation.
958 */
959
960 if (kmem_alloc_wired(kernel_map, &dirbases,
961 pmap_alloc_chunk * INTEL_PGBYTES)
962 != KERN_SUCCESS)
963 panic("pmap_create.1");
964
965 for (i = pmap_alloc_chunk; i > 0 ; i--) {
966 p = (pmap_t) zalloc(pmap_zone);
967 if (p == PMAP_NULL)
968 panic("pmap_create.2");
969
970 /*
971 * Initialize pmap. Don't bother with
972 * ref count as cache list is threaded
973 * through it. It'll be set on cache removal.
974 */
975 p->dirbase = (pt_entry_t *) dirbases;
976 dirbases += INTEL_PGBYTES;
977 memcpy(p->dirbase, kpde, INTEL_PGBYTES);
978 p->pdirbase = kvtophys((vm_offset_t)p->dirbase);
979
980 simple_lock_init(&p->lock, ETAP_VM_PMAP);
981 p->cpus_using = 0;
982
983 /*
984 * Initialize statistics.
985 */
986 stats = &p->stats;
987 stats->resident_count = 0;
988 stats->wired_count = 0;
989
990 /*
991 * Insert into cache
992 */
993 simple_lock(&pmap_cache_lock);
994 p->ref_count = (int) pmap_cache_list;
995 pmap_cache_list = p;
996 pmap_cache_count++;
997 simple_unlock(&pmap_cache_lock);
998 }
999 simple_lock(&pmap_cache_lock);
1000 }
1001
1002 assert(p->stats.resident_count == 0);
1003 assert(p->stats.wired_count == 0);
1004 p->stats.resident_count = 0;
1005 p->stats.wired_count = 0;
1006
1007 pmap_cache_list = (pmap_t) p->ref_count;
1008 p->ref_count = 1;
1009 pmap_cache_count--;
1010 simple_unlock(&pmap_cache_lock);
1011
1012 return(p);
1013}
1014
1015/*
1016 * Retire the given physical map from service.
1017 * Should only be called if the map contains
1018 * no valid mappings.
1019 */
1020
1021void
1022pmap_destroy(
1023 register pmap_t p)
1024{
1025 register pt_entry_t *pdep;
1026 register vm_offset_t pa;
1027 register int c;
1028 spl_t s;
1029 register vm_page_t m;
1030
1031 if (p == PMAP_NULL)
1032 return;
1033
1034 SPLVM(s);
1035 simple_lock(&p->lock);
1036 c = --p->ref_count;
1037 if (c == 0) {
1038 register int my_cpu;
1039
1040 mp_disable_preemption();
1041 my_cpu = cpu_number();
1042
1043 /*
1044 * If some cpu is not using the physical pmap pointer that it
1045 * is supposed to be (see set_dirbase), we might be using the
1046 * pmap that is being destroyed! Make sure we are
1047 * physically on the right pmap:
1048 */
1049
1050
1051 if (real_pmap[my_cpu] == p) {
1052 PMAP_CPU_CLR(p, my_cpu);
1053 real_pmap[my_cpu] = kernel_pmap;
1054 PMAP_RELOAD_TLBS();
1055 }
1056 mp_enable_preemption();
1057 }
1058 simple_unlock(&p->lock);
1059 SPLX(s);
1060
1061 if (c != 0) {
1062 return; /* still in use */
1063 }
1064
1065 /*
1066 * Free the memory maps, then the
1067 * pmap structure.
1068 */
1069 pdep = p->dirbase;
1070 while (pdep < &p->dirbase[pdenum(p, LINEAR_KERNEL_ADDRESS)]) {
1071 if (*pdep & INTEL_PTE_VALID) {
1072 pa = pte_to_pa(*pdep);
1073 vm_object_lock(pmap_object);
1074 m = vm_page_lookup(pmap_object, pa);
1075 if (m == VM_PAGE_NULL)
1076 panic("pmap_destroy: pte page not in object");
1077 vm_page_lock_queues();
1078 vm_page_free(m);
1079 inuse_ptepages_count--;
1080 vm_object_unlock(pmap_object);
1081 vm_page_unlock_queues();
1082
1083 /*
1084 * Clear pdes, this might be headed for the cache.
1085 */
1086 c = ptes_per_vm_page;
1087 do {
1088 *pdep = 0;
1089 pdep++;
1090 } while (--c > 0);
1091 }
1092 else {
1093 pdep += ptes_per_vm_page;
1094 }
1095
1096 }
1097 assert(p->stats.resident_count == 0);
1098 assert(p->stats.wired_count == 0);
1099
1100 /*
1101 * Add to cache if not already full
1102 */
1103 simple_lock(&pmap_cache_lock);
1104 if (pmap_cache_count <= pmap_cache_max) {
1105 p->ref_count = (int) pmap_cache_list;
1106 pmap_cache_list = p;
1107 pmap_cache_count++;
1108 simple_unlock(&pmap_cache_lock);
1109 }
1110 else {
1111 simple_unlock(&pmap_cache_lock);
1112 kmem_free(kernel_map, (vm_offset_t)p->dirbase, INTEL_PGBYTES);
1113 zfree(pmap_zone, (vm_offset_t) p);
1114 }
1115}
1116
1117/*
1118 * Add a reference to the specified pmap.
1119 */
1120
1121void
1122pmap_reference(
1123 register pmap_t p)
1124{
1125 spl_t s;
1126
1127 if (p != PMAP_NULL) {
1128 SPLVM(s);
1129 simple_lock(&p->lock);
1130 p->ref_count++;
1131 simple_unlock(&p->lock);
1132 SPLX(s);
1133 }
1134}
1135
1136/*
1137 * Remove a range of hardware page-table entries.
1138 * The entries given are the first (inclusive)
1139 * and last (exclusive) entries for the VM pages.
1140 * The virtual address is the va for the first pte.
1141 *
1142 * The pmap must be locked.
1143 * If the pmap is not the kernel pmap, the range must lie
1144 * entirely within one pte-page. This is NOT checked.
1145 * Assumes that the pte-page exists.
1146 */
1147
1148/* static */
1149void
1150pmap_remove_range(
1151 pmap_t pmap,
1152 vm_offset_t va,
1153 pt_entry_t *spte,
1154 pt_entry_t *epte)
1155{
1156 register pt_entry_t *cpte;
1157 int num_removed, num_unwired;
1158 int pai;
1159 vm_offset_t pa;
1160
1161#if DEBUG_PTE_PAGE
1162 if (pmap != kernel_pmap)
1163 ptep_check(get_pte_page(spte));
1164#endif /* DEBUG_PTE_PAGE */
1165 num_removed = 0;
1166 num_unwired = 0;
1167
1168 for (cpte = spte; cpte < epte;
1169 cpte += ptes_per_vm_page, va += PAGE_SIZE) {
1170
1171 pa = pte_to_pa(*cpte);
1172 if (pa == 0)
1173 continue;
1174
1175 num_removed++;
1176 if (iswired(*cpte))
1177 num_unwired++;
1178
1179 if (!valid_page(pa)) {
1180
1181 /*
1182 * Outside range of managed physical memory.
1183 * Just remove the mappings.
1184 */
1185 register int i = ptes_per_vm_page;
1186 register pt_entry_t *lpte = cpte;
1187 do {
1188 *lpte = 0;
1189 lpte++;
1190 } while (--i > 0);
1191 continue;
1192 }
1193
1194 pai = pa_index(pa);
1195 LOCK_PVH(pai);
1196
1197 /*
1198 * Get the modify and reference bits.
1199 */
1200 {
1201 register int i;
1202 register pt_entry_t *lpte;
1203
1204 i = ptes_per_vm_page;
1205 lpte = cpte;
1206 do {
1207 pmap_phys_attributes[pai] |=
1208 *lpte & (PHYS_MODIFIED|PHYS_REFERENCED);
1209 *lpte = 0;
1210 lpte++;
1211 } while (--i > 0);
1212 }
1213
1214 /*
1215 * Remove the mapping from the pvlist for
1216 * this physical page.
1217 */
1218 {
1219 register pv_entry_t pv_h, prev, cur;
1220
1221 pv_h = pai_to_pvh(pai);
1222 if (pv_h->pmap == PMAP_NULL) {
1223 panic("pmap_remove: null pv_list!");
1224 }
1225 if (pv_h->va == va && pv_h->pmap == pmap) {
1226 /*
1227 * Header is the pv_entry. Copy the next one
1228 * to header and free the next one (we cannot
1229 * free the header)
1230 */
1231 cur = pv_h->next;
1232 if (cur != PV_ENTRY_NULL) {
1233 *pv_h = *cur;
1234 PV_FREE(cur);
1235 }
1236 else {
1237 pv_h->pmap = PMAP_NULL;
1238 }
1239 }
1240 else {
1241 cur = pv_h;
1242 do {
1243 prev = cur;
1244 if ((cur = prev->next) == PV_ENTRY_NULL) {
1245 panic("pmap-remove: mapping not in pv_list!");
1246 }
1247 } while (cur->va != va || cur->pmap != pmap);
1248 prev->next = cur->next;
1249 PV_FREE(cur);
1250 }
1251 UNLOCK_PVH(pai);
1252 }
1253 }
1254
1255 /*
1256 * Update the counts
1257 */
1258 assert(pmap->stats.resident_count >= num_removed);
1259 pmap->stats.resident_count -= num_removed;
1260 assert(pmap->stats.wired_count >= num_unwired);
1261 pmap->stats.wired_count -= num_unwired;
1262}
1263
1264/*
1265 * Remove the given range of addresses
1266 * from the specified map.
1267 *
1268 * It is assumed that the start and end are properly
1269 * rounded to the hardware page size.
1270 */
1271
1272void
1273pmap_remove(
1274 pmap_t map,
1275 vm_offset_t s,
1276 vm_offset_t e)
1277{
1278 spl_t spl;
1279 register pt_entry_t *pde;
1280 register pt_entry_t *spte, *epte;
1281 vm_offset_t l;
1282
1283 if (map == PMAP_NULL)
1284 return;
1285
1286 PMAP_READ_LOCK(map, spl);
1287
1288 pde = pmap_pde(map, s);
1289
1290 while (s < e) {
1291 l = (s + PDE_MAPPED_SIZE) & ~(PDE_MAPPED_SIZE-1);
1292 if (l > e)
1293 l = e;
1294 if (*pde & INTEL_PTE_VALID) {
1295 spte = (pt_entry_t *)ptetokv(*pde);
1296 spte = &spte[ptenum(s)];
1297 epte = &spte[intel_btop(l-s)];
1298 pmap_remove_range(map, s, spte, epte);
1299 }
1300 s = l;
1301 pde++;
1302 }
1303
1304 PMAP_FLUSH_TLBS();
1305
1306 PMAP_READ_UNLOCK(map, spl);
1307}
1308
1309/*
1310 * Routine: pmap_page_protect
1311 *
1312 * Function:
1313 * Lower the permission for all mappings to a given
1314 * page.
1315 */
1316void
1317pmap_page_protect(
1318 vm_offset_t phys,
1319 vm_prot_t prot)
1320{
1321 pv_entry_t pv_h, prev;
1322 register pv_entry_t pv_e;
1323 register pt_entry_t *pte;
1324 int pai;
1325 register pmap_t pmap;
1326 spl_t spl;
1327 boolean_t remove;
1328
1329 assert(phys != vm_page_fictitious_addr);
1330 if (!valid_page(phys)) {
1331 /*
1332 * Not a managed page.
1333 */
1334 return;
1335 }
1336
1337 /*
1338 * Determine the new protection.
1339 */
1340 switch (prot) {
1341 case VM_PROT_READ:
1342 case VM_PROT_READ|VM_PROT_EXECUTE:
1343 remove = FALSE;
1344 break;
1345 case VM_PROT_ALL:
1346 return; /* nothing to do */
1347 default:
1348 remove = TRUE;
1349 break;
1350 }
1351
1352 /*
1353 * Lock the pmap system first, since we will be changing
1354 * several pmaps.
1355 */
1356
1357 PMAP_WRITE_LOCK(spl);
1358
1359 pai = pa_index(phys);
1360 pv_h = pai_to_pvh(pai);
1361
1362 /*
1363 * Walk down PV list, changing or removing all mappings.
1364 * We do not have to lock the pv_list because we have
1365 * the entire pmap system locked.
1366 */
1367 if (pv_h->pmap != PMAP_NULL) {
1368
1369 prev = pv_e = pv_h;
1370 do {
1371 pmap = pv_e->pmap;
1372 /*
1373 * Lock the pmap to block pmap_extract and similar routines.
1374 */
1375 simple_lock(&pmap->lock);
1376
1377 {
1378 register vm_offset_t va;
1379
1380 va = pv_e->va;
1381 pte = pmap_pte(pmap, va);
1382
1383 /*
1384 * Consistency checks.
1385 */
1386 /* assert(*pte & INTEL_PTE_VALID); XXX */
1387 /* assert(pte_to_phys(*pte) == phys); */
1388
1389 /*
1390 * Invalidate TLBs for all CPUs using this mapping.
1391 */
1392 PMAP_INVALIDATE_PAGE(pmap, va);
1393 }
1394
1395 /*
1396 * Remove the mapping if new protection is NONE
1397 * or if write-protecting a kernel mapping.
1398 */
1399 if (remove || pmap == kernel_pmap) {
1400 /*
1401 * Remove the mapping, collecting any modify bits.
1402 */
1403 if (iswired(*pte))
1404 panic("pmap_remove_all removing a wired page");
1405
1406 {
1407 register int i = ptes_per_vm_page;
1408
1409 do {
1410 pmap_phys_attributes[pai] |=
1411 *pte & (PHYS_MODIFIED|PHYS_REFERENCED);
1412 *pte++ = 0;
1413 } while (--i > 0);
1414 }
1415
1416 assert(pmap->stats.resident_count >= 1);
1417 pmap->stats.resident_count--;
1418
1419 /*
1420 * Remove the pv_entry.
1421 */
1422 if (pv_e == pv_h) {
1423 /*
1424 * Fix up head later.
1425 */
1426 pv_h->pmap = PMAP_NULL;
1427 }
1428 else {
1429 /*
1430 * Delete this entry.
1431 */
1432 prev->next = pv_e->next;
1433 PV_FREE(pv_e);
1434 }
1435 }
1436 else {
1437 /*
1438 * Write-protect.
1439 */
1440 register int i = ptes_per_vm_page;
1441
1442 do {
1443 *pte &= ~INTEL_PTE_WRITE;
1444 pte++;
1445 } while (--i > 0);
1446
1447 /*
1448 * Advance prev.
1449 */
1450 prev = pv_e;
1451 }
1452
1453 simple_unlock(&pmap->lock);
1454
1455 } while ((pv_e = prev->next) != PV_ENTRY_NULL);
1456
1457 /*
1458 * If pv_head mapping was removed, fix it up.
1459 */
1460 if (pv_h->pmap == PMAP_NULL) {
1461 pv_e = pv_h->next;
1462 if (pv_e != PV_ENTRY_NULL) {
1463 *pv_h = *pv_e;
1464 PV_FREE(pv_e);
1465 }
1466 }
1467 }
1468
1469 PMAP_WRITE_UNLOCK(spl);
1470}
1471
1472/*
1473 * Set the physical protection on the
1474 * specified range of this map as requested.
1475 * Will not increase permissions.
1476 */
1477void
1478pmap_protect(
1479 pmap_t map,
1480 vm_offset_t s,
1481 vm_offset_t e,
1482 vm_prot_t prot)
1483{
1484 register pt_entry_t *pde;
1485 register pt_entry_t *spte, *epte;
1486 vm_offset_t l;
1487 spl_t spl;
1488
1489
1490 if (map == PMAP_NULL)
1491 return;
1492
1493 /*
1494 * Determine the new protection.
1495 */
1496 switch (prot) {
1497 case VM_PROT_READ:
1498 case VM_PROT_READ|VM_PROT_EXECUTE:
1499 break;
1500 case VM_PROT_READ|VM_PROT_WRITE:
1501 case VM_PROT_ALL:
1502 return; /* nothing to do */
1503 default:
1504 pmap_remove(map, s, e);
1505 return;
1506 }
1507
1508 /*
1509 * If write-protecting in the kernel pmap,
1510 * remove the mappings; the i386 ignores
1511 * the write-permission bit in kernel mode.
1512 *
1513 * XXX should be #if'd for i386
1514 */
1515
1516 if (cpuid_family == CPUID_FAMILY_386)
1517 if (map == kernel_pmap) {
1518 pmap_remove(map, s, e);
1519 return;
1520 }
1521
1522 SPLVM(spl);
1523 simple_lock(&map->lock);
1524
1525
1526 pde = pmap_pde(map, s);
1527 while (s < e) {
1528 l = (s + PDE_MAPPED_SIZE) & ~(PDE_MAPPED_SIZE-1);
1529 if (l > e)
1530 l = e;
1531 if (*pde & INTEL_PTE_VALID) {
1532 spte = (pt_entry_t *)ptetokv(*pde);
1533 spte = &spte[ptenum(s)];
1534 epte = &spte[intel_btop(l-s)];
1535
1536 while (spte < epte) {
1537 if (*spte & INTEL_PTE_VALID)
1538 *spte &= ~INTEL_PTE_WRITE;
1539 spte++;
1540 }
1541 }
1542 s = l;
1543 pde++;
1544 }
1545
1546 PMAP_FLUSH_TLBS();
1547
1548 simple_unlock(&map->lock);
1549 SPLX(spl);
1550}
1551
1552
1553
1554/*
1555 * Insert the given physical page (p) at
1556 * the specified virtual address (v) in the
1557 * target physical map with the protection requested.
1558 *
1559 * If specified, the page will be wired down, meaning
1560 * that the related pte cannot be reclaimed.
1561 *
1562 * NB: This is the only routine which MAY NOT lazy-evaluate
1563 * or lose information. That is, this routine must actually
1564 * insert this page into the given map NOW.
1565 */
1566void
1567pmap_enter(
1568 register pmap_t pmap,
1569 vm_offset_t v,
1570 register vm_offset_t pa,
1571 vm_prot_t prot,
1572 boolean_t wired)
1573{
1574 register pt_entry_t *pte;
1575 register pv_entry_t pv_h;
1576 register int i, pai;
1577 pv_entry_t pv_e;
1578 pt_entry_t template;
1579 spl_t spl;
1580 vm_offset_t old_pa;
1581
1582 XPR(0x80000000, "%x/%x: pmap_enter %x/%x/%x\n",
1583 current_thread()->top_act,
1584 current_thread(),
1585 pmap, v, pa);
1586
1587 assert(pa != vm_page_fictitious_addr);
1588 if (pmap_debug)
1589 printf("pmap(%x, %x)\n", v, pa);
1590 if (pmap == PMAP_NULL)
1591 return;
1592
1593 if (cpuid_family == CPUID_FAMILY_386)
1594 if (pmap == kernel_pmap && (prot & VM_PROT_WRITE) == 0
1595 && !wired /* hack for io_wire */ ) {
1596 /*
1597 * Because the 386 ignores write protection in kernel mode,
1598 * we cannot enter a read-only kernel mapping, and must
1599 * remove an existing mapping if changing it.
1600 *
1601 * XXX should be #if'd for i386
1602 */
1603 PMAP_READ_LOCK(pmap, spl);
1604
1605 pte = pmap_pte(pmap, v);
1606 if (pte != PT_ENTRY_NULL && pte_to_pa(*pte) != 0) {
1607 /*
1608 * Invalidate the translation buffer,
1609 * then remove the mapping.
1610 */
1611 PMAP_INVALIDATE_PAGE(pmap, v);
1612 pmap_remove_range(pmap, v, pte,
1613 pte + ptes_per_vm_page);
1614 }
1615 PMAP_READ_UNLOCK(pmap, spl);
1616 return;
1617 }
1618
1619 /*
1620 * Must allocate a new pvlist entry while we're unlocked;
1621 * zalloc may cause pageout (which will lock the pmap system).
1622 * If we determine we need a pvlist entry, we will unlock
1623 * and allocate one. Then we will retry, throughing away
1624 * the allocated entry later (if we no longer need it).
1625 */
1626 pv_e = PV_ENTRY_NULL;
1627Retry:
1628 PMAP_READ_LOCK(pmap, spl);
1629
1630 /*
1631 * Expand pmap to include this pte. Assume that
1632 * pmap is always expanded to include enough hardware
1633 * pages to map one VM page.
1634 */
1635
1636 while ((pte = pmap_pte(pmap, v)) == PT_ENTRY_NULL) {
1637 /*
1638 * Must unlock to expand the pmap.
1639 */
1640 PMAP_READ_UNLOCK(pmap, spl);
1641
1642 pmap_expand(pmap, v);
1643
1644 PMAP_READ_LOCK(pmap, spl);
1645 }
1646 /*
1647 * Special case if the physical page is already mapped
1648 * at this address.
1649 */
1650 old_pa = pte_to_pa(*pte);
1651 if (old_pa == pa) {
1652 /*
1653 * May be changing its wired attribute or protection
1654 */
1655
1656 template = pa_to_pte(pa) | INTEL_PTE_VALID;
1657 if (pmap != kernel_pmap)
1658 template |= INTEL_PTE_USER;
1659 if (prot & VM_PROT_WRITE)
1660 template |= INTEL_PTE_WRITE;
1661 if (wired) {
1662 template |= INTEL_PTE_WIRED;
1663 if (!iswired(*pte))
1664 pmap->stats.wired_count++;
1665 }
1666 else {
1667 if (iswired(*pte)) {
1668 assert(pmap->stats.wired_count >= 1);
1669 pmap->stats.wired_count--;
1670 }
1671 }
1672
1673 PMAP_INVALIDATE_PAGE(pmap, v);
1674
1675 i = ptes_per_vm_page;
1676 do {
1677 if (*pte & INTEL_PTE_MOD)
1678 template |= INTEL_PTE_MOD;
1679 WRITE_PTE(pte, template)
1680 pte++;
1681 pte_increment_pa(template);
1682 } while (--i > 0);
1683
1684 goto Done;
1685 }
1686
1687 /*
1688 * Outline of code from here:
1689 * 1) If va was mapped, update TLBs, remove the mapping
1690 * and remove old pvlist entry.
1691 * 2) Add pvlist entry for new mapping
1692 * 3) Enter new mapping.
1693 *
1694 * SHARING_FAULTS complicates this slightly in that it cannot
1695 * replace the mapping, but must remove it (because adding the
1696 * pvlist entry for the new mapping may remove others), and
1697 * hence always enters the new mapping at step 3)
1698 *
1699 * If the old physical page is not managed step 1) is skipped
1700 * (except for updating the TLBs), and the mapping is
1701 * overwritten at step 3). If the new physical page is not
1702 * managed, step 2) is skipped.
1703 */
1704
1705 if (old_pa != (vm_offset_t) 0) {
1706
1707 PMAP_INVALIDATE_PAGE(pmap, v);
1708
1709#if DEBUG_PTE_PAGE
1710 if (pmap != kernel_pmap)
1711 ptep_check(get_pte_page(pte));
1712#endif /* DEBUG_PTE_PAGE */
1713
1714 /*
1715 * Don't do anything to pages outside valid memory here.
1716 * Instead convince the code that enters a new mapping
1717 * to overwrite the old one.
1718 */
1719
1720 if (valid_page(old_pa)) {
1721
1722 pai = pa_index(old_pa);
1723 LOCK_PVH(pai);
1724
1725 assert(pmap->stats.resident_count >= 1);
1726 pmap->stats.resident_count--;
1727 if (iswired(*pte)) {
1728 assert(pmap->stats.wired_count >= 1);
1729 pmap->stats.wired_count--;
1730 }
1731 i = ptes_per_vm_page;
1732 do {
1733 pmap_phys_attributes[pai] |=
1734 *pte & (PHYS_MODIFIED|PHYS_REFERENCED);
1735 WRITE_PTE(pte, 0)
1736 pte++;
1737 pte_increment_pa(template);
1738 } while (--i > 0);
1739
1740 /*
1741 * Put pte back to beginning of page since it'll be
1742 * used later to enter the new page.
1743 */
1744 pte -= ptes_per_vm_page;
1745
1746 /*
1747 * Remove the mapping from the pvlist for
1748 * this physical page.
1749 */
1750 {
1751 register pv_entry_t prev, cur;
1752
1753 pv_h = pai_to_pvh(pai);
1754 if (pv_h->pmap == PMAP_NULL) {
1755 panic("pmap_enter: null pv_list!");
1756 }
1757 if (pv_h->va == v && pv_h->pmap == pmap) {
1758 /*
1759 * Header is the pv_entry. Copy the next one
1760 * to header and free the next one (we cannot
1761 * free the header)
1762 */
1763 cur = pv_h->next;
1764 if (cur != PV_ENTRY_NULL) {
1765 *pv_h = *cur;
1766 pv_e = cur;
1767 }
1768 else {
1769 pv_h->pmap = PMAP_NULL;
1770 }
1771 }
1772 else {
1773 cur = pv_h;
1774 do {
1775 prev = cur;
1776 if ((cur = prev->next) == PV_ENTRY_NULL) {
1777 panic("pmap_enter: mapping not in pv_list!");
1778 }
1779 } while (cur->va != v || cur->pmap != pmap);
1780 prev->next = cur->next;
1781 pv_e = cur;
1782 }
1783 }
1784 UNLOCK_PVH(pai);
1785 }
1786 else {
1787
1788 /*
1789 * old_pa is not managed. Pretend it's zero so code
1790 * at Step 3) will enter new mapping (overwriting old
1791 * one). Do removal part of accounting.
1792 */
1793 old_pa = (vm_offset_t) 0;
1794 assert(pmap->stats.resident_count >= 1);
1795 pmap->stats.resident_count--;
1796 if (iswired(*pte)) {
1797 assert(pmap->stats.wired_count >= 1);
1798 pmap->stats.wired_count--;
1799 }
1800 }
1801 }
1802
1803 if (valid_page(pa)) {
1804
1805 /*
1806 * Step 2) Enter the mapping in the PV list for this
1807 * physical page.
1808 */
1809
1810 pai = pa_index(pa);
1811
1812
1813#if SHARING_FAULTS
1814RetryPvList:
1815 /*
1816 * We can return here from the sharing fault code below
1817 * in case we removed the only entry on the pv list and thus
1818 * must enter the new one in the list header.
1819 */
1820#endif /* SHARING_FAULTS */
1821 LOCK_PVH(pai);
1822 pv_h = pai_to_pvh(pai);
1823
1824 if (pv_h->pmap == PMAP_NULL) {
1825 /*
1826 * No mappings yet
1827 */
1828 pv_h->va = v;
1829 pv_h->pmap = pmap;
1830 pv_h->next = PV_ENTRY_NULL;
1831 }
1832 else {
1833#if DEBUG
1834 {
1835 /*
1836 * check that this mapping is not already there
1837 * or there is no alias for this mapping in the same map
1838 */
1839 pv_entry_t e = pv_h;
1840 while (e != PV_ENTRY_NULL) {
1841 if (e->pmap == pmap && e->va == v)
1842 panic("pmap_enter: already in pv_list");
1843 e = e->next;
1844 }
1845 }
1846#endif /* DEBUG */
1847#if SHARING_FAULTS
1848 {
1849 /*
1850 * do sharing faults.
1851 * if we find an entry on this pv list in the same address
1852 * space, remove it. we know there will not be more
1853 * than one.
1854 */
1855 pv_entry_t e = pv_h;
1856 pt_entry_t *opte;
1857
1858 while (e != PV_ENTRY_NULL) {
1859 if (e->pmap == pmap) {
1860 /*
1861 * Remove it, drop pv list lock first.
1862 */
1863 UNLOCK_PVH(pai);
1864
1865 opte = pmap_pte(pmap, e->va);
1866 assert(opte != PT_ENTRY_NULL);
1867 /*
1868 * Invalidate the translation buffer,
1869 * then remove the mapping.
1870 */
1871 PMAP_INVALIDATE_PAGE(pmap, e->va);
1872 pmap_remove_range(pmap, e->va, opte,
1873 opte + ptes_per_vm_page);
1874 /*
1875 * We could have remove the head entry,
1876 * so there could be no more entries
1877 * and so we have to use the pv head entry.
1878 * so, go back to the top and try the entry
1879 * again.
1880 */
1881 goto RetryPvList;
1882 }
1883 e = e->next;
1884 }
1885
1886 /*
1887 * check that this mapping is not already there
1888 */
1889 e = pv_h;
1890 while (e != PV_ENTRY_NULL) {
1891 if (e->pmap == pmap)
1892 panic("pmap_enter: alias in pv_list");
1893 e = e->next;
1894 }
1895 }
1896#endif /* SHARING_FAULTS */
1897#if DEBUG_ALIAS
1898 {
1899 /*
1900 * check for aliases within the same address space.
1901 */
1902 pv_entry_t e = pv_h;
1903 vm_offset_t rpc = get_rpc();
1904
1905 while (e != PV_ENTRY_NULL) {
1906 if (e->pmap == pmap) {
1907 /*
1908 * log this entry in the alias ring buffer
1909 * if it's not there already.
1910 */
1911 struct pmap_alias *pma;
1912 int ii, logit;
1913
1914 logit = TRUE;
1915 for (ii = 0; ii < pmap_alias_index; ii++) {
1916 if (pmap_aliasbuf[ii].rpc == rpc) {
1917 /* found it in the log already */
1918 logit = FALSE;
1919 break;
1920 }
1921 }
1922 if (logit) {
1923 pma = &pmap_aliasbuf[pmap_alias_index];
1924 pma->pmap = pmap;
1925 pma->va = v;
1926 pma->rpc = rpc;
1927 pma->cookie = PMAP_ALIAS_COOKIE;
1928 if (++pmap_alias_index >= PMAP_ALIAS_MAX)
1929 panic("pmap_enter: exhausted alias log");
1930 }
1931 }
1932 e = e->next;
1933 }
1934 }
1935#endif /* DEBUG_ALIAS */
1936 /*
1937 * Add new pv_entry after header.
1938 */
1939 if (pv_e == PV_ENTRY_NULL) {
1940 PV_ALLOC(pv_e);
1941 if (pv_e == PV_ENTRY_NULL) {
1942 UNLOCK_PVH(pai);
1943 PMAP_READ_UNLOCK(pmap, spl);
1944
1945 /*
1946 * Refill from zone.
1947 */
1948 pv_e = (pv_entry_t) zalloc(pv_list_zone);
1949 goto Retry;
1950 }
1951 }
1952 pv_e->va = v;
1953 pv_e->pmap = pmap;
1954 pv_e->next = pv_h->next;
1955 pv_h->next = pv_e;
1956 /*
1957 * Remember that we used the pvlist entry.
1958 */
1959 pv_e = PV_ENTRY_NULL;
1960 }
1961 UNLOCK_PVH(pai);
1962 }
1963
1964 /*
1965 * Step 3) Enter and count the mapping.
1966 */
1967
1968 pmap->stats.resident_count++;
1969
1970 /*
1971 * Build a template to speed up entering -
1972 * only the pfn changes.
1973 */
1974 template = pa_to_pte(pa) | INTEL_PTE_VALID;
1975 if (pmap != kernel_pmap)
1976 template |= INTEL_PTE_USER;
1977 if (prot & VM_PROT_WRITE)
1978 template |= INTEL_PTE_WRITE;
1979 if (wired) {
1980 template |= INTEL_PTE_WIRED;
1981 pmap->stats.wired_count++;
1982 }
1983 i = ptes_per_vm_page;
1984 do {
1985 WRITE_PTE(pte, template)
1986 pte++;
1987 pte_increment_pa(template);
1988 } while (--i > 0);
1989Done:
1990 if (pv_e != PV_ENTRY_NULL) {
1991 PV_FREE(pv_e);
1992 }
1993
1994 PMAP_READ_UNLOCK(pmap, spl);
1995}
1996
1997/*
1998 * Routine: pmap_change_wiring
1999 * Function: Change the wiring attribute for a map/virtual-address
2000 * pair.
2001 * In/out conditions:
2002 * The mapping must already exist in the pmap.
2003 */
2004void
2005pmap_change_wiring(
2006 register pmap_t map,
2007 vm_offset_t v,
2008 boolean_t wired)
2009{
2010 register pt_entry_t *pte;
2011 register int i;
2012 spl_t spl;
2013
2014 /*
2015 * We must grab the pmap system lock because we may
2016 * change a pte_page queue.
2017 */
2018 PMAP_READ_LOCK(map, spl);
2019
2020 if ((pte = pmap_pte(map, v)) == PT_ENTRY_NULL)
2021 panic("pmap_change_wiring: pte missing");
2022
2023 if (wired && !iswired(*pte)) {
2024 /*
2025 * wiring down mapping
2026 */
2027 map->stats.wired_count++;
2028 i = ptes_per_vm_page;
2029 do {
2030 *pte++ |= INTEL_PTE_WIRED;
2031 } while (--i > 0);
2032 }
2033 else if (!wired && iswired(*pte)) {
2034 /*
2035 * unwiring mapping
2036 */
2037 assert(map->stats.wired_count >= 1);
2038 map->stats.wired_count--;
2039 i = ptes_per_vm_page;
2040 do {
2041 *pte++ &= ~INTEL_PTE_WIRED;
2042 } while (--i > 0);
2043 }
2044
2045 PMAP_READ_UNLOCK(map, spl);
2046}
2047
2048/*
2049 * Routine: pmap_extract
2050 * Function:
2051 * Extract the physical page address associated
2052 * with the given map/virtual_address pair.
2053 */
2054
2055vm_offset_t
2056pmap_extract(
2057 register pmap_t pmap,
2058 vm_offset_t va)
2059{
2060 register pt_entry_t *pte;
2061 register vm_offset_t pa;
2062 spl_t spl;
2063
2064 SPLVM(spl);
2065 simple_lock(&pmap->lock);
2066 if ((pte = pmap_pte(pmap, va)) == PT_ENTRY_NULL)
2067 pa = (vm_offset_t) 0;
2068 else if (!(*pte & INTEL_PTE_VALID))
2069 pa = (vm_offset_t) 0;
2070 else
2071 pa = pte_to_pa(*pte) + (va & INTEL_OFFMASK);
2072 simple_unlock(&pmap->lock);
2073 SPLX(spl);
2074 return(pa);
2075}
2076
2077/*
2078 * Routine: pmap_expand
2079 *
2080 * Expands a pmap to be able to map the specified virtual address.
2081 *
2082 * Allocates new virtual memory for the P0 or P1 portion of the
2083 * pmap, then re-maps the physical pages that were in the old
2084 * pmap to be in the new pmap.
2085 *
2086 * Must be called with the pmap system and the pmap unlocked,
2087 * since these must be unlocked to use vm_allocate or vm_deallocate.
2088 * Thus it must be called in a loop that checks whether the map
2089 * has been expanded enough.
2090 * (We won't loop forever, since page tables aren't shrunk.)
2091 */
2092void
2093pmap_expand(
2094 register pmap_t map,
2095 register vm_offset_t v)
2096{
2097 pt_entry_t *pdp;
2098 register vm_page_t m;
2099 register vm_offset_t pa;
2100 register int i;
2101 spl_t spl;
2102
2103 if (map == kernel_pmap)
2104 panic("pmap_expand");
2105
2106 /*
2107 * We cannot allocate the pmap_object in pmap_init,
2108 * because it is called before the zone package is up.
2109 * Allocate it now if it is missing.
2110 */
2111 if (pmap_object == VM_OBJECT_NULL)
2112 pmap_object = vm_object_allocate(avail_end);
2113
2114 /*
2115 * Allocate a VM page for the level 2 page table entries.
2116 */
2117 while ((m = vm_page_grab()) == VM_PAGE_NULL)
2118 VM_PAGE_WAIT();
2119
2120 /*
2121 * Map the page to its physical address so that it
2122 * can be found later.
2123 */
2124 pa = m->phys_addr;
2125 vm_object_lock(pmap_object);
2126 vm_page_insert(m, pmap_object, pa);
2127 vm_page_lock_queues();
2128 vm_page_wire(m);
2129 inuse_ptepages_count++;
2130 vm_object_unlock(pmap_object);
2131 vm_page_unlock_queues();
2132
2133 /*
2134 * Zero the page.
2135 */
2136 memset((void *)phystokv(pa), 0, PAGE_SIZE);
2137
2138 PMAP_READ_LOCK(map, spl);
2139 /*
2140 * See if someone else expanded us first
2141 */
2142 if (pmap_pte(map, v) != PT_ENTRY_NULL) {
2143 PMAP_READ_UNLOCK(map, spl);
2144 vm_object_lock(pmap_object);
2145 vm_page_lock_queues();
2146 vm_page_free(m);
2147 inuse_ptepages_count--;
2148 vm_page_unlock_queues();
2149 vm_object_unlock(pmap_object);
2150 return;
2151 }
2152
2153 /*
2154 * Set the page directory entry for this page table.
2155 * If we have allocated more than one hardware page,
2156 * set several page directory entries.
2157 */
2158
2159 i = ptes_per_vm_page;
2160 pdp = &map->dirbase[pdenum(map, v) & ~(i-1)];
2161 do {
2162 *pdp = pa_to_pte(pa)
2163 | INTEL_PTE_VALID
2164 | INTEL_PTE_USER
2165 | INTEL_PTE_WRITE;
2166 pdp++;
2167 pa += INTEL_PGBYTES;
2168 } while (--i > 0);
2169
2170 PMAP_READ_UNLOCK(map, spl);
2171 return;
2172}
2173
2174/*
2175 * Copy the range specified by src_addr/len
2176 * from the source map to the range dst_addr/len
2177 * in the destination map.
2178 *
2179 * This routine is only advisory and need not do anything.
2180 */
2181#if 0
2182void
2183pmap_copy(
2184 pmap_t dst_pmap,
2185 pmap_t src_pmap,
2186 vm_offset_t dst_addr,
2187 vm_size_t len,
2188 vm_offset_t src_addr)
2189{
2190#ifdef lint
2191 dst_pmap++; src_pmap++; dst_addr++; len++; src_addr++;
2192#endif /* lint */
2193}
2194#endif/* 0 */
2195
2196int collect_ref;
2197int collect_unref;
2198
2199/*
2200 * Routine: pmap_collect
2201 * Function:
2202 * Garbage collects the physical map system for
2203 * pages which are no longer used.
2204 * Success need not be guaranteed -- that is, there
2205 * may well be pages which are not referenced, but
2206 * others may be collected.
2207 * Usage:
2208 * Called by the pageout daemon when pages are scarce.
2209 */
2210void
2211pmap_collect(
2212 pmap_t p)
2213{
2214 register pt_entry_t *pdp, *ptp;
2215 pt_entry_t *eptp;
2216 vm_offset_t pa;
2217 int wired;
2218 spl_t spl;
2219
2220 if (p == PMAP_NULL)
2221 return;
2222
2223 if (p == kernel_pmap)
2224 return;
2225
2226 /*
2227 * Garbage collect map.
2228 */
2229 PMAP_READ_LOCK(p, spl);
2230 PMAP_FLUSH_TLBS();
2231
2232 for (pdp = p->dirbase;
2233 pdp < &p->dirbase[pdenum(p, LINEAR_KERNEL_ADDRESS)];
2234 pdp += ptes_per_vm_page)
2235 {
2236 if (*pdp & INTEL_PTE_VALID)
2237 if(*pdp & INTEL_PTE_REF) {
2238 *pdp &= ~INTEL_PTE_REF;
2239 collect_ref++;
2240 } else {
2241 collect_unref++;
2242 pa = pte_to_pa(*pdp);
2243 ptp = (pt_entry_t *)phystokv(pa);
2244 eptp = ptp + NPTES*ptes_per_vm_page;
2245
2246 /*
2247 * If the pte page has any wired mappings, we cannot
2248 * free it.
2249 */
2250 wired = 0;
2251 {
2252 register pt_entry_t *ptep;
2253 for (ptep = ptp; ptep < eptp; ptep++) {
2254 if (iswired(*ptep)) {
2255 wired = 1;
2256 break;
2257 }
2258 }
2259 }
2260 if (!wired) {
2261 /*
2262 * Remove the virtual addresses mapped by this pte page.
2263 */
2264 pmap_remove_range(p,
2265 pdetova(pdp - p->dirbase),
2266 ptp,
2267 eptp);
2268
2269 /*
2270 * Invalidate the page directory pointer.
2271 */
2272 {
2273 register int i = ptes_per_vm_page;
2274 register pt_entry_t *pdep = pdp;
2275 do {
2276 *pdep++ = 0;
2277 } while (--i > 0);
2278 }
2279
2280 PMAP_READ_UNLOCK(p, spl);
2281
2282 /*
2283 * And free the pte page itself.
2284 */
2285 {
2286 register vm_page_t m;
2287
2288 vm_object_lock(pmap_object);
2289 m = vm_page_lookup(pmap_object, pa);
2290 if (m == VM_PAGE_NULL)
2291 panic("pmap_collect: pte page not in object");
2292 vm_page_lock_queues();
2293 vm_page_free(m);
2294 inuse_ptepages_count--;
2295 vm_page_unlock_queues();
2296 vm_object_unlock(pmap_object);
2297 }
2298
2299 PMAP_READ_LOCK(p, spl);
2300 }
2301 }
2302 }
2303 PMAP_READ_UNLOCK(p, spl);
2304 return;
2305
2306}
2307
2308/*
2309 * Routine: pmap_kernel
2310 * Function:
2311 * Returns the physical map handle for the kernel.
2312 */
2313#if 0
2314pmap_t
2315pmap_kernel(void)
2316{
2317 return (kernel_pmap);
2318}
2319#endif/* 0 */
2320
2321/*
2322 * pmap_zero_page zeros the specified (machine independent) page.
2323 * See machine/phys.c or machine/phys.s for implementation.
2324 */
2325#if 0
2326void
2327pmap_zero_page(
2328 register vm_offset_t phys)
2329{
2330 register int i;
2331
2332 assert(phys != vm_page_fictitious_addr);
2333 i = PAGE_SIZE / INTEL_PGBYTES;
2334 phys = intel_pfn(phys);
2335
2336 while (i--)
2337 zero_phys(phys++);
2338}
2339#endif/* 0 */
2340
2341/*
2342 * pmap_copy_page copies the specified (machine independent) page.
2343 * See machine/phys.c or machine/phys.s for implementation.
2344 */
2345#if 0
2346void
2347pmap_copy_page(
2348 vm_offset_t src,
2349 vm_offset_t dst)
2350{
2351 int i;
2352
2353 assert(src != vm_page_fictitious_addr);
2354 assert(dst != vm_page_fictitious_addr);
2355 i = PAGE_SIZE / INTEL_PGBYTES;
2356
2357 while (i--) {
2358 copy_phys(intel_pfn(src), intel_pfn(dst));
2359 src += INTEL_PGBYTES;
2360 dst += INTEL_PGBYTES;
2361 }
2362}
2363#endif/* 0 */
2364
2365/*
2366 * Routine: pmap_pageable
2367 * Function:
2368 * Make the specified pages (by pmap, offset)
2369 * pageable (or not) as requested.
2370 *
2371 * A page which is not pageable may not take
2372 * a fault; therefore, its page table entry
2373 * must remain valid for the duration.
2374 *
2375 * This routine is merely advisory; pmap_enter
2376 * will specify that these pages are to be wired
2377 * down (or not) as appropriate.
2378 */
2379void
2380pmap_pageable(
2381 pmap_t pmap,
2382 vm_offset_t start,
2383 vm_offset_t end,
2384 boolean_t pageable)
2385{
2386#ifdef lint
2387 pmap++; start++; end++; pageable++;
2388#endif /* lint */
2389}
2390
2391/*
2392 * Clear specified attribute bits.
2393 */
2394void
2395phys_attribute_clear(
2396 vm_offset_t phys,
2397 int bits)
2398{
2399 pv_entry_t pv_h;
2400 register pv_entry_t pv_e;
2401 register pt_entry_t *pte;
2402 int pai;
2403 register pmap_t pmap;
2404 spl_t spl;
2405
2406 assert(phys != vm_page_fictitious_addr);
2407 if (!valid_page(phys)) {
2408 /*
2409 * Not a managed page.
2410 */
2411 return;
2412 }
2413
2414 /*
2415 * Lock the pmap system first, since we will be changing
2416 * several pmaps.
2417 */
2418
2419 PMAP_WRITE_LOCK(spl);
2420
2421 pai = pa_index(phys);
2422 pv_h = pai_to_pvh(pai);
2423
2424 /*
2425 * Walk down PV list, clearing all modify or reference bits.
2426 * We do not have to lock the pv_list because we have
2427 * the entire pmap system locked.
2428 */
2429 if (pv_h->pmap != PMAP_NULL) {
2430 /*
2431 * There are some mappings.
2432 */
2433 for (pv_e = pv_h; pv_e != PV_ENTRY_NULL; pv_e = pv_e->next) {
2434
2435 pmap = pv_e->pmap;
2436 /*
2437 * Lock the pmap to block pmap_extract and similar routines.
2438 */
2439 simple_lock(&pmap->lock);
2440
2441 {
2442 register vm_offset_t va;
2443
2444 va = pv_e->va;
2445 pte = pmap_pte(pmap, va);
2446
2447#if 0
2448 /*
2449 * Consistency checks.
2450 */
2451 assert(*pte & INTEL_PTE_VALID);
2452 /* assert(pte_to_phys(*pte) == phys); */
2453#endif
2454
2455 /*
2456 * Invalidate TLBs for all CPUs using this mapping.
2457 */
2458 PMAP_INVALIDATE_PAGE(pmap, va);
2459 }
2460
2461 /*
2462 * Clear modify or reference bits.
2463 */
2464 {
2465 register int i = ptes_per_vm_page;
2466 do {
2467 *pte++ &= ~bits;
2468 } while (--i > 0);
2469 }
2470 simple_unlock(&pmap->lock);
2471 }
2472 }
2473
2474 pmap_phys_attributes[pai] &= ~bits;
2475
2476 PMAP_WRITE_UNLOCK(spl);
2477}
2478
2479/*
2480 * Check specified attribute bits.
2481 */
2482boolean_t
2483phys_attribute_test(
2484 vm_offset_t phys,
2485 int bits)
2486{
2487 pv_entry_t pv_h;
2488 register pv_entry_t pv_e;
2489 register pt_entry_t *pte;
2490 int pai;
2491 register pmap_t pmap;
2492 spl_t spl;
2493
2494 assert(phys != vm_page_fictitious_addr);
2495 if (!valid_page(phys)) {
2496 /*
2497 * Not a managed page.
2498 */
2499 return (FALSE);
2500 }
2501
2502 /*
2503 * Lock the pmap system first, since we will be checking
2504 * several pmaps.
2505 */
2506
2507 PMAP_WRITE_LOCK(spl);
2508
2509 pai = pa_index(phys);
2510 pv_h = pai_to_pvh(pai);
2511
2512 if (pmap_phys_attributes[pai] & bits) {
2513 PMAP_WRITE_UNLOCK(spl);
2514 return (TRUE);
2515 }
2516
2517 /*
2518 * Walk down PV list, checking all mappings.
2519 * We do not have to lock the pv_list because we have
2520 * the entire pmap system locked.
2521 */
2522 if (pv_h->pmap != PMAP_NULL) {
2523 /*
2524 * There are some mappings.
2525 */
2526 for (pv_e = pv_h; pv_e != PV_ENTRY_NULL; pv_e = pv_e->next) {
2527
2528 pmap = pv_e->pmap;
2529 /*
2530 * Lock the pmap to block pmap_extract and similar routines.
2531 */
2532 simple_lock(&pmap->lock);
2533
2534 {
2535 register vm_offset_t va;
2536
2537 va = pv_e->va;
2538 pte = pmap_pte(pmap, va);
2539
2540#if 0
2541 /*
2542 * Consistency checks.
2543 */
2544 assert(*pte & INTEL_PTE_VALID);
2545 /* assert(pte_to_phys(*pte) == phys); */
2546#endif
2547 }
2548
2549 /*
2550 * Check modify or reference bits.
2551 */
2552 {
2553 register int i = ptes_per_vm_page;
2554
2555 do {
2556 if (*pte++ & bits) {
2557 simple_unlock(&pmap->lock);
2558 PMAP_WRITE_UNLOCK(spl);
2559 return (TRUE);
2560 }
2561 } while (--i > 0);
2562 }
2563 simple_unlock(&pmap->lock);
2564 }
2565 }
2566 PMAP_WRITE_UNLOCK(spl);
2567 return (FALSE);
2568}
2569
2570/*
2571 * Set specified attribute bits.
2572 */
2573void
2574phys_attribute_set(
2575 vm_offset_t phys,
2576 int bits)
2577{
2578 int spl;
2579
2580 assert(phys != vm_page_fictitious_addr);
2581 if (!valid_page(phys)) {
2582 /*
2583 * Not a managed page.
2584 */
2585 return;
2586 }
2587
2588 /*
2589 * Lock the pmap system and set the requested bits in
2590 * the phys attributes array. Don't need to bother with
2591 * ptes because the test routine looks here first.
2592 */
2593
2594 PMAP_WRITE_LOCK(spl);
2595 pmap_phys_attributes[pa_index(phys)] |= bits;
2596 PMAP_WRITE_UNLOCK(spl);
2597}
2598
2599/*
2600 * Set the modify bit on the specified physical page.
2601 */
2602
2603void pmap_set_modify(
2604 register vm_offset_t phys)
2605{
2606 phys_attribute_set(phys, PHYS_MODIFIED);
2607}
2608
2609/*
2610 * Clear the modify bits on the specified physical page.
2611 */
2612
2613void
2614pmap_clear_modify(
2615 register vm_offset_t phys)
2616{
2617 phys_attribute_clear(phys, PHYS_MODIFIED);
2618}
2619
2620/*
2621 * pmap_is_modified:
2622 *
2623 * Return whether or not the specified physical page is modified
2624 * by any physical maps.
2625 */
2626
2627boolean_t
2628pmap_is_modified(
2629 register vm_offset_t phys)
2630{
2631 return (phys_attribute_test(phys, PHYS_MODIFIED));
2632}
2633
2634/*
2635 * pmap_clear_reference:
2636 *
2637 * Clear the reference bit on the specified physical page.
2638 */
2639
2640void
2641pmap_clear_reference(
2642 vm_offset_t phys)
2643{
2644 phys_attribute_clear(phys, PHYS_REFERENCED);
2645}
2646
2647/*
2648 * pmap_is_referenced:
2649 *
2650 * Return whether or not the specified physical page is referenced
2651 * by any physical maps.
2652 */
2653
2654boolean_t
2655pmap_is_referenced(
2656 vm_offset_t phys)
2657{
2658 return (phys_attribute_test(phys, PHYS_REFERENCED));
2659}
2660
2661/*
2662 * Set the modify bit on the specified range
2663 * of this map as requested.
2664 *
2665 * This optimization stands only if each time the dirty bit
2666 * in vm_page_t is tested, it is also tested in the pmap.
2667 */
2668void
2669pmap_modify_pages(
2670 pmap_t map,
2671 vm_offset_t s,
2672 vm_offset_t e)
2673{
2674 spl_t spl;
2675 register pt_entry_t *pde;
2676 register pt_entry_t *spte, *epte;
2677 vm_offset_t l;
2678
2679 if (map == PMAP_NULL)
2680 return;
2681
2682 PMAP_READ_LOCK(map, spl);
2683
2684 pde = pmap_pde(map, s);
2685 while (s && s < e) {
2686 l = (s + PDE_MAPPED_SIZE) & ~(PDE_MAPPED_SIZE-1);
2687 if (l > e)
2688 l = e;
2689 if (*pde & INTEL_PTE_VALID) {
2690 spte = (pt_entry_t *)ptetokv(*pde);
2691 if (l) {
2692 spte = &spte[ptenum(s)];
2693 epte = &spte[intel_btop(l-s)];
2694 } else {
2695 epte = &spte[intel_btop(PDE_MAPPED_SIZE)];
2696 spte = &spte[ptenum(s)];
2697 }
2698 while (spte < epte) {
2699 if (*spte & INTEL_PTE_VALID) {
2700 *spte |= (INTEL_PTE_MOD | INTEL_PTE_WRITE);
2701 }
2702 spte++;
2703 }
2704 }
2705 s = l;
2706 pde++;
2707 }
2708 PMAP_FLUSH_TLBS();
2709 PMAP_READ_UNLOCK(map, spl);
2710}
2711
2712
2713void
2714invalidate_icache(vm_offset_t addr, unsigned cnt, int phys)
2715{
2716 return;
2717}
2718void
2719flush_dcache(vm_offset_t addr, unsigned count, int phys)
2720{
2721 return;
2722}
2723
2724#if NCPUS > 1
2725
2726void inline
2727pmap_wait_for_clear()
2728{
2729 register int my_cpu;
2730 spl_t s;
2731 register pmap_t my_pmap;
2732
2733 mp_disable_preemption();
2734 my_cpu = cpu_number();
2735
2736
2737 my_pmap = real_pmap[my_cpu];
2738
2739 if (!(my_pmap && pmap_in_use(my_pmap, my_cpu)))
2740 my_pmap = kernel_pmap;
2741
2742 /*
2743 * Raise spl to splhigh (above splip) to block out pmap_extract
2744 * from IO code (which would put this cpu back in the active
2745 * set).
2746 */
2747 s = splhigh();
2748
2749 /*
2750 * Wait for any pmap updates in progress, on either user
2751 * or kernel pmap.
2752 */
2753 while (*(volatile hw_lock_t)&my_pmap->lock.interlock ||
2754 *(volatile hw_lock_t)&kernel_pmap->lock.interlock) {
2755 continue;
2756 }
2757
2758 splx(s);
2759 mp_enable_preemption();
2760}
2761
2762void
2763pmap_flush_tlb_interrupt(void) {
2764 pmap_wait_for_clear();
2765
2766 flush_tlb();
2767}
2768
2769void
2770pmap_reload_tlb_interrupt(void) {
2771 pmap_wait_for_clear();
2772
2773 set_cr3(kernel_pmap->pdirbase);
2774}
2775
2776
2777#endif /* NCPUS > 1 */
2778
2779#if MACH_KDB
2780
2781/* show phys page mappings and attributes */
2782
2783extern void db_show_page(vm_offset_t pa);
2784
2785void
2786db_show_page(vm_offset_t pa)
2787{
2788 pv_entry_t pv_h;
2789 int pai;
2790 char attr;
2791
2792 pai = pa_index(pa);
2793 pv_h = pai_to_pvh(pai);
2794
2795 attr = pmap_phys_attributes[pai];
2796 printf("phys page %x ", pa);
2797 if (attr & PHYS_MODIFIED)
2798 printf("modified, ");
2799 if (attr & PHYS_REFERENCED)
2800 printf("referenced, ");
2801 if (pv_h->pmap || pv_h->next)
2802 printf(" mapped at\n");
2803 else
2804 printf(" not mapped\n");
2805 for (; pv_h; pv_h = pv_h->next)
2806 if (pv_h->pmap)
2807 printf("%x in pmap %x\n", pv_h->va, pv_h->pmap);
2808}
2809
2810#endif /* MACH_KDB */
2811
2812#if MACH_KDB
2813void db_kvtophys(vm_offset_t);
2814void db_show_vaddrs(pt_entry_t *);
2815
2816/*
2817 * print out the results of kvtophys(arg)
2818 */
2819void
2820db_kvtophys(
2821 vm_offset_t vaddr)
2822{
2823 db_printf("0x%x", kvtophys(vaddr));
2824}
2825
2826/*
2827 * Walk the pages tables.
2828 */
2829void
2830db_show_vaddrs(
2831 pt_entry_t *dirbase)
2832{
2833 pt_entry_t *ptep, *pdep, tmp;
2834 int x, y, pdecnt, ptecnt;
2835
2836 if (dirbase == 0) {
2837 dirbase = kernel_pmap->dirbase;
2838 }
2839 if (dirbase == 0) {
2840 db_printf("need a dirbase...\n");
2841 return;
2842 }
2843 dirbase = (pt_entry_t *) ((unsigned long) dirbase & ~INTEL_OFFMASK);
2844
2845 db_printf("dirbase: 0x%x\n", dirbase);
2846
2847 pdecnt = ptecnt = 0;
2848 pdep = &dirbase[0];
2849 for (y = 0; y < NPDES; y++, pdep++) {
2850 if (((tmp = *pdep) & INTEL_PTE_VALID) == 0) {
2851 continue;
2852 }
2853 pdecnt++;
2854 ptep = (pt_entry_t *) ((*pdep) & ~INTEL_OFFMASK);
2855 db_printf("dir[%4d]: 0x%x\n", y, *pdep);
2856 for (x = 0; x < NPTES; x++, ptep++) {
2857 if (((tmp = *ptep) & INTEL_PTE_VALID) == 0) {
2858 continue;
2859 }
2860 ptecnt++;
2861 db_printf(" tab[%4d]: 0x%x, va=0x%x, pa=0x%x\n",
2862 x,
2863 *ptep,
2864 (y << 22) | (x << 12),
2865 *ptep & ~INTEL_OFFMASK);
2866 }
2867 }
2868
2869 db_printf("total: %d tables, %d page table entries.\n", pdecnt, ptecnt);
2870
2871}
2872#endif /* MACH_KDB */
2873
2874#include <mach_vm_debug.h>
2875#if MACH_VM_DEBUG
2876#include <vm/vm_debug.h>
2877
2878int
2879pmap_list_resident_pages(
2880 register pmap_t pmap,
2881 register vm_offset_t *listp,
2882 register int space)
2883{
2884 return 0;
2885}
2886#endif /* MACH_VM_DEBUG */
2887
2888#ifdef MACH_BSD
2889/*
2890 * pmap_pagemove
2891 *
2892 * BSD support routine to reassign virtual addresses.
2893 */
2894
2895void
2896pmap_movepage(unsigned long from, unsigned long to, vm_size_t size)
2897{
2898 spl_t spl;
2899 pt_entry_t *pte, saved_pte;
2900 /* Lock the kernel map */
2901
2902
2903 while (size > 0) {
2904 PMAP_READ_LOCK(kernel_pmap, spl);
2905 pte = pmap_pte(kernel_pmap, from);
2906 if (pte == NULL)
2907 panic("pmap_pagemove from pte NULL");
2908 saved_pte = *pte;
2909 PMAP_READ_UNLOCK(kernel_pmap, spl);
2910
2911 pmap_enter(kernel_pmap, to, i386_trunc_page(*pte),
2912 VM_PROT_READ|VM_PROT_WRITE, *pte & INTEL_PTE_WIRED);
2913
2914 pmap_remove(kernel_pmap, from, from+PAGE_SIZE);
2915
2916 PMAP_READ_LOCK(kernel_pmap, spl);
2917 pte = pmap_pte(kernel_pmap, to);
2918 if (pte == NULL)
2919 panic("pmap_pagemove 'to' pte NULL");
2920
2921 *pte = saved_pte;
2922 PMAP_READ_UNLOCK(kernel_pmap, spl);
2923
2924 from += PAGE_SIZE;
2925 to += PAGE_SIZE;
2926 size -= PAGE_SIZE;
2927 }
2928
2929 /* Get the processors to update the TLBs */
2930 PMAP_FLUSH_TLBS();
2931
2932}
2933
2934kern_return_t bmapvideo(vm_offset_t *info);
2935kern_return_t bmapvideo(vm_offset_t *info) {
2936
2937 extern struct vc_info vinfo;
2938#ifdef NOTIMPLEMENTED
2939 (void)copyout((char *)&vinfo, (char *)info, sizeof(struct vc_info)); /* Copy out the video info */
2940#endif
2941 return KERN_SUCCESS;
2942}
2943
2944kern_return_t bmapmap(vm_offset_t va, vm_offset_t pa, vm_size_t size, vm_prot_t prot, int attr);
2945kern_return_t bmapmap(vm_offset_t va, vm_offset_t pa, vm_size_t size, vm_prot_t prot, int attr) {
2946
2947#ifdef NOTIMPLEMENTED
2948 pmap_map_block(current_act()->task->map->pmap, va, pa, size, prot, attr); /* Map it in */
2949#endif
2950 return KERN_SUCCESS;
2951}
2952
2953kern_return_t bmapmapr(vm_offset_t va);
2954kern_return_t bmapmapr(vm_offset_t va) {
2955
2956#ifdef NOTIMPLEMENTED
2957 mapping_remove(current_act()->task->map->pmap, va); /* Remove map */
2958#endif
2959 return KERN_SUCCESS;
2960}
2961#endif
2962