[apple/xnu.git] / osfmk / ppc / Diagnostics.c

/*
 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
 *
 * @APPLE_LICENSE_HEADER_START@
 * 
 * The contents of this file constitute Original Code as defined in and
 * are subject to the Apple Public Source License Version 1.1 (the
 * "License").  You may not use this file except in compliance with the
 * License.  Please obtain a copy of the License at
 * http://www.apple.com/publicsource and read it before using this file.
 * 
 * This Original Code and all software distributed under the License are
 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
 * License for the specific language governing rights and limitations
 * under the License.
 * 
 * @APPLE_LICENSE_HEADER_END@
 */
/*
 * @OSF_FREE_COPYRIGHT@
 */
/*
 * @APPLE_FREE_COPYRIGHT@
 */

/*
 *	Author: Bill Angell, Apple
 *	Date:	9/auht-aught
 *
 * Random diagnostics
 */


#include <kern/machine.h>
#include <kern/processor.h>
#include <mach/machine.h>
#include <mach/processor_info.h>
#include <mach/mach_types.h>
#include <mach/boolean.h>
#include <kern/thread.h>
#include <kern/task.h>
#include <mach/vm_param.h>
#include <vm/vm_kern.h>
#include <vm/vm_map.h>
#include <vm/vm_page.h>
#include <vm/pmap.h>
#include <ppc/exception.h>
#include <ppc/Firmware.h>
#include <ppc/low_trace.h>
#include <ppc/db_low_trace.h>
#include <ppc/mappings.h>
#include <ppc/pmap.h>
#include <ppc/mem.h>
#include <ppc/pmap_internals.h>
#include <ppc/savearea.h>
#include <ppc/Diagnostics.h>
#include <ppc/machine_cpu.h>
#include <pexpert/pexpert.h>
#include <ppc/POWERMAC/video_console.h>
#include <ppc/trap.h>

extern struct vc_info vinfo;

kern_return_t testPerfTrap(int trapno, struct savearea *ss, 
	unsigned int dsisr, unsigned int dar);

int diagCall(struct savearea *save) {

	union {
		unsigned long long tbase;
		unsigned int tb[2];
	} ttt, adj;
	natural_t tbu, tbu2, tbl;
	struct per_proc_info *per_proc;					/* Area for my per_proc address */
	int cpu;
	unsigned int tstrt, tend, temp, temp2;

	if(!(dgWork.dgFlags & enaDiagSCs)) return 0;	/* If not enabled, cause an exception */

	switch(save->save_r3) {							/* Select the routine */
	
/*
 *		Adjust the timebase for drift recovery testing
 */
		case dgAdjTB:								/* Adjust the timebase */

			adj.tb[0] = 0;							/* Clear high part */
			adj.tb[1] = save->save_r4;				/* Set low order */
			if(adj.tb[1] & 0x80000000) adj.tb[0] = 0xFFFFFFFF;	/* Propagate sign bit */
						
			do {									/* Read current time */
				asm volatile("	mftbu %0" : "=r" (tbu));
				asm volatile("	mftb %0" : "=r" (tbl));
				asm volatile("	mftbu %0" : "=r" (tbu2));
			} while (tbu != tbu2);
			
			ttt.tb[0] = tbu;						/* Set high */
			ttt.tb[1] = tbl;						/* Set low */
			
			ttt.tbase = ttt.tbase + adj.tbase;		/* Increment or decrement the TB */
			
			tbu = ttt.tb[0];						/* Save in regular variable */
			tbl = ttt.tb[1];						/* Save in regular variable */

			mttb(0);								/* Set low to keep from ticking */
			mttbu(tbu);								/* Set adjusted high */
			mttb(tbl);								/* Set adjusted low */
			
			return -1;								/* Return no AST checking... */
			
/*
 *		Return physical address of a page
 */
		case dgLRA:
		
			save->save_r3 = pmap_extract(current_act()->map->pmap, save->save_r4);	/* Get read address */
			
			return -1;								/* Return no AST checking... */
			
/*
 *		Copy physical to virtual
 */
		case dgpcpy:
		
#if 0
			save->save_r3 = copyp2v(save->save_r4, save->save_r5, save->save_r6);	/* Copy the physical page */
#endif			
			return 1;								/* Return and check for ASTs... */
			
			
/*
 *		Soft reset processor
 */
		case dgreset:
		
			cpu = save->save_r4;					/* Get the requested CPU number */
			
			if(cpu >= NCPUS) {						/* Check for bogus cpu */
				save->save_r3 = KERN_FAILURE;		/* Set failure */
				return 1;
			}
		
			if(!machine_slot[cpu].running) return KERN_FAILURE;	/* It is not running */	

			per_proc = &per_proc_info[cpu];			/* Point to the processor */
			
			(void)PE_cpu_start(per_proc->cpu_id, 
						per_proc->start_paddr, (vm_offset_t)per_proc);
			
			save->save_r3 = KERN_SUCCESS;			/* Set scuuess */

			return 1;								/* Return and check for ASTs... */

/*
 *		Force cache flush
 */
		case dgFlush:
		
#if 1
			cacheInit();							/* Blow cache */
#else
			asm volatile("	mftb %0" : "=r" (tstrt));
			tend = tstrt;			
			while((tend - tstrt) < 0x000A2837) {
				asm volatile("	mftb %0" : "=r" (tend));
			}

#endif
			return 1;								/* Return and check for ASTs... */

/*
 *		various hack tests
 */
		case dgtest:
		
			if(save->save_r4) perfTrapHook = testPerfTrap;
			else perfTrapHook = 0;

			return 1;								/* Return and check for ASTs... */
			
		
/*
 *		Create a physical block map into the current task
 *		Don't bother to check for any errors.
 *		parms - vaddr, paddr, size, prot, attributes
 */
		case dgBMphys:
		
			pmap_map_block(current_act()->map->pmap, save->save_r4, save->save_r5, save->save_r6,	/* Map in the block */
				save->save_r7, save->save_r8, 0);

			return 1;								/* Return and check for ASTs... */
		

/*
 *		Remove any mapping from the current task
 *		Don't bother to check for any errors.
 *		parms - vaddr
 */
		case dgUnMap:
		
			(void)mapping_remove(current_act()->map->pmap, save->save_r4);	/* Remove mapping */
			return 1;								/* Return and check for ASTs... */
	
			
/*
 *		Allows direct control of alignment handling.
 *
 *		The bottom two bits of the parameter are used to set the two control bits:
 *		0b00 - !trapUnalignbit - !notifyUnalignbit - default - instruction is emulated
 *		0b01 - !trapUnalignbit -  notifyUnalignbit - emulation is done, but traps afterwards
 *		0b10 -  trapUnalignbit - !notifyUnalignbit - no emulation - causes exception
 *		0b11 -  trapUnalignbit -  notifyUnalignbit - no emulation - causes exception
 */
		case dgAlign:
		
			temp = current_act()->mact.specFlags;	/* Save the old values */
			
			temp = ((current_act()->mact.specFlags >> (31 - trapUnalignbit - 1)) 	/* Reformat them to pass back */
				| (current_act()->mact.specFlags >> (31 - notifyUnalignbit))) & 3;
				
			temp2 = ((save->save_r4 << (31 - trapUnalignbit - 1)) & trapUnalign)	/* Move parms into flag format */
				| ((save->save_r4 << (31 - notifyUnalignbit)) & notifyUnalign);

			current_act()->mact.specFlags &= ~(trapUnalign | notifyUnalign);		/* Clean the old ones */
			current_act()->mact.specFlags |= temp2;									/* Set the new ones */
			
			per_proc_info[cpu_number()].spcFlags = current_act()->mact.specFlags;
			
			save->save_r3 = temp;
			
			return 1;								/* Return and check for ASTs... */
			
/*
 *		Return info for boot screen
 */
		case dgBootScreen:
			
#if 0
			ml_set_interrupts_enabled(1);
			(void)copyout((char *)&vinfo, (char *)save->save_r4, sizeof(struct vc_info));	/* Copy out the video info */
			ml_set_interrupts_enabled(0);
#endif
			return 1;								/* Return and check for ASTs... */
			
		
		default:									/* Handle invalid ones */
			return 0;								/* Return an exception */
		
	}

};

kern_return_t testPerfTrap(int trapno, struct savearea *ss, 
	unsigned int dsisr, unsigned int dar) {

	if(trapno != T_ALIGNMENT) return KERN_FAILURE;

	kprintf("alignment exception at %08X, srr1 = %08X, dsisr = %08X, dar = %08X\n", ss->save_srr0,
		ss->save_srr1, dsisr, dar);
		
	return KERN_SUCCESS;

}
Commit	Line	Data
1c79356b A	1	/*
	2	* Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
	3	*
	4	* @APPLE_LICENSE_HEADER_START@
	5	*
de355530 A	6	* The contents of this file constitute Original Code as defined in and
	7	* are subject to the Apple Public Source License Version 1.1 (the
	8	* "License"). You may not use this file except in compliance with the
	9	* License. Please obtain a copy of the License at
	10	* http://www.apple.com/publicsource and read it before using this file.
1c79356b	11	*
de355530 A	12	* This Original Code and all software distributed under the License are
de355530 A	13	* distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
1c79356b A	14	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
1c79356b A	15	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
de355530 A	16	* FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
	17	* License for the specific language governing rights and limitations
	18	* under the License.
1c79356b A	19	*
	20	* @APPLE_LICENSE_HEADER_END@
	21	*/
	22	/*
	23	* @OSF_FREE_COPYRIGHT@
	24	*/
	25	/*
	26	* @APPLE_FREE_COPYRIGHT@
	27	*/
	28
	29	/*
	30	* Author: Bill Angell, Apple
	31	* Date: 9/auht-aught
	32	*
	33	* Random diagnostics
	34	*/
	35
	36
	37	#include <kern/machine.h>
	38	#include <kern/processor.h>
	39	#include <mach/machine.h>
	40	#include <mach/processor_info.h>
	41	#include <mach/mach_types.h>
	42	#include <mach/boolean.h>
	43	#include <kern/thread.h>
	44	#include <kern/task.h>
	45	#include <mach/vm_param.h>
	46	#include <vm/vm_kern.h>
	47	#include <vm/vm_map.h>
	48	#include <vm/vm_page.h>
	49	#include <vm/pmap.h>
	50	#include <ppc/exception.h>
	51	#include <ppc/Firmware.h>
	52	#include <ppc/low_trace.h>
	53	#include <ppc/db_low_trace.h>
	54	#include <ppc/mappings.h>
	55	#include <ppc/pmap.h>
	56	#include <ppc/mem.h>
de355530	57	#include <ppc/pmap_internals.h>
1c79356b A	58	#include <ppc/savearea.h>
	59	#include <ppc/Diagnostics.h>
	60	#include <ppc/machine_cpu.h>
	61	#include <pexpert/pexpert.h>
0b4e3aa0	62	#include <ppc/POWERMAC/video_console.h>
9bccf70c	63	#include <ppc/trap.h>
0b4e3aa0 A	64
0b4e3aa0 A	65	extern struct vc_info vinfo;
1c79356b	66
9bccf70c A	67	kern_return_t testPerfTrap(int trapno, struct savearea *ss,
	68	unsigned int dsisr, unsigned int dar);
	69
1c79356b A	70	int diagCall(struct savearea *save) {
	71
	72	union {
	73	unsigned long long tbase;
	74	unsigned int tb[2];
	75	} ttt, adj;
	76	natural_t tbu, tbu2, tbl;
	77	struct per_proc_info per_proc; / Area for my per_proc address */
de355530	78	int cpu;
9bccf70c	79	unsigned int tstrt, tend, temp, temp2;
1c79356b A	80
	81	if(!(dgWork.dgFlags & enaDiagSCs)) return 0; /* If not enabled, cause an exception */
	82
	83	switch(save->save_r3) { /* Select the routine */
	84
	85	/*
	86	* Adjust the timebase for drift recovery testing
	87	*/
	88	case dgAdjTB: /* Adjust the timebase */
	89
	90	adj.tb[0] = 0; /* Clear high part */
	91	adj.tb[1] = save->save_r4; /* Set low order */
	92	if(adj.tb[1] & 0x80000000) adj.tb[0] = 0xFFFFFFFF; /* Propagate sign bit */
	93
	94	do { /* Read current time */
	95	asm volatile(" mftbu %0" : "=r" (tbu));
	96	asm volatile(" mftb %0" : "=r" (tbl));
	97	asm volatile(" mftbu %0" : "=r" (tbu2));
	98	} while (tbu != tbu2);
	99
	100	ttt.tb[0] = tbu; /* Set high */
	101	ttt.tb[1] = tbl; /* Set low */
	102
	103	ttt.tbase = ttt.tbase + adj.tbase; /* Increment or decrement the TB */
	104
	105	tbu = ttt.tb[0]; /* Save in regular variable */
	106	tbl = ttt.tb[1]; /* Save in regular variable */
	107
	108	mttb(0); /* Set low to keep from ticking */
	109	mttbu(tbu); /* Set adjusted high */
	110	mttb(tbl); /* Set adjusted low */
	111
	112	return -1; /* Return no AST checking... */
	113
	114	/*
	115	* Return physical address of a page
	116	*/
	117	case dgLRA:
	118
de355530	119	save->save_r3 = pmap_extract(current_act()->map->pmap, save->save_r4); /* Get read address */
1c79356b A	120
	121	return -1; /* Return no AST checking... */
	122
	123	/*
	124	* Copy physical to virtual
	125	*/
	126	case dgpcpy:
	127
de355530 A	128	#if 0
de355530 A	129	save->save_r3 = copyp2v(save->save_r4, save->save_r5, save->save_r6); /* Copy the physical page */
1c79356b A	130	#endif
	131	return 1; /* Return and check for ASTs... */
	132
	133
	134	/*
	135	* Soft reset processor
	136	*/
	137	case dgreset:
	138
	139	cpu = save->save_r4; /* Get the requested CPU number */
	140
	141	if(cpu >= NCPUS) { /* Check for bogus cpu */
	142	save->save_r3 = KERN_FAILURE; /* Set failure */
	143	return 1;
	144	}
	145
	146	if(!machine_slot[cpu].running) return KERN_FAILURE; /* It is not running */
	147
	148	per_proc = &per_proc_info[cpu]; /* Point to the processor */
	149
	150	(void)PE_cpu_start(per_proc->cpu_id,
	151	per_proc->start_paddr, (vm_offset_t)per_proc);
	152
	153	save->save_r3 = KERN_SUCCESS; /* Set scuuess */
	154
	155	return 1; /* Return and check for ASTs... */
	156
0b4e3aa0 A	157	/*
	158	* Force cache flush
	159	*/
9bccf70c	160	case dgFlush:
0b4e3aa0	161
de355530	162	#if 1
0b4e3aa0	163	cacheInit(); /* Blow cache */
de355530 A	164	#else
	165	asm volatile(" mftb %0" : "=r" (tstrt));
	166	tend = tstrt;
	167	while((tend - tstrt) < 0x000A2837) {
	168	asm volatile(" mftb %0" : "=r" (tend));
	169	}
	170
	171	#endif
0b4e3aa0 A	172	return 1; /* Return and check for ASTs... */
0b4e3aa0 A	173
1c79356b A	174	/*
	175	* various hack tests
	176	*/
	177	case dgtest:
	178
9bccf70c A	179	if(save->save_r4) perfTrapHook = testPerfTrap;
9bccf70c A	180	else perfTrapHook = 0;
1c79356b A	181
	182	return 1; /* Return and check for ASTs... */
	183
	184
0b4e3aa0 A	185
	186	/*
	187	* Create a physical block map into the current task
	188	* Don't bother to check for any errors.
	189	* parms - vaddr, paddr, size, prot, attributes
	190	*/
	191	case dgBMphys:
de355530 A	192
	193	pmap_map_block(current_act()->map->pmap, save->save_r4, save->save_r5, save->save_r6, /* Map in the block */
	194	save->save_r7, save->save_r8, 0);
0b4e3aa0 A	195
	196	return 1; /* Return and check for ASTs... */
	197
	198
	199	/*
	200	* Remove any mapping from the current task
	201	* Don't bother to check for any errors.
	202	* parms - vaddr
	203	*/
	204	case dgUnMap:
	205
	206	(void)mapping_remove(current_act()->map->pmap, save->save_r4); /* Remove mapping */
	207	return 1; /* Return and check for ASTs... */
9bccf70c A	208
	209
	210	/*
	211	* Allows direct control of alignment handling.
	212	*
de355530 A	213	* The bottom two bits of the parameter are used to set the two control bits:
	214	* 0b00 - !trapUnalignbit - !notifyUnalignbit - default - instruction is emulated
	215	* 0b01 - !trapUnalignbit - notifyUnalignbit - emulation is done, but traps afterwards
	216	* 0b10 - trapUnalignbit - !notifyUnalignbit - no emulation - causes exception
	217	* 0b11 - trapUnalignbit - notifyUnalignbit - no emulation - causes exception
9bccf70c A	218	*/
	219	case dgAlign:
	220
de355530	221	temp = current_act()->mact.specFlags; /* Save the old values */
9bccf70c	222
de355530 A	223	temp = ((current_act()->mact.specFlags >> (31 - trapUnalignbit - 1)) /* Reformat them to pass back */
	224	\| (current_act()->mact.specFlags >> (31 - notifyUnalignbit))) & 3;
	225
	226	temp2 = ((save->save_r4 << (31 - trapUnalignbit - 1)) & trapUnalign) /* Move parms into flag format */
	227	\| ((save->save_r4 << (31 - notifyUnalignbit)) & notifyUnalign);
	228
	229	current_act()->mact.specFlags &= ~(trapUnalign \| notifyUnalign); /* Clean the old ones */
	230	current_act()->mact.specFlags \|= temp2; /* Set the new ones */
	231
	232	per_proc_info[cpu_number()].spcFlags = current_act()->mact.specFlags;
	233
	234	save->save_r3 = temp;
9bccf70c A	235
9bccf70c A	236	return 1; /* Return and check for ASTs... */
0b4e3aa0 A	237
	238	/*
	239	* Return info for boot screen
	240	*/
	241	case dgBootScreen:
	242
de355530	243	#if 0
0b4e3aa0 A	244	ml_set_interrupts_enabled(1);
	245	(void)copyout((char )&vinfo, (char )save->save_r4, sizeof(struct vc_info)); /* Copy out the video info */
	246	ml_set_interrupts_enabled(0);
de355530	247	#endif
0b4e3aa0 A	248	return 1; /* Return and check for ASTs... */
	249
	250
1c79356b A	251	default: /* Handle invalid ones */
	252	return 0; /* Return an exception */
	253
9bccf70c A	254	}
	255
	256	};
	257
	258	kern_return_t testPerfTrap(int trapno, struct savearea *ss,
	259	unsigned int dsisr, unsigned int dar) {
	260
	261	if(trapno != T_ALIGNMENT) return KERN_FAILURE;
	262
	263	kprintf("alignment exception at %08X, srr1 = %08X, dsisr = %08X, dar = %08X\n", ss->save_srr0,
	264	ss->save_srr1, dsisr, dar);
	265
	266	return KERN_SUCCESS;
1c79356b A	267
1c79356b A	268	}