projects / apple / xnu.git / blame
| Commit | Line | Data |
|---|---|---|
| d9a64523 A |
1 | /* |
| 2 | * Copyright (c) 2016 Apple Inc. All rights reserved. | |
| 3 | */ | |
| 4 | ||
| 5 | #ifndef _PEXPERT_ARM_BCM2837_H | |
| 6 | #define _PEXPERT_ARM_BCM2837_H | |
| 7 | ||
| 8 | #ifdef BCM2837 | |
| 9 | #include "arm64_common.h" | |
| 10 | #endif | |
| 0a7de745 | 11 | |
| d9a64523 A |
12 | #define NO_MONITOR 1 |
| 13 | #define NO_ECORE 1 | |
| 14 | ||
| 15 | #ifndef ASSEMBLER | |
| 16 | ||
| 17 | #define PI3_UART | |
| 18 | ||
| 0a7de745 | 19 | #define PI3_BREAK asm volatile("brk #0"); |
| d9a64523 | 20 | |
| 0a7de745 A |
21 | #define BCM2837_GPFSEL0_V (pi3_gpio_base_vaddr + 0x0) |
| 22 | #define BCM2837_GPSET0_V (pi3_gpio_base_vaddr + 0x1C) | |
| 23 | #define BCM2837_GPCLR0_V (pi3_gpio_base_vaddr + 0x28) | |
| 24 | #define BCM2837_GPPUD_V (pi3_gpio_base_vaddr + 0x94) | |
| 25 | #define BCM2837_GPPUDCLK0_V (pi3_gpio_base_vaddr + 0x98) | |
| d9a64523 A |
26 | |
| 27 | #define BCM2837_FSEL_INPUT 0x0 | |
| 28 | #define BCM2837_FSEL_OUTPUT 0x1 | |
| 29 | #define BCM2837_FSEL_ALT0 0x4 | |
| 30 | #define BCM2837_FSEL_ALT1 0x5 | |
| 31 | #define BCM2837_FSEL_ALT2 0x6 | |
| 32 | #define BCM2837_FSEL_ALT3 0x7 | |
| 33 | #define BCM2837_FSEL_ALT4 0x3 | |
| 34 | #define BCM2837_FSEL_ALT5 0x2 | |
| 35 | ||
| 36 | #define BCM2837_FSEL_NFUNCS 54 | |
| 37 | #define BCM2837_FSEL_REG(func) (BCM2837_GPFSEL0_V + (4 * ((func) / 10))) | |
| 38 | #define BCM2837_FSEL_OFFS(func) (((func) % 10) * 3) | |
| 39 | #define BCM2837_FSEL_MASK(func) (0x7 << BCM2837_FSEL_OFFS(func)) | |
| 40 | ||
| 0a7de745 A |
41 | #define BCM2837_AUX_ENABLES_V (pi3_aux_base_vaddr + 0x4) |
| 42 | #define BCM2837_AUX_MU_IO_REG_V (pi3_aux_base_vaddr + 0x40) | |
| 43 | #define BCM2837_AUX_MU_IER_REG_V (pi3_aux_base_vaddr + 0x44) | |
| 44 | #define BCM2837_AUX_MU_IIR_REG_V (pi3_aux_base_vaddr + 0x48) | |
| 45 | #define BCM2837_AUX_MU_LCR_REG_V (pi3_aux_base_vaddr + 0x4C) | |
| 46 | #define BCM2837_AUX_MU_MCR_REG_V (pi3_aux_base_vaddr + 0x50) | |
| 47 | #define BCM2837_AUX_MU_LSR_REG_V (pi3_aux_base_vaddr + 0x54) | |
| 48 | #define BCM2837_AUX_MU_MSR_REG_V (pi3_aux_base_vaddr + 0x58) | |
| 49 | #define BCM2837_AUX_MU_SCRATCH_V (pi3_aux_base_vaddr + 0x5C) | |
| 50 | #define BCM2837_AUX_MU_CNTL_REG_V (pi3_aux_base_vaddr + 0x60) | |
| 51 | #define BCM2837_AUX_MU_STAT_REG_V (pi3_aux_base_vaddr + 0x64) | |
| 52 | #define BCM2837_AUX_MU_BAUD_REG_V (pi3_aux_base_vaddr + 0x68) | |
| d9a64523 A |
53 | #define BCM2837_PUT32(addr, value) do { *((volatile uint32_t *) addr) = value; } while(0) |
| 54 | #define BCM2837_GET32(addr) *((volatile uint32_t *) addr) | |
| 55 | ||
| 0a7de745 A |
56 | #define PLATFORM_PANIC_LOG_PADDR 0x3c0fc000 |
| 57 | #define PLATFORM_PANIC_LOG_SIZE 16384 // 16kb | |
| d9a64523 A |
58 | #endif /* ! ASSEMBLER */ |
| 59 | ||
| 60 | #endif /* ! _PEXPERT_ARM_BCM2837_H */ |