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1c79356b 1/*
0a7de745 2 * Copyright (c) 2017-2019 Apple Inc. All rights reserved.
5d5c5d0d 3 *
2d21ac55 4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5ba3f43e 5 *
2d21ac55
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6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
5ba3f43e 14 *
2d21ac55
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15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
5ba3f43e 17 *
2d21ac55
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18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
8f6c56a5
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20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
2d21ac55
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22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
5ba3f43e 25 *
2d21ac55 26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
1c79356b 27 */
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28#ifndef ARM64_MONOTONIC_H
29#define ARM64_MONOTONIC_H
1c79356b 30
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31#include <sys/cdefs.h>
32
33#if MONOTONIC
34
5ba3f43e 35#include <pexpert/arm64/board_config.h>
1c79356b 36
5ba3f43e 37#if KERNEL_PRIVATE
1c79356b 38
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39__BEGIN_DECLS
40
41#if MONOTONIC && !CPMU_AIC_PMI
42#define MONOTONIC_FIQ 1
43#endif /* MONOTONIC && !CPMU_AIC_PMI */
44
5ba3f43e 45#include <stdint.h>
1c79356b 46
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47#if HAS_UNCORE_CTRS
48#define MT_NDEVS 2
49#else /* HAS_UNCORE_CTRS */
5ba3f43e 50#define MT_NDEVS 1
c6bf4f31 51#endif /* !HAS_UNCORE_CTRS */
1c79356b 52
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53#define MT_CORE_CYCLES 0
54#define MT_CORE_INSTRS 1
55#define MT_CORE_NFIXED 2
56#define MT_CORE_MAXVAL ((UINT64_C(1) << 48) - 1)
1c79356b 57
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58__END_DECLS
59
5ba3f43e 60#endif /* KERNEL_PRIVATE */
1c79356b 61
5ba3f43e 62#if MACH_KERNEL_PRIVATE
1c79356b 63
5ba3f43e 64#include <stdbool.h>
1c79356b 65
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66__BEGIN_DECLS
67
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68/* set by hardware if a PMI was delivered */
69#define PMCR0_PMAI (UINT64_C(1) << 11)
70#define PMCR0_PMI(REG) ((REG) & PMCR0_PMAI)
1c79356b 71
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72#if HAS_UNCORE_CTRS
73
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74#define UPMSR_PMI(REG) ((REG) & 0x1)
75
76#endif /* HAS_UNCORE_CTRS */
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77
78static inline bool
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79mt_pmi_pending(uint64_t * restrict pmcr0_out,
80 uint64_t * restrict upmsr_out)
1c79356b 81{
c3c9b80d 82 uint64_t pmcr0 = __builtin_arm_rsr64("PMCR0_EL1");
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83 bool pmi = PMCR0_PMI(pmcr0);
84 if (pmi) {
85 /*
86 * Acknowledge the PMI by clearing the pmai bit.
87 */
c3c9b80d 88 __builtin_arm_wsr64("PMCR0_EL1", pmcr0 & ~PMCR0_PMAI);
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89 }
90 *pmcr0_out = pmcr0;
91
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92#if HAS_UNCORE_CTRS
93 extern bool mt_uncore_enabled;
94 if (mt_uncore_enabled) {
c3c9b80d 95 uint64_t upmsr = __builtin_arm_rsr64("UPMSR_EL1");
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96 if (UPMSR_PMI(upmsr)) {
97 pmi = true;
98 }
99 *upmsr_out = upmsr;
100 }
101#else /* HAS_UNCORE_CTRS */
0a7de745 102#pragma unused(upmsr_out)
c6bf4f31 103#endif /* !HAS_UNCORE_CTRS */
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104
105 return pmi;
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106}
107
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108void mt_fiq(void *cpu, uint64_t pmcr0, uint64_t upmsr);
109
110#if CPMU_AIC_PMI
111void mt_cpmu_aic_pmi(void *source);
112#endif /* CPMU_AIC_PMI */
113
114__END_DECLS
d9a64523 115
5ba3f43e 116#endif /* MACH_KERNEL_PRIVATE */
91447636 117
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118#endif /* MONOTONIC */
119
5ba3f43e 120#endif /* !defined(ARM64_MONOTONIC_H) */