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1c79356b 1/*
91447636 2 * Copyright (c) 2000-2004 Apple Computer, Inc. All rights reserved.
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3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
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6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
1c79356b 11 *
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12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
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14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
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16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
18 * under the License.
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19 *
20 * @APPLE_LICENSE_HEADER_END@
21 */
22/*
23 * @OSF_COPYRIGHT@
24 */
25/*
26 * Mach Operating System
27 * Copyright (c) 1991,1990 Carnegie Mellon University
28 * All Rights Reserved.
29 *
30 * Permission to use, copy, modify and distribute this software and its
31 * documentation is hereby granted, provided that both the copyright
32 * notice and this permission notice appear in all copies of the
33 * software, derivative works or modified versions, and any portions
34 * thereof, and that both notices appear in supporting documentation.
35 *
36 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
37 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
38 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
39 *
40 * Carnegie Mellon requests users of this software to return to
41 *
42 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
43 * School of Computer Science
44 * Carnegie Mellon University
45 * Pittsburgh PA 15213-3890
46 *
47 * any improvements or extensions that they make and grant Carnegie Mellon
48 * the rights to redistribute these changes.
49 */
50/*
51 */
52
53#ifndef _I386_TRAP_H_
54#define _I386_TRAP_H_
55
56/*
57 * Hardware trap vectors for i386.
58 */
59#define T_DIVIDE_ERROR 0
60#define T_DEBUG 1
61#define T_NMI 2 /* non-maskable interrupt */
62#define T_INT3 3 /* int 3 instruction */
63#define T_OVERFLOW 4 /* overflow test */
64#define T_OUT_OF_BOUNDS 5 /* bounds check */
65#define T_INVALID_OPCODE 6 /* invalid op code */
66#define T_NO_FPU 7 /* no floating point */
67#define T_DOUBLE_FAULT 8 /* double fault */
68#define T_FPU_FAULT 9
69/* 10 */
70#define T_SEGMENT_NOT_PRESENT 11
71#define T_STACK_FAULT 12
72#define T_GENERAL_PROTECTION 13
73#define T_PAGE_FAULT 14
74/* 15 */
75#define T_FLOATING_POINT_ERROR 16
76#define T_WATCHPOINT 17
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77#define T_MACHINE_CHECK 18
78#define T_SSE_FLOAT_ERROR 19
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79#define T_PREEMPT 255
80
81#define TRAP_NAMES "divide error", "debug trap", "NMI", "breakpoint", \
82 "overflow", "bounds check", "invalid opcode", \
83 "no coprocessor", "double fault", "coprocessor overrun", \
84 "invalid TSS", "segment not present", "stack bounds", \
85 "general protection", "page fault", "(reserved)", \
c0fea474 86 "coprocessor error", "watchpoint", "(reserved)", "SSE floating point"
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87
88/*
89 * Page-fault trap codes.
90 */
91#define T_PF_PROT 0x1 /* protection violation */
92#define T_PF_WRITE 0x2 /* write access */
93#define T_PF_USER 0x4 /* from user state */
94
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95#ifdef PAE
96#define T_PF_RSVD 0x8 /* reserved bit set to 1 */
97#define T_PF_EXECUTE 0x10 /* instruction fetch when NX */
98#endif
99
100
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101#if !defined(ASSEMBLER) && defined(MACH_KERNEL)
102
103#include <i386/thread.h>
104
105extern void i386_exception(
106 int exc,
107 int code,
108 int subcode);
109
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110extern void sync_iss_to_iks(x86_saved_state32_t *regs);
111
112extern void sync_iss_to_iks_unconditionally(x86_saved_state32_t *regs);
113
114extern void kernel_trap(x86_saved_state_t *regs);
115
116extern void user_trap(x86_saved_state_t *regs);
1c79356b 117
c0fea474 118extern void panic_double_fault(int code);
1c79356b 119
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120extern void panic_double_fault64(x86_saved_state_t *regs);
121
122extern void panic_machine_check(int code);
123
124extern void panic_machine_check64(x86_saved_state_t *regs);
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125
126extern void i386_astintr(int preemption);
127
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128
129typedef kern_return_t (*perfCallback)(
130 int trapno,
131 void *regs,
132 int unused1,
133 int unused2);
134
135extern perfCallback perfTrapHook;
136extern perfCallback perfASTHook;
137extern perfCallback perfIntHook;
138
139#if MACH_KDP
140extern boolean_t kdp_i386_trap(
91447636 141 unsigned int,
c0fea474 142 x86_saved_state32_t *,
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143 kern_return_t,
144 vm_offset_t);
c0fea474 145extern void panic_i386_backtrace(void *, int);
91447636 146#endif /* MACH_KDP */
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147#endif /* !ASSEMBLER && MACH_KERNEL */
148
149#endif /* _I386_TRAP_H_ */