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5ba3f43e
A
1/*
2 * Copyright (c) 2007-2013 Apple Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28
29#include <arm/machine_cpu.h>
30#include <arm/cpu_internal.h>
31#include <arm/cpuid.h>
32#include <arm/cpu_data.h>
33#include <arm/cpu_data_internal.h>
34#include <arm/misc_protos.h>
35#include <arm/machdep_call.h>
36#include <arm/machine_routines.h>
37#include <arm/rtclock.h>
38#include <kern/machine.h>
39#include <kern/thread.h>
40#include <kern/thread_group.h>
41#include <kern/policy_internal.h>
f427ee49 42#include <kern/startup.h>
5ba3f43e 43#include <machine/config.h>
cb323159 44#include <machine/atomic.h>
d9a64523 45#include <pexpert/pexpert.h>
5ba3f43e
A
46
47#if MONOTONIC
48#include <kern/monotonic.h>
49#include <machine/monotonic.h>
50#endif /* MONOTONIC */
51
52#include <mach/machine.h>
53
c6bf4f31 54#if !HAS_CONTINUOUS_HWCLOCK
5ba3f43e 55extern uint64_t mach_absolutetime_asleep;
c6bf4f31
A
56#else
57extern uint64_t wake_abstime;
58static uint64_t wake_conttime = UINT64_MAX;
59#endif
5ba3f43e 60
f427ee49
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61extern volatile uint32_t debug_enabled;
62
63static int max_cpus_initialized = 0;
64#define MAX_CPUS_SET 0x1
65#define MAX_CPUS_WAIT 0x2
66
67LCK_GRP_DECLARE(max_cpus_grp, "max_cpus");
68LCK_MTX_DECLARE(max_cpus_lock, &max_cpus_grp);
69uint32_t lockdown_done = 0;
70boolean_t is_clock_configured = FALSE;
71
72
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A
73static void
74sched_perfcontrol_oncore_default(perfcontrol_state_t new_thread_state __unused, going_on_core_t on __unused)
75{
76}
77
78static void
79sched_perfcontrol_switch_default(perfcontrol_state_t old_thread_state __unused, perfcontrol_state_t new_thread_state __unused)
80{
81}
82
83static void
84sched_perfcontrol_offcore_default(perfcontrol_state_t old_thread_state __unused, going_off_core_t off __unused, boolean_t thread_terminating __unused)
85{
86}
87
88static void
89sched_perfcontrol_thread_group_default(thread_group_data_t data __unused)
90{
91}
92
0a7de745 93static void
5ba3f43e
A
94sched_perfcontrol_max_runnable_latency_default(perfcontrol_max_runnable_latency_t latencies __unused)
95{
96}
97
98static void
a39ff7e2 99sched_perfcontrol_work_interval_notify_default(perfcontrol_state_t thread_state __unused,
0a7de745 100 perfcontrol_work_interval_t work_interval __unused)
a39ff7e2
A
101{
102}
103
104static void
105sched_perfcontrol_work_interval_ctl_default(perfcontrol_state_t thread_state __unused,
0a7de745 106 perfcontrol_work_interval_instance_t instance __unused)
5ba3f43e
A
107{
108}
109
110static void
111sched_perfcontrol_deadline_passed_default(__unused uint64_t deadline)
112{
113}
114
115static void
116sched_perfcontrol_csw_default(
0a7de745
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117 __unused perfcontrol_event event, __unused uint32_t cpu_id, __unused uint64_t timestamp,
118 __unused uint32_t flags, __unused struct perfcontrol_thread_data *offcore,
119 __unused struct perfcontrol_thread_data *oncore,
5ba3f43e
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120 __unused struct perfcontrol_cpu_counters *cpu_counters, __unused void *unused)
121{
122}
123
124static void
125sched_perfcontrol_state_update_default(
126 __unused perfcontrol_event event, __unused uint32_t cpu_id, __unused uint64_t timestamp,
127 __unused uint32_t flags, __unused struct perfcontrol_thread_data *thr_data,
128 __unused void *unused)
129{
130}
131
f427ee49
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132static void
133sched_perfcontrol_thread_group_blocked_default(
134 __unused thread_group_data_t blocked_tg, __unused thread_group_data_t blocking_tg,
135 __unused uint32_t flags, __unused perfcontrol_state_t blocked_thr_state)
136{
137}
138
139static void
140sched_perfcontrol_thread_group_unblocked_default(
141 __unused thread_group_data_t unblocked_tg, __unused thread_group_data_t unblocking_tg,
142 __unused uint32_t flags, __unused perfcontrol_state_t unblocked_thr_state)
143{
144}
145
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146sched_perfcontrol_offcore_t sched_perfcontrol_offcore = sched_perfcontrol_offcore_default;
147sched_perfcontrol_context_switch_t sched_perfcontrol_switch = sched_perfcontrol_switch_default;
148sched_perfcontrol_oncore_t sched_perfcontrol_oncore = sched_perfcontrol_oncore_default;
149sched_perfcontrol_thread_group_init_t sched_perfcontrol_thread_group_init = sched_perfcontrol_thread_group_default;
150sched_perfcontrol_thread_group_deinit_t sched_perfcontrol_thread_group_deinit = sched_perfcontrol_thread_group_default;
151sched_perfcontrol_thread_group_flags_update_t sched_perfcontrol_thread_group_flags_update = sched_perfcontrol_thread_group_default;
152sched_perfcontrol_max_runnable_latency_t sched_perfcontrol_max_runnable_latency = sched_perfcontrol_max_runnable_latency_default;
153sched_perfcontrol_work_interval_notify_t sched_perfcontrol_work_interval_notify = sched_perfcontrol_work_interval_notify_default;
a39ff7e2 154sched_perfcontrol_work_interval_ctl_t sched_perfcontrol_work_interval_ctl = sched_perfcontrol_work_interval_ctl_default;
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155sched_perfcontrol_deadline_passed_t sched_perfcontrol_deadline_passed = sched_perfcontrol_deadline_passed_default;
156sched_perfcontrol_csw_t sched_perfcontrol_csw = sched_perfcontrol_csw_default;
157sched_perfcontrol_state_update_t sched_perfcontrol_state_update = sched_perfcontrol_state_update_default;
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158sched_perfcontrol_thread_group_blocked_t sched_perfcontrol_thread_group_blocked = sched_perfcontrol_thread_group_blocked_default;
159sched_perfcontrol_thread_group_unblocked_t sched_perfcontrol_thread_group_unblocked = sched_perfcontrol_thread_group_unblocked_default;
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160
161void
162sched_perfcontrol_register_callbacks(sched_perfcontrol_callbacks_t callbacks, unsigned long size_of_state)
163{
164 assert(callbacks == NULL || callbacks->version >= SCHED_PERFCONTROL_CALLBACKS_VERSION_2);
165
166 if (size_of_state > sizeof(struct perfcontrol_state)) {
167 panic("%s: Invalid required state size %lu", __FUNCTION__, size_of_state);
168 }
169
170 if (callbacks) {
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171#if CONFIG_THREAD_GROUPS
172 if (callbacks->version >= SCHED_PERFCONTROL_CALLBACKS_VERSION_3) {
173 if (callbacks->thread_group_init != NULL) {
174 sched_perfcontrol_thread_group_init = callbacks->thread_group_init;
175 } else {
176 sched_perfcontrol_thread_group_init = sched_perfcontrol_thread_group_default;
177 }
178 if (callbacks->thread_group_deinit != NULL) {
179 sched_perfcontrol_thread_group_deinit = callbacks->thread_group_deinit;
180 } else {
181 sched_perfcontrol_thread_group_deinit = sched_perfcontrol_thread_group_default;
182 }
183 // tell CLPC about existing thread groups
184 thread_group_resync(TRUE);
185 }
186
187 if (callbacks->version >= SCHED_PERFCONTROL_CALLBACKS_VERSION_6) {
188 if (callbacks->thread_group_flags_update != NULL) {
189 sched_perfcontrol_thread_group_flags_update = callbacks->thread_group_flags_update;
190 } else {
191 sched_perfcontrol_thread_group_flags_update = sched_perfcontrol_thread_group_default;
192 }
193 }
194
195 if (callbacks->version >= SCHED_PERFCONTROL_CALLBACKS_VERSION_8) {
196 if (callbacks->thread_group_blocked != NULL) {
197 sched_perfcontrol_thread_group_blocked = callbacks->thread_group_blocked;
198 } else {
199 sched_perfcontrol_thread_group_blocked = sched_perfcontrol_thread_group_blocked_default;
200 }
201
202 if (callbacks->thread_group_unblocked != NULL) {
203 sched_perfcontrol_thread_group_unblocked = callbacks->thread_group_unblocked;
204 } else {
205 sched_perfcontrol_thread_group_unblocked = sched_perfcontrol_thread_group_unblocked_default;
206 }
207 }
208#endif
5ba3f43e 209
a39ff7e2
A
210 if (callbacks->version >= SCHED_PERFCONTROL_CALLBACKS_VERSION_7) {
211 if (callbacks->work_interval_ctl != NULL) {
212 sched_perfcontrol_work_interval_ctl = callbacks->work_interval_ctl;
213 } else {
214 sched_perfcontrol_work_interval_ctl = sched_perfcontrol_work_interval_ctl_default;
215 }
216 }
217
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218 if (callbacks->version >= SCHED_PERFCONTROL_CALLBACKS_VERSION_5) {
219 if (callbacks->csw != NULL) {
220 sched_perfcontrol_csw = callbacks->csw;
221 } else {
222 sched_perfcontrol_csw = sched_perfcontrol_csw_default;
223 }
224
225 if (callbacks->state_update != NULL) {
226 sched_perfcontrol_state_update = callbacks->state_update;
227 } else {
228 sched_perfcontrol_state_update = sched_perfcontrol_state_update_default;
229 }
230 }
231
232 if (callbacks->version >= SCHED_PERFCONTROL_CALLBACKS_VERSION_4) {
233 if (callbacks->deadline_passed != NULL) {
234 sched_perfcontrol_deadline_passed = callbacks->deadline_passed;
235 } else {
236 sched_perfcontrol_deadline_passed = sched_perfcontrol_deadline_passed_default;
237 }
238 }
239
240 if (callbacks->offcore != NULL) {
241 sched_perfcontrol_offcore = callbacks->offcore;
242 } else {
243 sched_perfcontrol_offcore = sched_perfcontrol_offcore_default;
244 }
245
246 if (callbacks->context_switch != NULL) {
247 sched_perfcontrol_switch = callbacks->context_switch;
248 } else {
249 sched_perfcontrol_switch = sched_perfcontrol_switch_default;
250 }
251
252 if (callbacks->oncore != NULL) {
253 sched_perfcontrol_oncore = callbacks->oncore;
254 } else {
255 sched_perfcontrol_oncore = sched_perfcontrol_oncore_default;
256 }
257
258 if (callbacks->max_runnable_latency != NULL) {
259 sched_perfcontrol_max_runnable_latency = callbacks->max_runnable_latency;
260 } else {
261 sched_perfcontrol_max_runnable_latency = sched_perfcontrol_max_runnable_latency_default;
262 }
0a7de745 263
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264 if (callbacks->work_interval_notify != NULL) {
265 sched_perfcontrol_work_interval_notify = callbacks->work_interval_notify;
266 } else {
267 sched_perfcontrol_work_interval_notify = sched_perfcontrol_work_interval_notify_default;
268 }
269 } else {
270 /* reset to defaults */
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271#if CONFIG_THREAD_GROUPS
272 thread_group_resync(FALSE);
273#endif
5ba3f43e
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274 sched_perfcontrol_offcore = sched_perfcontrol_offcore_default;
275 sched_perfcontrol_switch = sched_perfcontrol_switch_default;
276 sched_perfcontrol_oncore = sched_perfcontrol_oncore_default;
277 sched_perfcontrol_thread_group_init = sched_perfcontrol_thread_group_default;
278 sched_perfcontrol_thread_group_deinit = sched_perfcontrol_thread_group_default;
279 sched_perfcontrol_thread_group_flags_update = sched_perfcontrol_thread_group_default;
280 sched_perfcontrol_max_runnable_latency = sched_perfcontrol_max_runnable_latency_default;
281 sched_perfcontrol_work_interval_notify = sched_perfcontrol_work_interval_notify_default;
a39ff7e2 282 sched_perfcontrol_work_interval_ctl = sched_perfcontrol_work_interval_ctl_default;
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283 sched_perfcontrol_csw = sched_perfcontrol_csw_default;
284 sched_perfcontrol_state_update = sched_perfcontrol_state_update_default;
f427ee49
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285 sched_perfcontrol_thread_group_blocked = sched_perfcontrol_thread_group_blocked_default;
286 sched_perfcontrol_thread_group_unblocked = sched_perfcontrol_thread_group_unblocked_default;
5ba3f43e
A
287 }
288}
289
290
291static void
0a7de745
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292machine_switch_populate_perfcontrol_thread_data(struct perfcontrol_thread_data *data,
293 thread_t thread,
294 uint64_t same_pri_latency)
5ba3f43e
A
295{
296 bzero(data, sizeof(struct perfcontrol_thread_data));
297 data->perfctl_class = thread_get_perfcontrol_class(thread);
298 data->energy_estimate_nj = 0;
299 data->thread_id = thread->thread_id;
f427ee49
A
300#if CONFIG_THREAD_GROUPS
301 struct thread_group *tg = thread_group_get(thread);
302 data->thread_group_id = thread_group_get_id(tg);
303 data->thread_group_data = thread_group_get_machine_data(tg);
304#endif
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A
305 data->scheduling_latency_at_same_basepri = same_pri_latency;
306 data->perfctl_state = FIND_PERFCONTROL_STATE(thread);
307}
308
309static void
310machine_switch_populate_perfcontrol_cpu_counters(struct perfcontrol_cpu_counters *cpu_counters)
311{
312#if MONOTONIC
313 mt_perfcontrol(&cpu_counters->instructions, &cpu_counters->cycles);
314#else /* MONOTONIC */
315 cpu_counters->instructions = 0;
316 cpu_counters->cycles = 0;
317#endif /* !MONOTONIC */
318}
319
320int perfcontrol_callout_stats_enabled = 0;
321static _Atomic uint64_t perfcontrol_callout_stats[PERFCONTROL_CALLOUT_MAX][PERFCONTROL_STAT_MAX];
322static _Atomic uint64_t perfcontrol_callout_count[PERFCONTROL_CALLOUT_MAX];
323
324#if MONOTONIC
325static inline
0a7de745
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326bool
327perfcontrol_callout_counters_begin(uint64_t *counters)
5ba3f43e 328{
0a7de745
A
329 if (!perfcontrol_callout_stats_enabled) {
330 return false;
331 }
332 mt_fixed_counts(counters);
333 return true;
5ba3f43e
A
334}
335
336static inline
0a7de745
A
337void
338perfcontrol_callout_counters_end(uint64_t *start_counters,
339 perfcontrol_callout_type_t type)
5ba3f43e 340{
0a7de745
A
341 uint64_t end_counters[MT_CORE_NFIXED];
342 mt_fixed_counts(end_counters);
cb323159
A
343 os_atomic_add(&perfcontrol_callout_stats[type][PERFCONTROL_STAT_CYCLES],
344 end_counters[MT_CORE_CYCLES] - start_counters[MT_CORE_CYCLES], relaxed);
5ba3f43e 345#ifdef MT_CORE_INSTRS
cb323159
A
346 os_atomic_add(&perfcontrol_callout_stats[type][PERFCONTROL_STAT_INSTRS],
347 end_counters[MT_CORE_INSTRS] - start_counters[MT_CORE_INSTRS], relaxed);
5ba3f43e 348#endif /* defined(MT_CORE_INSTRS) */
cb323159 349 os_atomic_inc(&perfcontrol_callout_count[type], relaxed);
5ba3f43e
A
350}
351#endif /* MONOTONIC */
352
0a7de745
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353uint64_t
354perfcontrol_callout_stat_avg(perfcontrol_callout_type_t type,
355 perfcontrol_callout_stat_t stat)
5ba3f43e 356{
0a7de745
A
357 if (!perfcontrol_callout_stats_enabled) {
358 return 0;
359 }
cb323159
A
360 return os_atomic_load_wide(&perfcontrol_callout_stats[type][stat], relaxed) /
361 os_atomic_load_wide(&perfcontrol_callout_count[type], relaxed);
5ba3f43e
A
362}
363
f427ee49 364
5ba3f43e
A
365void
366machine_switch_perfcontrol_context(perfcontrol_event event,
0a7de745
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367 uint64_t timestamp,
368 uint32_t flags,
369 uint64_t new_thread_same_pri_latency,
370 thread_t old,
371 thread_t new)
5ba3f43e 372{
f427ee49 373
5ba3f43e
A
374 if (sched_perfcontrol_switch != sched_perfcontrol_switch_default) {
375 perfcontrol_state_t old_perfcontrol_state = FIND_PERFCONTROL_STATE(old);
376 perfcontrol_state_t new_perfcontrol_state = FIND_PERFCONTROL_STATE(new);
377 sched_perfcontrol_switch(old_perfcontrol_state, new_perfcontrol_state);
378 }
379
380 if (sched_perfcontrol_csw != sched_perfcontrol_csw_default) {
381 uint32_t cpu_id = (uint32_t)cpu_number();
382 struct perfcontrol_cpu_counters cpu_counters;
383 struct perfcontrol_thread_data offcore, oncore;
384 machine_switch_populate_perfcontrol_thread_data(&offcore, old, 0);
385 machine_switch_populate_perfcontrol_thread_data(&oncore, new,
0a7de745 386 new_thread_same_pri_latency);
5ba3f43e
A
387 machine_switch_populate_perfcontrol_cpu_counters(&cpu_counters);
388
389#if MONOTONIC
390 uint64_t counters[MT_CORE_NFIXED];
391 bool ctrs_enabled = perfcontrol_callout_counters_begin(counters);
392#endif /* MONOTONIC */
393 sched_perfcontrol_csw(event, cpu_id, timestamp, flags,
0a7de745 394 &offcore, &oncore, &cpu_counters, NULL);
5ba3f43e 395#if MONOTONIC
0a7de745
A
396 if (ctrs_enabled) {
397 perfcontrol_callout_counters_end(counters, PERFCONTROL_CALLOUT_CONTEXT);
398 }
5ba3f43e
A
399#endif /* MONOTONIC */
400
401#if __arm64__
402 old->machine.energy_estimate_nj += offcore.energy_estimate_nj;
403 new->machine.energy_estimate_nj += oncore.energy_estimate_nj;
404#endif
405 }
406}
407
408void
409machine_switch_perfcontrol_state_update(perfcontrol_event event,
0a7de745
A
410 uint64_t timestamp,
411 uint32_t flags,
412 thread_t thread)
5ba3f43e 413{
f427ee49 414
0a7de745 415 if (sched_perfcontrol_state_update == sched_perfcontrol_state_update_default) {
5ba3f43e 416 return;
0a7de745 417 }
5ba3f43e
A
418 uint32_t cpu_id = (uint32_t)cpu_number();
419 struct perfcontrol_thread_data data;
420 machine_switch_populate_perfcontrol_thread_data(&data, thread, 0);
421
422#if MONOTONIC
423 uint64_t counters[MT_CORE_NFIXED];
424 bool ctrs_enabled = perfcontrol_callout_counters_begin(counters);
425#endif /* MONOTONIC */
0a7de745
A
426 sched_perfcontrol_state_update(event, cpu_id, timestamp, flags,
427 &data, NULL);
5ba3f43e 428#if MONOTONIC
0a7de745
A
429 if (ctrs_enabled) {
430 perfcontrol_callout_counters_end(counters, PERFCONTROL_CALLOUT_STATE_UPDATE);
431 }
5ba3f43e
A
432#endif /* MONOTONIC */
433
434#if __arm64__
435 thread->machine.energy_estimate_nj += data.energy_estimate_nj;
436#endif
437}
438
439void
440machine_thread_going_on_core(thread_t new_thread,
0a7de745
A
441 thread_urgency_t urgency,
442 uint64_t sched_latency,
443 uint64_t same_pri_latency,
444 uint64_t timestamp)
5ba3f43e 445{
0a7de745 446 if (sched_perfcontrol_oncore == sched_perfcontrol_oncore_default) {
5ba3f43e 447 return;
0a7de745 448 }
5ba3f43e
A
449 struct going_on_core on_core;
450 perfcontrol_state_t state = FIND_PERFCONTROL_STATE(new_thread);
451
452 on_core.thread_id = new_thread->thread_id;
453 on_core.energy_estimate_nj = 0;
f427ee49
A
454 on_core.qos_class = (uint16_t)proc_get_effective_thread_policy(new_thread, TASK_POLICY_QOS);
455 on_core.urgency = (uint16_t)urgency;
d9a64523 456 on_core.is_32_bit = thread_is_64bit_data(new_thread) ? FALSE : TRUE;
5ba3f43e 457 on_core.is_kernel_thread = new_thread->task == kernel_task;
f427ee49
A
458#if CONFIG_THREAD_GROUPS
459 struct thread_group *tg = thread_group_get(new_thread);
460 on_core.thread_group_id = thread_group_get_id(tg);
461 on_core.thread_group_data = thread_group_get_machine_data(tg);
462#endif
5ba3f43e
A
463 on_core.scheduling_latency = sched_latency;
464 on_core.start_time = timestamp;
465 on_core.scheduling_latency_at_same_basepri = same_pri_latency;
466
467#if MONOTONIC
468 uint64_t counters[MT_CORE_NFIXED];
469 bool ctrs_enabled = perfcontrol_callout_counters_begin(counters);
470#endif /* MONOTONIC */
471 sched_perfcontrol_oncore(state, &on_core);
472#if MONOTONIC
0a7de745
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473 if (ctrs_enabled) {
474 perfcontrol_callout_counters_end(counters, PERFCONTROL_CALLOUT_ON_CORE);
475 }
5ba3f43e
A
476#endif /* MONOTONIC */
477
478#if __arm64__
479 new_thread->machine.energy_estimate_nj += on_core.energy_estimate_nj;
480#endif
481}
482
483void
0a7de745
A
484machine_thread_going_off_core(thread_t old_thread, boolean_t thread_terminating,
485 uint64_t last_dispatch, __unused boolean_t thread_runnable)
5ba3f43e 486{
0a7de745 487 if (sched_perfcontrol_offcore == sched_perfcontrol_offcore_default) {
5ba3f43e 488 return;
0a7de745 489 }
5ba3f43e
A
490 struct going_off_core off_core;
491 perfcontrol_state_t state = FIND_PERFCONTROL_STATE(old_thread);
492
493 off_core.thread_id = old_thread->thread_id;
494 off_core.energy_estimate_nj = 0;
495 off_core.end_time = last_dispatch;
f427ee49
A
496#if CONFIG_THREAD_GROUPS
497 struct thread_group *tg = thread_group_get(old_thread);
498 off_core.thread_group_id = thread_group_get_id(tg);
499 off_core.thread_group_data = thread_group_get_machine_data(tg);
500#endif
5ba3f43e
A
501
502#if MONOTONIC
503 uint64_t counters[MT_CORE_NFIXED];
504 bool ctrs_enabled = perfcontrol_callout_counters_begin(counters);
505#endif /* MONOTONIC */
506 sched_perfcontrol_offcore(state, &off_core, thread_terminating);
507#if MONOTONIC
0a7de745
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508 if (ctrs_enabled) {
509 perfcontrol_callout_counters_end(counters, PERFCONTROL_CALLOUT_OFF_CORE);
510 }
5ba3f43e
A
511#endif /* MONOTONIC */
512
513#if __arm64__
514 old_thread->machine.energy_estimate_nj += off_core.energy_estimate_nj;
515#endif
516}
517
f427ee49
A
518#if CONFIG_THREAD_GROUPS
519void
520machine_thread_group_init(struct thread_group *tg)
521{
522 if (sched_perfcontrol_thread_group_init == sched_perfcontrol_thread_group_default) {
523 return;
524 }
525 struct thread_group_data data;
526 data.thread_group_id = thread_group_get_id(tg);
527 data.thread_group_data = thread_group_get_machine_data(tg);
528 data.thread_group_size = thread_group_machine_data_size();
529 sched_perfcontrol_thread_group_init(&data);
530}
531
532void
533machine_thread_group_deinit(struct thread_group *tg)
534{
535 if (sched_perfcontrol_thread_group_deinit == sched_perfcontrol_thread_group_default) {
536 return;
537 }
538 struct thread_group_data data;
539 data.thread_group_id = thread_group_get_id(tg);
540 data.thread_group_data = thread_group_get_machine_data(tg);
541 data.thread_group_size = thread_group_machine_data_size();
542 sched_perfcontrol_thread_group_deinit(&data);
543}
544
545void
546machine_thread_group_flags_update(struct thread_group *tg, uint32_t flags)
547{
548 if (sched_perfcontrol_thread_group_flags_update == sched_perfcontrol_thread_group_default) {
549 return;
550 }
551 struct thread_group_data data;
552 data.thread_group_id = thread_group_get_id(tg);
553 data.thread_group_data = thread_group_get_machine_data(tg);
554 data.thread_group_size = thread_group_machine_data_size();
555 data.thread_group_flags = flags;
556 sched_perfcontrol_thread_group_flags_update(&data);
557}
558
559void
560machine_thread_group_blocked(struct thread_group *blocked_tg,
561 struct thread_group *blocking_tg,
562 uint32_t flags,
563 thread_t blocked_thread)
564{
565 if (sched_perfcontrol_thread_group_blocked == sched_perfcontrol_thread_group_blocked_default) {
566 return;
567 }
568
569 spl_t s = splsched();
570
571 perfcontrol_state_t state = FIND_PERFCONTROL_STATE(blocked_thread);
572 struct thread_group_data blocked_data;
573 assert(blocked_tg != NULL);
574
575 blocked_data.thread_group_id = thread_group_get_id(blocked_tg);
576 blocked_data.thread_group_data = thread_group_get_machine_data(blocked_tg);
577 blocked_data.thread_group_size = thread_group_machine_data_size();
578
579 if (blocking_tg == NULL) {
580 /*
581 * For special cases such as the render server, the blocking TG is a
582 * well known TG. Only in that case, the blocking_tg should be NULL.
583 */
584 assert(flags & PERFCONTROL_CALLOUT_BLOCKING_TG_RENDER_SERVER);
585 sched_perfcontrol_thread_group_blocked(&blocked_data, NULL, flags, state);
586 } else {
587 struct thread_group_data blocking_data;
588 blocking_data.thread_group_id = thread_group_get_id(blocking_tg);
589 blocking_data.thread_group_data = thread_group_get_machine_data(blocking_tg);
590 blocking_data.thread_group_size = thread_group_machine_data_size();
591 sched_perfcontrol_thread_group_blocked(&blocked_data, &blocking_data, flags, state);
592 }
593 KDBG(MACHDBG_CODE(DBG_MACH_THREAD_GROUP, MACH_THREAD_GROUP_BLOCK) | DBG_FUNC_START,
594 thread_tid(blocked_thread), thread_group_get_id(blocked_tg),
595 blocking_tg ? thread_group_get_id(blocking_tg) : THREAD_GROUP_INVALID,
596 flags);
597
598 splx(s);
599}
600
601void
602machine_thread_group_unblocked(struct thread_group *unblocked_tg,
603 struct thread_group *unblocking_tg,
604 uint32_t flags,
605 thread_t unblocked_thread)
606{
607 if (sched_perfcontrol_thread_group_unblocked == sched_perfcontrol_thread_group_unblocked_default) {
608 return;
609 }
610
611 spl_t s = splsched();
612
613 perfcontrol_state_t state = FIND_PERFCONTROL_STATE(unblocked_thread);
614 struct thread_group_data unblocked_data;
615 assert(unblocked_tg != NULL);
616
617 unblocked_data.thread_group_id = thread_group_get_id(unblocked_tg);
618 unblocked_data.thread_group_data = thread_group_get_machine_data(unblocked_tg);
619 unblocked_data.thread_group_size = thread_group_machine_data_size();
620
621 if (unblocking_tg == NULL) {
622 /*
623 * For special cases such as the render server, the unblocking TG is a
624 * well known TG. Only in that case, the unblocking_tg should be NULL.
625 */
626 assert(flags & PERFCONTROL_CALLOUT_BLOCKING_TG_RENDER_SERVER);
627 sched_perfcontrol_thread_group_unblocked(&unblocked_data, NULL, flags, state);
628 } else {
629 struct thread_group_data unblocking_data;
630 unblocking_data.thread_group_id = thread_group_get_id(unblocking_tg);
631 unblocking_data.thread_group_data = thread_group_get_machine_data(unblocking_tg);
632 unblocking_data.thread_group_size = thread_group_machine_data_size();
633 sched_perfcontrol_thread_group_unblocked(&unblocked_data, &unblocking_data, flags, state);
634 }
635 KDBG(MACHDBG_CODE(DBG_MACH_THREAD_GROUP, MACH_THREAD_GROUP_BLOCK) | DBG_FUNC_END,
636 thread_tid(unblocked_thread), thread_group_get_id(unblocked_tg),
637 unblocking_tg ? thread_group_get_id(unblocking_tg) : THREAD_GROUP_INVALID,
638 flags);
639
640 splx(s);
641}
642
643#endif /* CONFIG_THREAD_GROUPS */
5ba3f43e
A
644
645void
646machine_max_runnable_latency(uint64_t bg_max_latency,
0a7de745
A
647 uint64_t default_max_latency,
648 uint64_t realtime_max_latency)
5ba3f43e 649{
0a7de745 650 if (sched_perfcontrol_max_runnable_latency == sched_perfcontrol_max_runnable_latency_default) {
5ba3f43e 651 return;
0a7de745 652 }
5ba3f43e
A
653 struct perfcontrol_max_runnable_latency latencies = {
654 .max_scheduling_latencies = {
655 [THREAD_URGENCY_NONE] = 0,
656 [THREAD_URGENCY_BACKGROUND] = bg_max_latency,
657 [THREAD_URGENCY_NORMAL] = default_max_latency,
658 [THREAD_URGENCY_REAL_TIME] = realtime_max_latency
659 }
660 };
661
662 sched_perfcontrol_max_runnable_latency(&latencies);
663}
664
665void
666machine_work_interval_notify(thread_t thread,
0a7de745 667 struct kern_work_interval_args* kwi_args)
5ba3f43e 668{
0a7de745 669 if (sched_perfcontrol_work_interval_notify == sched_perfcontrol_work_interval_notify_default) {
5ba3f43e 670 return;
0a7de745 671 }
5ba3f43e
A
672 perfcontrol_state_t state = FIND_PERFCONTROL_STATE(thread);
673 struct perfcontrol_work_interval work_interval = {
674 .thread_id = thread->thread_id,
f427ee49 675 .qos_class = (uint16_t)proc_get_effective_thread_policy(thread, TASK_POLICY_QOS),
5ba3f43e
A
676 .urgency = kwi_args->urgency,
677 .flags = kwi_args->notify_flags,
678 .work_interval_id = kwi_args->work_interval_id,
679 .start = kwi_args->start,
680 .finish = kwi_args->finish,
681 .deadline = kwi_args->deadline,
682 .next_start = kwi_args->next_start,
683 .create_flags = kwi_args->create_flags,
684 };
f427ee49
A
685#if CONFIG_THREAD_GROUPS
686 struct thread_group *tg;
687 tg = thread_group_get(thread);
688 work_interval.thread_group_id = thread_group_get_id(tg);
689 work_interval.thread_group_data = thread_group_get_machine_data(tg);
690#endif
5ba3f43e
A
691 sched_perfcontrol_work_interval_notify(state, &work_interval);
692}
693
a39ff7e2 694
5ba3f43e
A
695void
696machine_perfcontrol_deadline_passed(uint64_t deadline)
697{
0a7de745 698 if (sched_perfcontrol_deadline_passed != sched_perfcontrol_deadline_passed_default) {
5ba3f43e 699 sched_perfcontrol_deadline_passed(deadline);
0a7de745 700 }
5ba3f43e
A
701}
702
703#if INTERRUPT_MASKED_DEBUG
704/*
705 * ml_spin_debug_reset()
706 * Reset the timestamp on a thread that has been unscheduled
cb323159 707 * to avoid false alarms. Alarm will go off if interrupts are held
5ba3f43e 708 * disabled for too long, starting from now.
cb323159
A
709 *
710 * Call ml_get_timebase() directly to prevent extra overhead on newer
711 * platforms that's enabled in DEVELOPMENT kernel configurations.
5ba3f43e
A
712 */
713void
714ml_spin_debug_reset(thread_t thread)
715{
f427ee49
A
716 if (thread->machine.intmask_timestamp) {
717 thread->machine.intmask_timestamp = ml_get_timebase();
718 }
5ba3f43e
A
719}
720
721/*
722 * ml_spin_debug_clear()
723 * Clear the timestamp on a thread that has been unscheduled
724 * to avoid false alarms
725 */
726void
727ml_spin_debug_clear(thread_t thread)
728{
d9a64523 729 thread->machine.intmask_timestamp = 0;
5ba3f43e
A
730}
731
732/*
733 * ml_spin_debug_clear_self()
734 * Clear the timestamp on the current thread to prevent
735 * false alarms
736 */
737void
738ml_spin_debug_clear_self()
739{
740 ml_spin_debug_clear(current_thread());
741}
742
f427ee49
A
743static inline void
744__ml_check_interrupts_disabled_duration(thread_t thread, uint64_t timeout, bool is_int_handler)
5ba3f43e 745{
d9a64523
A
746 uint64_t start;
747 uint64_t now;
5ba3f43e 748
f427ee49 749 start = is_int_handler ? thread->machine.inthandler_timestamp : thread->machine.intmask_timestamp;
d9a64523 750 if (start != 0) {
cb323159 751 now = ml_get_timebase();
5ba3f43e 752
f427ee49 753 if ((now - start) > timeout * debug_cpu_performance_degradation_factor) {
d9a64523
A
754 mach_timebase_info_data_t timebase;
755 clock_timebase_info(&timebase);
5ba3f43e
A
756
757#ifndef KASAN
d9a64523 758 /*
0a7de745
A
759 * Disable the actual panic for KASAN due to the overhead of KASAN itself, leave the rest of the
760 * mechanism enabled so that KASAN can catch any bugs in the mechanism itself.
761 */
f427ee49
A
762 if (is_int_handler) {
763 panic("Processing of an interrupt (type = %u, handler address = %p, vector = %p) took %llu nanoseconds (timeout = %llu ns)",
764 thread->machine.int_type, (void *)thread->machine.int_handler_addr, (void *)thread->machine.int_vector,
765 (((now - start) * timebase.numer) / timebase.denom),
766 ((timeout * debug_cpu_performance_degradation_factor) * timebase.numer) / timebase.denom);
767 } else {
768 panic("Interrupts held disabled for %llu nanoseconds (timeout = %llu ns)",
769 (((now - start) * timebase.numer) / timebase.denom),
770 ((timeout * debug_cpu_performance_degradation_factor) * timebase.numer) / timebase.denom);
771 }
5ba3f43e 772#endif
d9a64523
A
773 }
774 }
5ba3f43e 775
d9a64523 776 return;
5ba3f43e 777}
f427ee49
A
778
779void
780ml_check_interrupts_disabled_duration(thread_t thread)
781{
782 __ml_check_interrupts_disabled_duration(thread, interrupt_masked_timeout, false);
783}
784
785void
786ml_check_stackshot_interrupt_disabled_duration(thread_t thread)
787{
788 /* Use MAX() to let the user bump the timeout further if needed */
789 __ml_check_interrupts_disabled_duration(thread, MAX(stackshot_interrupt_masked_timeout, interrupt_masked_timeout), false);
790}
791
792void
793ml_check_interrupt_handler_duration(thread_t thread)
794{
795 __ml_check_interrupts_disabled_duration(thread, interrupt_masked_timeout, true);
796}
797
798void
799ml_irq_debug_start(uintptr_t handler, uintptr_t vector)
800{
801 INTERRUPT_MASKED_DEBUG_START(handler, DBG_INTR_TYPE_OTHER);
802 current_thread()->machine.int_vector = (uintptr_t)VM_KERNEL_STRIP_PTR(vector);
803}
804
805void
806ml_irq_debug_end()
807{
808 INTERRUPT_MASKED_DEBUG_END();
809}
5ba3f43e
A
810#endif // INTERRUPT_MASKED_DEBUG
811
812
813boolean_t
814ml_set_interrupts_enabled(boolean_t enable)
815{
0a7de745
A
816 thread_t thread;
817 uint64_t state;
5ba3f43e
A
818
819#if __arm__
820#define INTERRUPT_MASK PSR_IRQF
d9a64523 821 state = __builtin_arm_rsr("cpsr");
5ba3f43e
A
822#else
823#define INTERRUPT_MASK DAIF_IRQF
d9a64523 824 state = __builtin_arm_rsr("DAIF");
5ba3f43e 825#endif
d9a64523 826 if (enable && (state & INTERRUPT_MASK)) {
cb323159 827 assert(getCpuDatap()->cpu_int_state == NULL); // Make sure we're not enabling interrupts from primary interrupt context
5ba3f43e 828#if INTERRUPT_MASKED_DEBUG
d9a64523
A
829 if (interrupt_masked_debug) {
830 // Interrupts are currently masked, we will enable them (after finishing this check)
831 thread = current_thread();
f427ee49
A
832 if (stackshot_active()) {
833 ml_check_stackshot_interrupt_disabled_duration(thread);
834 } else {
835 ml_check_interrupts_disabled_duration(thread);
836 }
d9a64523
A
837 thread->machine.intmask_timestamp = 0;
838 }
0a7de745 839#endif // INTERRUPT_MASKED_DEBUG
d9a64523
A
840 if (get_preemption_level() == 0) {
841 thread = current_thread();
842 while (thread->machine.CpuDatap->cpu_pending_ast & AST_URGENT) {
5ba3f43e 843#if __ARM_USER_PROTECT__
d9a64523 844 uintptr_t up = arm_user_protect_begin(thread);
5ba3f43e 845#endif
d9a64523 846 ast_taken_kernel();
5ba3f43e 847#if __ARM_USER_PROTECT__
d9a64523 848 arm_user_protect_end(thread, up, FALSE);
5ba3f43e 849#endif
d9a64523
A
850 }
851 }
5ba3f43e 852#if __arm__
d9a64523 853 __asm__ volatile ("cpsie if" ::: "memory"); // Enable IRQ FIQ
5ba3f43e 854#else
f427ee49 855 __builtin_arm_wsr("DAIFClr", DAIFSC_STANDARD_DISABLE);
5ba3f43e 856#endif
d9a64523 857 } else if (!enable && ((state & INTERRUPT_MASK) == 0)) {
5ba3f43e 858#if __arm__
d9a64523 859 __asm__ volatile ("cpsid if" ::: "memory"); // Mask IRQ FIQ
5ba3f43e 860#else
f427ee49 861 __builtin_arm_wsr("DAIFSet", DAIFSC_STANDARD_DISABLE);
5ba3f43e
A
862#endif
863#if INTERRUPT_MASKED_DEBUG
d9a64523
A
864 if (interrupt_masked_debug) {
865 // Interrupts were enabled, we just masked them
cb323159 866 current_thread()->machine.intmask_timestamp = ml_get_timebase();
d9a64523 867 }
5ba3f43e 868#endif
d9a64523 869 }
0a7de745
A
870 return (state & INTERRUPT_MASK) == 0;
871}
872
873boolean_t
874ml_early_set_interrupts_enabled(boolean_t enable)
875{
876 return ml_set_interrupts_enabled(enable);
d9a64523
A
877}
878
879/*
880 * Routine: ml_at_interrupt_context
881 * Function: Check if running at interrupt context
882 */
883boolean_t
884ml_at_interrupt_context(void)
885{
886 /* Do not use a stack-based check here, as the top-level exception handler
887 * is free to use some other stack besides the per-CPU interrupt stack.
888 * Interrupts should always be disabled if we're at interrupt context.
889 * Check that first, as we may be in a preemptible non-interrupt context, in
890 * which case we could be migrated to a different CPU between obtaining
891 * the per-cpu data pointer and loading cpu_int_state. We then might end
892 * up checking the interrupt state of a different CPU, resulting in a false
893 * positive. But if interrupts are disabled, we also know we cannot be
894 * preempted. */
0a7de745 895 return !ml_get_interrupts_enabled() && (getCpuDatap()->cpu_int_state != NULL);
d9a64523
A
896}
897
0a7de745 898vm_offset_t
d9a64523
A
899ml_stack_remaining(void)
900{
901 uintptr_t local = (uintptr_t) &local;
902 vm_offset_t intstack_top_ptr;
903
904 /* Since this is a stack-based check, we don't need to worry about
905 * preemption as we do in ml_at_interrupt_context(). If we are preemptible,
906 * then the sp should never be within any CPU's interrupt stack unless
907 * something has gone horribly wrong. */
908 intstack_top_ptr = getCpuDatap()->intstack_top;
909 if ((local < intstack_top_ptr) && (local > intstack_top_ptr - INTSTACK_SIZE)) {
0a7de745 910 return local - (getCpuDatap()->intstack_top - INTSTACK_SIZE);
d9a64523 911 } else {
0a7de745 912 return local - current_thread()->kernel_stack;
d9a64523 913 }
5ba3f43e
A
914}
915
f427ee49 916static boolean_t ml_quiescing = FALSE;
5ba3f43e 917
0a7de745
A
918void
919ml_set_is_quiescing(boolean_t quiescing)
5ba3f43e 920{
d9a64523 921 ml_quiescing = quiescing;
f427ee49 922 os_atomic_thread_fence(release);
5ba3f43e
A
923}
924
0a7de745
A
925boolean_t
926ml_is_quiescing(void)
5ba3f43e 927{
f427ee49 928 os_atomic_thread_fence(acquire);
0a7de745 929 return ml_quiescing;
5ba3f43e
A
930}
931
0a7de745
A
932uint64_t
933ml_get_booter_memory_size(void)
5ba3f43e 934{
5ba3f43e 935 uint64_t size;
0a7de745 936 uint64_t roundsize = 512 * 1024 * 1024ULL;
5ba3f43e 937 size = BootArgs->memSizeActual;
d9a64523 938 if (!size) {
5ba3f43e 939 size = BootArgs->memSize;
0a7de745
A
940 if (size < (2 * roundsize)) {
941 roundsize >>= 1;
942 }
d9a64523 943 size = (size + roundsize - 1) & ~(roundsize - 1);
d9a64523 944 }
f427ee49
A
945
946 size -= BootArgs->memSize;
947
0a7de745 948 return size;
5ba3f43e
A
949}
950
951uint64_t
952ml_get_abstime_offset(void)
953{
954 return rtclock_base_abstime;
955}
956
957uint64_t
958ml_get_conttime_offset(void)
959{
f427ee49
A
960#if HIBERNATION && HAS_CONTINUOUS_HWCLOCK
961 return hwclock_conttime_offset;
962#elif HAS_CONTINUOUS_HWCLOCK
c6bf4f31
A
963 return 0;
964#else
0a7de745 965 return rtclock_base_abstime + mach_absolutetime_asleep;
c6bf4f31 966#endif
5ba3f43e
A
967}
968
969uint64_t
970ml_get_time_since_reset(void)
971{
c6bf4f31
A
972#if HAS_CONTINUOUS_HWCLOCK
973 if (wake_conttime == UINT64_MAX) {
974 return UINT64_MAX;
975 } else {
976 return mach_continuous_time() - wake_conttime;
977 }
978#else
5ba3f43e
A
979 /* The timebase resets across S2R, so just return the raw value. */
980 return ml_get_hwclock();
c6bf4f31 981#endif
5ba3f43e
A
982}
983
cb323159
A
984void
985ml_set_reset_time(__unused uint64_t wake_time)
986{
c6bf4f31
A
987#if HAS_CONTINUOUS_HWCLOCK
988 wake_conttime = wake_time;
989#endif
cb323159
A
990}
991
5ba3f43e
A
992uint64_t
993ml_get_conttime_wake_time(void)
994{
c6bf4f31
A
995#if HAS_CONTINUOUS_HWCLOCK
996 /*
997 * For now, we will reconstitute the timebase value from
998 * cpu_timebase_init and use it as the wake time.
999 */
1000 return wake_abstime - ml_get_abstime_offset();
1001#else /* HAS_CONTINOUS_HWCLOCK */
5ba3f43e
A
1002 /* The wake time is simply our continuous time offset. */
1003 return ml_get_conttime_offset();
c6bf4f31 1004#endif /* HAS_CONTINOUS_HWCLOCK */
5ba3f43e
A
1005}
1006
0a7de745
A
1007/*
1008 * ml_snoop_thread_is_on_core(thread_t thread)
1009 * Check if the given thread is currently on core. This function does not take
1010 * locks, disable preemption, or otherwise guarantee synchronization. The
1011 * result should be considered advisory.
1012 */
1013bool
1014ml_snoop_thread_is_on_core(thread_t thread)
1015{
1016 unsigned int cur_cpu_num = 0;
f427ee49 1017 const unsigned int max_cpu_id = ml_get_max_cpu_number();
0a7de745 1018
f427ee49 1019 for (cur_cpu_num = 0; cur_cpu_num <= max_cpu_id; cur_cpu_num++) {
0a7de745
A
1020 if (CpuDataEntries[cur_cpu_num].cpu_data_vaddr) {
1021 if (CpuDataEntries[cur_cpu_num].cpu_data_vaddr->cpu_active_thread == thread) {
1022 return true;
1023 }
1024 }
1025 }
1026
1027 return false;
1028}
f427ee49
A
1029
1030int
1031ml_early_cpu_max_number(void)
1032{
1033 assert(startup_phase >= STARTUP_SUB_TUNABLES);
1034 return ml_get_max_cpu_number();
1035}
1036
1037void
1038ml_set_max_cpus(unsigned int max_cpus __unused)
1039{
1040 lck_mtx_lock(&max_cpus_lock);
1041 if (max_cpus_initialized != MAX_CPUS_SET) {
1042 if (max_cpus_initialized == MAX_CPUS_WAIT) {
1043 thread_wakeup((event_t) &max_cpus_initialized);
1044 }
1045 max_cpus_initialized = MAX_CPUS_SET;
1046 }
1047 lck_mtx_unlock(&max_cpus_lock);
1048}
1049
1050unsigned int
1051ml_wait_max_cpus(void)
1052{
1053 assert(lockdown_done);
1054 lck_mtx_lock(&max_cpus_lock);
1055 while (max_cpus_initialized != MAX_CPUS_SET) {
1056 max_cpus_initialized = MAX_CPUS_WAIT;
1057 lck_mtx_sleep(&max_cpus_lock, LCK_SLEEP_DEFAULT, &max_cpus_initialized, THREAD_UNINT);
1058 }
1059 lck_mtx_unlock(&max_cpus_lock);
1060 return machine_info.max_cpus;
1061}
1062void
1063machine_conf(void)
1064{
1065 /*
1066 * This is known to be inaccurate. mem_size should always be capped at 2 GB
1067 */
1068 machine_info.memory_size = (uint32_t)mem_size;
1069
1070 // rdar://problem/58285685: Userland expects _COMM_PAGE_LOGICAL_CPUS to report
1071 // (max_cpu_id+1) rather than a literal *count* of logical CPUs.
1072 unsigned int num_cpus = ml_get_topology_info()->max_cpu_id + 1;
1073 machine_info.max_cpus = num_cpus;
1074 machine_info.physical_cpu_max = num_cpus;
1075 machine_info.logical_cpu_max = num_cpus;
1076}
1077
1078void
1079machine_init(void)
1080{
1081 debug_log_init();
1082 clock_config();
1083 is_clock_configured = TRUE;
1084 if (debug_enabled) {
1085 pmap_map_globals();
1086 }
1087 ml_lockdown_init();
1088}