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1c79356b A |
1 | /* |
2 | * Copyright (c) 2000 Apple Computer, Inc. All rights reserved. | |
3 | * | |
4 | * @APPLE_LICENSE_HEADER_START@ | |
5 | * | |
6 | * The contents of this file constitute Original Code as defined in and | |
7 | * are subject to the Apple Public Source License Version 1.1 (the | |
8 | * "License"). You may not use this file except in compliance with the | |
9 | * License. Please obtain a copy of the License at | |
10 | * http://www.apple.com/publicsource and read it before using this file. | |
11 | * | |
12 | * This Original Code and all software distributed under the License are | |
13 | * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
14 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, | |
15 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the | |
17 | * License for the specific language governing rights and limitations | |
18 | * under the License. | |
19 | * | |
20 | * @APPLE_LICENSE_HEADER_END@ | |
21 | */ | |
22 | #include <debug.h> | |
23 | #include <ppc/asm.h> | |
24 | #include <ppc/proc_reg.h> | |
25 | #include <mach/ppc/vm_param.h> | |
26 | #include <assym.s> | |
27 | ||
28 | .set kLog2CacheLineSize, 5 | |
29 | .set kCacheLineSize, 32 | |
30 | ||
31 | ENTRY(kdp_flush_cache, TAG_NO_FRAME_USED) | |
32 | cmpi cr0,0,r4,0 /* is this zero length? */ | |
33 | add r4,r3,r4 /* calculate last byte + 1 */ | |
34 | subi r4,r4,1 /* calculate last byte */ | |
35 | ||
36 | srwi r5,r3,kLog2CacheLineSize /* calc first cache line index */ | |
37 | srwi r4,r4,kLog2CacheLineSize /* calc last cache line index */ | |
38 | beq cr0, LdataToCodeDone /* done if zero length */ | |
39 | ||
40 | subf r4,r5,r4 /* calc diff (# lines minus 1) */ | |
41 | addi r4,r4,1 /* # of cache lines to flush */ | |
42 | slwi r5,r5,kLog2CacheLineSize /* calc addr of first cache line */ | |
43 | ||
44 | /* flush the data cache lines */ | |
45 | mr r3,r5 /* starting address for loop */ | |
46 | mtctr r4 /* loop count */ | |
47 | LdataToCodeFlushLoop: | |
48 | dcbf 0, r3 /* flush the data cache line */ | |
49 | addi r3,r3,kCacheLineSize /* advance to next cache line */ | |
50 | bdnz LdataToCodeFlushLoop /* loop until count is zero */ | |
51 | sync /* wait until RAM is valid */ | |
52 | ||
53 | /* invalidate the code cache lines */ | |
54 | mr r3,r5 /* starting address for loop */ | |
55 | mtctr r4 /* loop count */ | |
56 | LdataToCodeInvalidateLoop: | |
57 | icbi 0, r3 /* invalidate code cache line */ | |
58 | addi r3,r3,kCacheLineSize /* advance to next cache line */ | |
59 | bdnz LdataToCodeInvalidateLoop /* loop until count is zero */ | |
60 | sync /* wait until last icbi completes */ | |
61 | isync /* discard prefetched instructions */ | |
62 | LdataToCodeDone: | |
63 | blr /* return nothing */ | |
64 | ||
65 | ENTRY(kdp_sync_cache, TAG_NO_FRAME_USED) | |
66 | sync /* data sync */ | |
67 | isync /* inst sync */ | |
68 | blr /* return nothing */ | |
69 | ||
70 | ENTRY(kdp_xlate_off, TAG_NO_FRAME_USED) | |
71 | mfmsr r3 | |
9bccf70c A |
72 | rlwinm r3,r3,0,MSR_FP_BIT+1,MSR_FP_BIT-1 ; Force floating point off |
73 | rlwinm r3,r3,0,MSR_VEC_BIT+1,MSR_VEC_BIT-1 ; Force vectors off | |
1c79356b A |
74 | rlwinm r4, r3, 0, MSR_DR_BIT+1, MSR_IR_BIT-1 |
75 | mtmsr r4 | |
76 | isync | |
77 | blr | |
78 | ||
79 | ENTRY(kdp_xlate_restore, TAG_NO_FRAME_USED) | |
80 | mtmsr r3 | |
81 | isync | |
82 | blr | |
83 |