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91447636 A |
1 | /* |
2 | * Copyright (c) 2003 Apple Computer, Inc. All rights reserved. | |
3 | * | |
8f6c56a5 | 4 | * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ |
91447636 | 5 | * |
8f6c56a5 A |
6 | * This file contains Original Code and/or Modifications of Original Code |
7 | * as defined in and that are subject to the Apple Public Source License | |
8 | * Version 2.0 (the 'License'). You may not use this file except in | |
9 | * compliance with the License. The rights granted to you under the License | |
10 | * may not be used to create, or enable the creation or redistribution of, | |
11 | * unlawful or unlicensed copies of an Apple operating system, or to | |
12 | * circumvent, violate, or enable the circumvention or violation of, any | |
13 | * terms of an Apple operating system software license agreement. | |
14 | * | |
15 | * Please obtain a copy of the License at | |
16 | * http://www.opensource.apple.com/apsl/ and read it before using this file. | |
17 | * | |
18 | * The Original Code and all software distributed under the License are | |
19 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
20 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, | |
21 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
22 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. | |
23 | * Please see the License for the specific language governing rights and | |
8ad349bb | 24 | * limitations under the License. |
8f6c56a5 A |
25 | * |
26 | * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ | |
91447636 A |
27 | */ |
28 | ||
29 | #define ASSEMBLER | |
30 | #include <sys/appleapiopts.h> | |
31 | #include <ppc/asm.h> | |
32 | #include <machine/cpu_capabilities.h> | |
33 | #include <machine/commpage.h> | |
34 | ||
35 | /* | |
36 | * WARNING: this code is written for 32-bit mode, and ported by the kernel if necessary | |
37 | * to 64-bit mode for use in the 64-bit commpage. This "port" consists of the following | |
38 | * simple transformations: | |
39 | * - all word compares are changed to doubleword | |
40 | * - all "srwi[.]" opcodes are changed to "srdi[.]" | |
41 | * Nothing else is done. For this to work, the following rules must be | |
42 | * carefully followed: | |
43 | * - do not use carry or overflow | |
44 | * - only use record mode if you are sure the results are mode-invariant | |
45 | * for example, all "andi." and almost all "rlwinm." are fine | |
46 | * - do not use "slwi", "slw", or "srw" | |
47 | * An imaginative programmer could break the porting model in other ways, but the above | |
48 | * are the most likely problem areas. It is perhaps surprising how well in practice | |
49 | * this simple method works. | |
50 | */ | |
51 | ||
52 | .text | |
53 | .align 2 | |
54 | ||
55 | ||
56 | /* ********************* | |
57 | * * M E M S E T _ 6 4 * | |
58 | * ********************* | |
59 | * | |
60 | * This is a subroutine called by Libc memset and _memset_pattern for large nonzero | |
61 | * operands (zero operands are funneled into bzero.) This version is for a | |
62 | * hypothetic processor that is 64-bit but not Altivec. | |
63 | * It is not optimized, since it would only be used during bringup. | |
64 | * | |
65 | * Registers at entry: | |
66 | * r4 = count of bytes to store (must be >= 32) | |
67 | * r8 = ptr to the 1st byte to store (16-byte aligned) | |
68 | * r9 = ptr to 16-byte pattern to store (16-byte aligned) | |
69 | * When we return: | |
70 | * r3 = not changed, since memset returns it | |
71 | * r4 = bytes remaining to store (will be <32) | |
72 | * r7 = not changed | |
73 | * r8 = ptr to next byte to store (still 16-byte aligned) | |
74 | * r12 = not changed (holds return value for memset) | |
75 | */ | |
76 | ||
77 | memset_64: | |
78 | srwi r0,r4,5 // get number of 32-byte chunks (>0) | |
79 | ld r10,0(r9) // load pattern | |
80 | ld r11,8(r9) | |
81 | rlwinm r4,r4,0,0x1F // mask down count | |
82 | mtctr r0 // set up loop count | |
83 | ||
84 | // Loop over 32-byte chunks. | |
85 | 1: | |
86 | std r10,0(r8) | |
87 | std r11,8(r8) | |
88 | std r10,16(r8) | |
89 | std r11,24(r8) | |
90 | addi r8,r8,32 | |
91 | bdnz++ 1b | |
92 | ||
93 | blr | |
94 | ||
95 | ||
96 | COMMPAGE_DESCRIPTOR(memset_64,_COMM_PAGE_MEMSET_PATTERN,k64Bit,kHasAltivec, \ | |
97 | kCommPageBoth+kPort32to64) |