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1/*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
8f6c56a5 4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
1c79356b 5 *
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6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
8ad349bb 24 * limitations under the License.
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25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
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27 */
28/*
29 * @OSF_COPYRIGHT@
30 */
31/*
32 * Mach Operating System
33 * Copyright (c) 1991 Carnegie Mellon University
34 * All Rights Reserved.
35 *
36 * Permission to use, copy, modify and distribute this software and its
37 * documentation is hereby granted, provided that both the copyright
38 * notice and this permission notice appear in all copies of the
39 * software, derivative works or modified versions, and any portions
40 * thereof, and that both notices appear in supporting documentation.
41 *
42 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
43 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
44 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
45 *
46 * Carnegie Mellon requests users of this software to return to
47 *
48 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
49 * School of Computer Science
50 * Carnegie Mellon University
51 * Pittsburgh PA 15213-3890
52 *
53 * any improvements or extensions that they make and grant Carnegie Mellon
54 * the rights to redistribute these changes.
55 */
56
57/*
58 */
59
60#ifndef _I386_FPU_H_
61#define _I386_FPU_H_
62
63/*
64 * Macro definitions for routines to manipulate the
65 * floating-point processor.
66 */
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67
68#include <i386/proc_reg.h>
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69#include <i386/thread.h>
70#include <kern/kern_types.h>
71#include <mach/i386/kern_return.h>
72#include <mach/i386/thread_status.h>
73
74/*
75 * FPU instructions.
76 */
77#define fninit() \
78 __asm__ volatile("fninit")
79
80#define fnstcw(control) \
81 __asm__("fnstcw %0" : "=m" (*(unsigned short *)(control)))
82
83#define fldcw(control) \
84 __asm__ volatile("fldcw %0" : : "m" (*(unsigned short *) &(control)) )
85
86extern unsigned short fnstsw(void);
87
88extern __inline__ unsigned short fnstsw(void)
89{
90 unsigned short status;
91 __asm__ volatile("fnstsw %0" : "=ma" (status));
92 return(status);
93}
94
95#define fnclex() \
96 __asm__ volatile("fnclex")
97
55e303ae 98#define fnsave(state) \
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99 __asm__ volatile("fnsave %0" : "=m" (*state))
100
101#define frstor(state) \
102 __asm__ volatile("frstor %0" : : "m" (state))
103
104#define fwait() \
105 __asm__("fwait");
106
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107#define fxrstor(addr) __asm("fxrstor %0" : : "m" (*(addr)))
108#define fxsave(addr) __asm __volatile("fxsave %0" : "=m" (*(addr)))
109
110#define FXSAFE() (fp_kind == FP_FXSR)
1c79356b 111
8f6c56a5 112#define fpu_load_context(pcb)
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113
114/*
115 * Save thread`s FPU context.
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116 * If only one CPU, we just set the task-switched bit,
117 * to keep the new thread from using the coprocessor.
118 * If multiple CPUs, we save the entire state.
119 * NOTE: in order to provide backwards compatible support in the kernel. When saving SSE2 state, we also save the
120 * FP state in it's old location. Otherwise fpu_get_state() and fpu_set_state() will stop working
1c79356b 121 */
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122#define fpu_save_context(thread) \
123 { \
124 register struct i386_fpsave_state *ifps; \
125 ifps = (thread)->machine.pcb->ims.ifps; \
126 if (ifps != 0 && !ifps->fp_valid) { \
127 /* registers are in FPU - save to memory */ \
128 ifps->fp_valid = TRUE; \
129 ifps->fp_save_flavor = FP_387; \
130 if (FXSAFE()) { \
131 fxsave(&ifps->fx_save_state); \
132 ifps->fp_save_flavor = FP_FXSR; \
133 } \
134 fnsave(&ifps->fp_save_state); \
135 } \
136 set_ts(); \
137 }
138
139
140
141extern int fp_kind;
1c79356b 142
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143extern void init_fpu(void);
144extern void fpu_module_init(void);
145extern void fpu_free(
146 struct i386_fpsave_state * fps);
147extern kern_return_t fpu_set_state(
148 thread_t thr_act,
149 struct i386_float_state * st);
150extern kern_return_t fpu_get_state(
151 thread_t thr_act,
152 struct i386_float_state * st);
153extern kern_return_t fpu_set_fxstate(
154 thread_t thr_act,
155 struct i386_float_state * st);
156extern kern_return_t fpu_get_fxstate(
157 thread_t thr_act,
158 struct i386_float_state * st);
159extern void fpnoextflt(void);
160extern void fpextovrflt(void);
161extern void fpexterrflt(void);
162extern void fp_state_alloc(void);
163extern void fpintr(void);
164extern void fpflush(thread_t);
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165
166#endif /* _I386_FPU_H_ */