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1 | /* |
2 | * Copyright (c) 2000 Apple Computer, Inc. All rights reserved. | |
3 | * | |
8f6c56a5 | 4 | * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ |
1c79356b | 5 | * |
8f6c56a5 A |
6 | * This file contains Original Code and/or Modifications of Original Code |
7 | * as defined in and that are subject to the Apple Public Source License | |
8 | * Version 2.0 (the 'License'). You may not use this file except in | |
9 | * compliance with the License. The rights granted to you under the License | |
10 | * may not be used to create, or enable the creation or redistribution of, | |
11 | * unlawful or unlicensed copies of an Apple operating system, or to | |
12 | * circumvent, violate, or enable the circumvention or violation of, any | |
13 | * terms of an Apple operating system software license agreement. | |
14 | * | |
15 | * Please obtain a copy of the License at | |
16 | * http://www.opensource.apple.com/apsl/ and read it before using this file. | |
17 | * | |
18 | * The Original Code and all software distributed under the License are | |
19 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
20 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, | |
21 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
22 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. | |
23 | * Please see the License for the specific language governing rights and | |
8ad349bb | 24 | * limitations under the License. |
8f6c56a5 A |
25 | * |
26 | * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ | |
1c79356b A |
27 | */ |
28 | /* | |
29 | * @OSF_FREE_COPYRIGHT@ | |
30 | * | |
31 | */ | |
32 | ||
33 | /* Routines to perform high-speed scrolling, assuming that the memory is | |
34 | * non-cached, and that the amount of memory to be scrolled is a multiple | |
35 | * of (at least) 16. | |
36 | */ | |
37 | ||
38 | #include <ppc/asm.h> | |
39 | #include <ppc/proc_reg.h> | |
40 | ||
41 | /* | |
42 | * void video_scroll_up(unsigned long start, | |
43 | * unsigned long end, | |
44 | * unsigned long dest) | |
45 | */ | |
46 | ||
47 | ENTRY(video_scroll_up, TAG_NO_FRAME_USED) | |
48 | ||
de355530 | 49 | mfmsr r0 /* Get the MSR */ |
de355530 A |
50 | mflr r6 /* Get the LR */ |
51 | ori r7,r0,1<<(31-MSR_FP_BIT) /* Turn on floating point */ | |
52 | stwu r1,-(FM_SIZE+16)(r1) /* Get space for a couple of registers on stack */ | |
53 | rlwinm r7,r7,0,MSR_EE_BIT+1,MSR_EE_BIT-1 /* Turn off interrupts */ | |
54 | stw r6,(FM_SIZE+16+FM_LR_SAVE)(r1) /* Save the return */ | |
1c79356b | 55 | |
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56 | mtmsr r7 /* Turn on FPU */ |
57 | isync /* Wait for it */ | |
1c79356b | 58 | |
de355530 A |
59 | vsufpuon1: stfd f0,(FM_SIZE+0)(r1) /* Save one register */ |
60 | stfd f1,(FM_SIZE+8)(r1) /* and the second */ | |
1c79356b A |
61 | |
62 | /* ok, now we can use the FPU registers to do some fast copying | |
63 | */ | |
64 | ||
65 | .L_vscr_up_loop: | |
66 | lfd f0, 0(r3) | |
67 | lfd f1, 8(r3) | |
68 | ||
69 | addi r3, r3, 16 | |
70 | ||
71 | stfd f0, 0(r5) | |
72 | ||
73 | cmpl cr0, r3, r4 | |
74 | ||
75 | stfd f1, 8(r5) | |
76 | ||
77 | addi r5, r5, 16 | |
78 | ||
79 | blt+ cr0, .L_vscr_up_loop | |
80 | ||
81 | lfd f0,(FM_SIZE+0)(r1) /* Load back one register */ | |
82 | lfd f1,(FM_SIZE+8)(r1) /* and the second */ | |
83 | lwz r1,0(r1) /* Pop the stack */ | |
84 | ||
85 | mtmsr r0 /* Turn off FPU again */ | |
86 | isync /* Wait for it */ | |
87 | blr /* Go away, don't bother me... */ | |
88 | ||
89 | ||
90 | /* | |
91 | * void video_scroll_down(unsigned long start, HIGH address to scroll from | |
92 | * unsigned long end, LOW address | |
93 | * unsigned long dest) HIGH address | |
94 | */ | |
95 | ||
96 | ENTRY(video_scroll_down, TAG_NO_FRAME_USED) | |
97 | ||
98 | /* Save off the link register, we want to call fpu_save. | |
99 | */ | |
100 | ||
101 | ||
de355530 | 102 | mfmsr r0 /* Get the MSR */ |
de355530 A |
103 | mflr r6 /* Get the LR */ |
104 | ori r7,r0,1<<(31-MSR_FP_BIT) /* Turn on floating point */ | |
105 | stwu r1,-(FM_SIZE+16)(r1) /* Get space for a couple of registers on stack */ | |
106 | rlwinm r7,r7,0,MSR_EE_BIT+1,MSR_EE_BIT-1 /* Turn off interrupts */ | |
107 | stw r6,(FM_SIZE+16+FM_LR_SAVE)(r1) /* Save the return */ | |
1c79356b | 108 | |
de355530 A |
109 | mtmsr r7 /* Turn on FPU */ |
110 | isync /* Wait for it */ | |
1c79356b | 111 | |
de355530 A |
112 | vsdfpuon1: stfd f0,(FM_SIZE+0)(r1) /* Save one register */ |
113 | stfd f1,(FM_SIZE+8)(r1) /* and the second */ | |
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114 | |
115 | /* ok, now we can use the FPU registers to do some fast copying */ | |
116 | ||
117 | .L_vscr_down_loop: | |
118 | lfd f0, -16(r3) | |
119 | lfd f1, -8(r3) | |
120 | ||
121 | subi r3, r3, 16 | |
122 | ||
123 | stfd f0, -16(r5) | |
124 | ||
125 | cmpl cr0, r3, r4 | |
126 | ||
127 | stfd f1, -8(r5) | |
128 | ||
129 | subi r5, r5, 16 | |
130 | ||
131 | bgt+ cr0, .L_vscr_down_loop | |
132 | ||
133 | ||
134 | lfd f0,(FM_SIZE+0)(r1) /* Load back one register */ | |
135 | lfd f1,(FM_SIZE+8)(r1) /* and the second */ | |
136 | lwz r1,0(r1) /* Pop the stack */ | |
137 | ||
138 | mtmsr r0 /* Turn off FPU again */ | |
139 | isync /* Wait for it */ | |
140 | blr /* Go away, don't bother me... */ | |
141 |