[apple/xnu.git] / osfmk / ppc / machine_routines.h

/*
 * Copyright (c) 2000-2004 Apple Computer, Inc. All rights reserved.
 *
 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
 * 
 * This file contains Original Code and/or Modifications of Original Code
 * as defined in and that are subject to the Apple Public Source License
 * Version 2.0 (the 'License'). You may not use this file except in
 * compliance with the License. The rights granted to you under the License
 * may not be used to create, or enable the creation or redistribution of,
 * unlawful or unlicensed copies of an Apple operating system, or to
 * circumvent, violate, or enable the circumvention or violation of, any
 * terms of an Apple operating system software license agreement.
 * 
 * Please obtain a copy of the License at
 * http://www.opensource.apple.com/apsl/ and read it before using this file.
 * 
 * The Original Code and all software distributed under the License are
 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
 * Please see the License for the specific language governing rights and
 * limitations under the License.
 * 
 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
 */
/*
 * @OSF_COPYRIGHT@
 */

#ifndef	_PPC_MACHINE_ROUTINES_H_
#define	_PPC_MACHINE_ROUTINES_H_

#include <mach/mach_types.h>
#include <mach/boolean.h>
#include <kern/kern_types.h>
#include <pexpert/pexpert.h>

/* Get Interrupts Enabled */
extern boolean_t	ml_get_interrupts_enabled(
						void);

/* Set Interrupts Enabled */
extern boolean_t	ml_set_interrupts_enabled(
						boolean_t				enable);

/* Check if running at interrupt context */
extern boolean_t	ml_at_interrupt_context(
						void);

#ifdef KERNEL_PRIVATE

/* Generate a fake interrupt */
extern void			ml_cause_interrupt(
						void);

/* Type for the IPI Hander */
typedef void (*ipi_handler_t)(void);

/* Type for the Time Base Enable function */
typedef void (*time_base_enable_t)(cpu_id_t cpu_id, boolean_t enable);

/* enables (or disables) the processor nap mode the function returns the previous value*/
extern boolean_t	ml_enable_nap(
						int						target_cpu,
						boolean_t				nap_enabled);

/* Put the processor to sleep */
extern void			ml_ppc_sleep(
						void);

extern void			ml_get_timebase(
						unsigned long long		*timstamp);

extern int			ml_enable_cache_level(
						int						cache_level,
						int						enable);

extern void			ml_static_mfree(
						vm_offset_t				vaddr,
						vm_size_t				size);
        
/* Init Interrupts */
extern void			ml_install_interrupt_handler(
						void					*nub,
						int						source,
						void					*target,
						IOInterruptHandler		handler,
						void					*refCon);
               
extern vm_offset_t		ml_static_ptovirt(
							vm_offset_t			paddr);

/* virtual to physical on wired pages */
extern vm_offset_t		ml_vtophys(
							vm_offset_t			vaddr);

/* PCI config cycle probing */
extern boolean_t		ml_probe_read(
							vm_offset_t			paddr,
							unsigned int		*val);

extern boolean_t		ml_probe_read_64(
							addr64_t			paddr,
							unsigned int		*val);

/* Read physical address byte */
extern unsigned int		ml_phys_read_byte(
							vm_offset_t			paddr);

extern unsigned int		ml_phys_read_byte_64(
							addr64_t			paddr);

/* Read physical address half word */
extern unsigned int		ml_phys_read_half(
							vm_offset_t			paddr);

extern unsigned int		ml_phys_read_half_64(
							addr64_t			paddr);

/* Read physical address word*/
extern unsigned int		ml_phys_read(
							vm_offset_t			paddr);

extern unsigned int		ml_phys_read_64(
							addr64_t			paddr);

extern unsigned int		ml_phys_read_word(
							vm_offset_t			paddr);

extern unsigned int		ml_phys_read_word_64(
							addr64_t			paddr);

/* Read physical address double word */
extern unsigned long long ml_phys_read_double(
							vm_offset_t			paddr);

extern unsigned long long ml_phys_read_double_64(
							addr64_t			paddr);

/* Write physical address byte */
extern void				ml_phys_write_byte(
							vm_offset_t			paddr,
							unsigned	int		data);

extern void				ml_phys_write_byte_64(
								addr64_t		paddr,
								unsigned int	data);

/* Write physical address half word */
extern void				ml_phys_write_half(
							vm_offset_t			paddr,
							unsigned int		data);

extern void				ml_phys_write_half_64(
							addr64_t			paddr,
							unsigned int		data);

/* Write physical address word */
extern void				ml_phys_write(
							vm_offset_t			paddr,
							unsigned int		data);

extern void				ml_phys_write_64(
							addr64_t			paddr,
							unsigned int		data);

extern void				ml_phys_write_word(
							vm_offset_t			paddr,
							unsigned int		data);

extern void				ml_phys_write_word_64(
							addr64_t			paddr,
							unsigned int		data);

/* Write physical address double word */
extern void				 ml_phys_write_double(
							vm_offset_t			paddr,
							unsigned long long	data);

extern void				ml_phys_write_double_64(
							addr64_t paddr,
							unsigned long long	 data);

/* Struct for ml_processor_register */
struct ml_processor_info {
	cpu_id_t			cpu_id;
	boolean_t			boot_cpu;
	vm_offset_t			start_paddr;
	boolean_t			supports_nap;
	unsigned long			l2cr_value;
	time_base_enable_t		time_base_enable;
	uint32_t			power_mode_0;
	uint32_t			power_mode_1;
};

typedef struct ml_processor_info ml_processor_info_t;

/* Register a processor */
extern kern_return_t	ml_processor_register(
							ml_processor_info_t *ml_processor_info,
							processor_t			*processor,
							ipi_handler_t		*ipi_handler);

/* Zero bytes starting at a physical address */
extern void				bzero_phys(
							addr64_t			phys_address,
							uint32_t			length);

#endif /* KERNEL_PRIVATE */

#ifdef	XNU_KERNEL_PRIVATE
#if	defined(PEXPERT_KERNEL_PRIVATE) || defined(MACH_KERNEL_PRIVATE)

/* Map memory map IO space */
extern vm_offset_t		ml_io_map(
							vm_offset_t			phys_addr, 
							vm_size_t			size);

void	ml_get_bouncepool_info(
        vm_offset_t *phys_addr,
	vm_size_t   *size);


/* boot memory allocation */
extern vm_offset_t		ml_static_malloc(
							vm_size_t			size);

#endif /* PEXPERT_KERNEL_PRIVATE || MACH_KERNEL_PRIVATE */

#if	defined(BSD_KERNEL_PRIVATE) || defined(MACH_KERNEL_PRIVATE)

extern int				set_be_bit(
							void);

extern int				clr_be_bit(
							void);

extern int				be_tracing(
							void);

#endif /* BSD_KERNEL_PRIVATE || MACH_KERNEL_PRIVATE */

#ifdef	MACH_KERNEL_PRIVATE
extern void				ml_init_interrupt(
							void);

extern void				cacheInit(
							void);

extern void				cacheDisable(
							void);

extern void				ml_init_lock_timeout(
							void);

void ml_ppc_do_sleep(void);

#endif /* MACH_KERNEL_PRIVATE */
#endif /* XNU_KERNEL_PRIVATE */

#ifdef  KERNEL_PRIVATE
extern void		ml_thread_policy(
				thread_t	thread,
				unsigned	policy_id,
				unsigned	policy_info);

#define MACHINE_GROUP				0x00000001
#define MACHINE_NETWORK_GROUP		0x10000000 
#define MACHINE_NETWORK_WORKLOOP	0x00000001
#define MACHINE_NETWORK_NETISR		0x00000002

/* Initialize the maximum number of CPUs */
extern void				ml_init_max_cpus(
							unsigned int		max_cpus);

/* Return the maximum number of CPUs set by ml_init_max_cpus() */
extern unsigned int		ml_get_max_cpus(
							void);

extern void			ml_cpu_up(void);
extern void			ml_cpu_down(void);

/* Struct for ml_cpu_get_info */
struct ml_cpu_info {
	unsigned long		vector_unit;
	unsigned long		cache_line_size;
	unsigned long		l1_icache_size;
	unsigned long		l1_dcache_size;
	unsigned long		l2_settings;
	unsigned long		l2_cache_size;
	unsigned long		l3_settings;
	unsigned long		l3_cache_size;
};

typedef struct ml_cpu_info ml_cpu_info_t;

/* Get processor info */
extern void				ml_cpu_get_info(
							ml_cpu_info_t		*ml_cpu_info);

extern void				ml_set_processor_speed(
							unsigned long		speed);
extern void				ml_set_processor_speed_slave(
							unsigned long		speed);
extern void				ml_set_processor_speed_dpll(
							unsigned long		speed);
extern void				ml_set_processor_speed_dfs(
							unsigned long		speed);
extern void				ml_set_processor_speed_powertune(
							unsigned long		speed);

extern void				ml_set_processor_voltage(
							unsigned long		voltage);

extern unsigned int		ml_scom_write(
							uint32_t			reg,
							uint64_t			data);

extern unsigned int		ml_scom_read(
							uint32_t			reg,
							uint64_t			*data);

extern uint32_t 		ml_hdec_ratio(void);

#endif /* KERNEL_PRIVATE */

#endif /* _PPC_MACHINE_ROUTINES_H_ */
Commit	Line	Data
1c79356b	1	/*
91447636	2	* Copyright (c) 2000-2004 Apple Computer, Inc. All rights reserved.
1c79356b	3	*
8f6c56a5	4	* @APPLE_OSREFERENCE_LICENSE_HEADER_START@
1c79356b	5	*
8f6c56a5 A	6	* This file contains Original Code and/or Modifications of Original Code
	7	* as defined in and that are subject to the Apple Public Source License
	8	* Version 2.0 (the 'License'). You may not use this file except in
	9	* compliance with the License. The rights granted to you under the License
	10	* may not be used to create, or enable the creation or redistribution of,
	11	* unlawful or unlicensed copies of an Apple operating system, or to
	12	* circumvent, violate, or enable the circumvention or violation of, any
	13	* terms of an Apple operating system software license agreement.
	14	*
	15	* Please obtain a copy of the License at
	16	* http://www.opensource.apple.com/apsl/ and read it before using this file.
	17	*
	18	* The Original Code and all software distributed under the License are
	19	* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
	20	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
	21	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
	22	* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
	23	* Please see the License for the specific language governing rights and
8ad349bb	24	* limitations under the License.
8f6c56a5 A	25	*
8f6c56a5 A	26	* @APPLE_OSREFERENCE_LICENSE_HEADER_END@
1c79356b A	27	*/
	28	/*
	29	* @OSF_COPYRIGHT@
	30	*/
	31
	32	#ifndef _PPC_MACHINE_ROUTINES_H_
	33	#define _PPC_MACHINE_ROUTINES_H_
	34
	35	#include <mach/mach_types.h>
	36	#include <mach/boolean.h>
	37	#include <kern/kern_types.h>
	38	#include <pexpert/pexpert.h>
	39
9bccf70c	40	/* Get Interrupts Enabled */
91447636 A	41	extern boolean_t ml_get_interrupts_enabled(
91447636 A	42	void);
1c79356b	43
9bccf70c	44	/* Set Interrupts Enabled */
91447636 A	45	extern boolean_t ml_set_interrupts_enabled(
91447636 A	46	boolean_t enable);
1c79356b	47
9bccf70c	48	/* Check if running at interrupt context */
91447636 A	49	extern boolean_t ml_at_interrupt_context(
	50	void);
	51
	52	#ifdef KERNEL_PRIVATE
1c79356b	53
9bccf70c	54	/* Generate a fake interrupt */
91447636 A	55	extern void ml_cause_interrupt(
91447636 A	56	void);
9bccf70c A	57
	58	/* Type for the IPI Hander */
	59	typedef void (*ipi_handler_t)(void);
	60
	61	/* Type for the Time Base Enable function */
	62	typedef void (*time_base_enable_t)(cpu_id_t cpu_id, boolean_t enable);
	63
	64	/* enables (or disables) the processor nap mode the function returns the previous value*/
91447636 A	65	extern boolean_t ml_enable_nap(
	66	int target_cpu,
	67	boolean_t nap_enabled);
9bccf70c A	68
9bccf70c A	69	/* Put the processor to sleep */
91447636 A	70	extern void ml_ppc_sleep(
	71	void);
	72
	73	extern void ml_get_timebase(
	74	unsigned long long *timstamp);
9bccf70c	75
91447636 A	76	extern int ml_enable_cache_level(
	77	int cache_level,
	78	int enable);
1c79356b	79
91447636 A	80	extern void ml_static_mfree(
	81	vm_offset_t vaddr,
	82	vm_size_t size);
1c79356b	83
1c79356b	84	/* Init Interrupts */
91447636 A	85	extern void ml_install_interrupt_handler(
	86	void *nub,
	87	int source,
	88	void *target,
	89	IOInterruptHandler handler,
	90	void *refCon);
1c79356b	91
91447636 A	92	extern vm_offset_t ml_static_ptovirt(
91447636 A	93	vm_offset_t paddr);
1c79356b	94
9bccf70c	95	/* virtual to physical on wired pages */
91447636 A	96	extern vm_offset_t ml_vtophys(
91447636 A	97	vm_offset_t vaddr);
1c79356b A	98
1c79356b A	99	/* PCI config cycle probing */
91447636 A	100	extern boolean_t ml_probe_read(
	101	vm_offset_t paddr,
	102	unsigned int *val);
	103
	104	extern boolean_t ml_probe_read_64(
	105	addr64_t paddr,
	106	unsigned int *val);
1c79356b A	107
1c79356b A	108	/* Read physical address byte */
91447636 A	109	extern unsigned int ml_phys_read_byte(
	110	vm_offset_t paddr);
	111
	112	extern unsigned int ml_phys_read_byte_64(
	113	addr64_t paddr);
55e303ae A	114
55e303ae A	115	/* Read physical address half word */
91447636 A	116	extern unsigned int ml_phys_read_half(
	117	vm_offset_t paddr);
	118
	119	extern unsigned int ml_phys_read_half_64(
	120	addr64_t paddr);
1c79356b	121
55e303ae	122	/* Read physical address word*/
91447636 A	123	extern unsigned int ml_phys_read(
	124	vm_offset_t paddr);
	125
	126	extern unsigned int ml_phys_read_64(
	127	addr64_t paddr);
	128
	129	extern unsigned int ml_phys_read_word(
	130	vm_offset_t paddr);
	131
	132	extern unsigned int ml_phys_read_word_64(
	133	addr64_t paddr);
55e303ae A	134
55e303ae A	135	/* Read physical address double word */
91447636 A	136	extern unsigned long long ml_phys_read_double(
	137	vm_offset_t paddr);
	138
	139	extern unsigned long long ml_phys_read_double_64(
	140	addr64_t paddr);
1c79356b A	141
1c79356b A	142	/* Write physical address byte */
91447636 A	143	extern void ml_phys_write_byte(
	144	vm_offset_t paddr,
	145	unsigned int data);
	146
	147	extern void ml_phys_write_byte_64(
	148	addr64_t paddr,
	149	unsigned int data);
1c79356b	150
55e303ae	151	/* Write physical address half word */
91447636 A	152	extern void ml_phys_write_half(
	153	vm_offset_t paddr,
	154	unsigned int data);
	155
	156	extern void ml_phys_write_half_64(
	157	addr64_t paddr,
	158	unsigned int data);
55e303ae A	159
55e303ae A	160	/* Write physical address word */
91447636 A	161	extern void ml_phys_write(
	162	vm_offset_t paddr,
	163	unsigned int data);
	164
	165	extern void ml_phys_write_64(
	166	addr64_t paddr,
	167	unsigned int data);
	168
	169	extern void ml_phys_write_word(
	170	vm_offset_t paddr,
	171	unsigned int data);
	172
	173	extern void ml_phys_write_word_64(
	174	addr64_t paddr,
	175	unsigned int data);
55e303ae A	176
55e303ae A	177	/* Write physical address double word */
91447636 A	178	extern void ml_phys_write_double(
	179	vm_offset_t paddr,
	180	unsigned long long data);
	181
	182	extern void ml_phys_write_double_64(
	183	addr64_t paddr,
	184	unsigned long long data);
1c79356b	185
1c79356b	186	/* Struct for ml_processor_register */
55e303ae	187	struct ml_processor_info {
1c79356b A	188	cpu_id_t cpu_id;
	189	boolean_t boot_cpu;
	190	vm_offset_t start_paddr;
	191	boolean_t supports_nap;
91447636 A	192	unsigned long l2cr_value;
91447636 A	193	time_base_enable_t time_base_enable;
483a1d10 A	194	uint32_t power_mode_0;
483a1d10 A	195	uint32_t power_mode_1;
1c79356b A	196	};
1c79356b A	197
55e303ae	198	typedef struct ml_processor_info ml_processor_info_t;
1c79356b A	199
1c79356b A	200	/* Register a processor */
91447636 A	201	extern kern_return_t ml_processor_register(
	202	ml_processor_info_t *ml_processor_info,
	203	processor_t *processor,
	204	ipi_handler_t *ipi_handler);
1c79356b	205
55e303ae	206	/* Zero bytes starting at a physical address */
91447636 A	207	extern void bzero_phys(
	208	addr64_t phys_address,
	209	uint32_t length);
55e303ae	210
91447636	211	#endif /* KERNEL_PRIVATE */
1c79356b	212
91447636	213	#ifdef XNU_KERNEL_PRIVATE
9bccf70c	214	#if defined(PEXPERT_KERNEL_PRIVATE) \|\| defined(MACH_KERNEL_PRIVATE)
1c79356b	215
9bccf70c	216	/* Map memory map IO space */
91447636 A	217	extern vm_offset_t ml_io_map(
	218	vm_offset_t phys_addr,
	219	vm_size_t size);
1c79356b	220
89b3af67 A	221	void ml_get_bouncepool_info(
	222	vm_offset_t *phys_addr,
	223	vm_size_t *size);
	224
	225
9bccf70c	226	/* boot memory allocation */
91447636 A	227	extern vm_offset_t ml_static_malloc(
91447636 A	228	vm_size_t size);
1c79356b	229
9bccf70c	230	#endif /* PEXPERT_KERNEL_PRIVATE \|\| MACH_KERNEL_PRIVATE */
1c79356b	231
91447636	232	#if defined(BSD_KERNEL_PRIVATE) \|\| defined(MACH_KERNEL_PRIVATE)
9bccf70c	233
91447636 A	234	extern int set_be_bit(
91447636 A	235	void);
9bccf70c	236
91447636 A	237	extern int clr_be_bit(
91447636 A	238	void);
9bccf70c	239
91447636 A	240	extern int be_tracing(
91447636 A	241	void);
9bccf70c	242
91447636	243	#endif /* BSD_KERNEL_PRIVATE \|\| MACH_KERNEL_PRIVATE */
1c79356b	244
91447636 A	245	#ifdef MACH_KERNEL_PRIVATE
	246	extern void ml_init_interrupt(
	247	void);
1c79356b	248
91447636 A	249	extern void cacheInit(
91447636 A	250	void);
1c79356b	251
91447636 A	252	extern void cacheDisable(
91447636 A	253	void);
1c79356b	254
91447636 A	255	extern void ml_init_lock_timeout(
91447636 A	256	void);
1c79356b	257
91447636	258	void ml_ppc_do_sleep(void);
ab86ba33	259
9bccf70c	260	#endif /* MACH_KERNEL_PRIVATE */
91447636	261	#endif /* XNU_KERNEL_PRIVATE */
9bccf70c	262
91447636 A	263	#ifdef KERNEL_PRIVATE
	264	extern void ml_thread_policy(
	265	thread_t thread,
	266	unsigned policy_id,
	267	unsigned policy_info);
9bccf70c A	268
	269	#define MACHINE_GROUP 0x00000001
	270	#define MACHINE_NETWORK_GROUP 0x10000000
	271	#define MACHINE_NETWORK_WORKLOOP 0x00000001
	272	#define MACHINE_NETWORK_NETISR 0x00000002
	273
43866e37	274	/* Initialize the maximum number of CPUs */
91447636 A	275	extern void ml_init_max_cpus(
91447636 A	276	unsigned int max_cpus);
43866e37 A	277
43866e37 A	278	/* Return the maximum number of CPUs set by ml_init_max_cpus() */
91447636 A	279	extern unsigned int ml_get_max_cpus(
91447636 A	280	void);
43866e37	281
91447636 A	282	extern void ml_cpu_up(void);
91447636 A	283	extern void ml_cpu_down(void);
43866e37 A	284
	285	/* Struct for ml_cpu_get_info */
	286	struct ml_cpu_info {
9bccf70c A	287	unsigned long vector_unit;
	288	unsigned long cache_line_size;
	289	unsigned long l1_icache_size;
	290	unsigned long l1_dcache_size;
	291	unsigned long l2_settings;
	292	unsigned long l2_cache_size;
	293	unsigned long l3_settings;
	294	unsigned long l3_cache_size;
	295	};
	296
43866e37	297	typedef struct ml_cpu_info ml_cpu_info_t;
9bccf70c A	298
9bccf70c A	299	/* Get processor info */
91447636 A	300	extern void ml_cpu_get_info(
	301	ml_cpu_info_t *ml_cpu_info);
	302
	303	extern void ml_set_processor_speed(
	304	unsigned long speed);
	305	extern void ml_set_processor_speed_slave(
	306	unsigned long speed);
	307	extern void ml_set_processor_speed_dpll(
	308	unsigned long speed);
	309	extern void ml_set_processor_speed_dfs(
	310	unsigned long speed);
	311	extern void ml_set_processor_speed_powertune(
	312	unsigned long speed);
	313
	314	extern void ml_set_processor_voltage(
	315	unsigned long voltage);
	316
	317	extern unsigned int ml_scom_write(
	318	uint32_t reg,
	319	uint64_t data);
	320
	321	extern unsigned int ml_scom_read(
	322	uint32_t reg,
	323	uint64_t *data);
	324
	325	extern uint32_t ml_hdec_ratio(void);
	326
	327	#endif /* KERNEL_PRIVATE */
9bccf70c	328
1c79356b	329	#endif /* _PPC_MACHINE_ROUTINES_H_ */