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0c530ab8 | 1 | /* |
b0d623f7 | 2 | * Copyright (c) 2003-2009 Apple Inc. All rights reserved. |
0c530ab8 | 3 | * |
2d21ac55 | 4 | * @APPLE_OSREFERENCE_LICENSE_HEADER_START@ |
0c530ab8 | 5 | * |
2d21ac55 A |
6 | * This file contains Original Code and/or Modifications of Original Code |
7 | * as defined in and that are subject to the Apple Public Source License | |
8 | * Version 2.0 (the 'License'). You may not use this file except in | |
9 | * compliance with the License. The rights granted to you under the License | |
10 | * may not be used to create, or enable the creation or redistribution of, | |
11 | * unlawful or unlicensed copies of an Apple operating system, or to | |
12 | * circumvent, violate, or enable the circumvention or violation of, any | |
13 | * terms of an Apple operating system software license agreement. | |
0c530ab8 | 14 | * |
2d21ac55 A |
15 | * Please obtain a copy of the License at |
16 | * http://www.opensource.apple.com/apsl/ and read it before using this file. | |
17 | * | |
18 | * The Original Code and all software distributed under the License are | |
19 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER | |
0c530ab8 A |
20 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, |
21 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, | |
2d21ac55 A |
22 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. |
23 | * Please see the License for the specific language governing rights and | |
24 | * limitations under the License. | |
0c530ab8 | 25 | * |
2d21ac55 | 26 | * @APPLE_OSREFERENCE_LICENSE_HEADER_END@ |
0c530ab8 A |
27 | */ |
28 | ||
29 | #include <machine/cpu_capabilities.h> | |
b0d623f7 A |
30 | #include <machine/commpage.h> |
31 | #include <machine/asm.h> | |
32 | #include <assym.s> | |
0c530ab8 | 33 | |
2d21ac55 A |
34 | /* |
35 | * extern void commpage_sched_gen_inc(void); | |
36 | */ | |
37 | .text | |
0c530ab8 | 38 | |
b0d623f7 | 39 | .globl _commpage_sched_gen_inc |
2d21ac55 | 40 | _commpage_sched_gen_inc: |
b0d623f7 A |
41 | #if defined (__x86_64__) |
42 | FRAME | |
43 | ||
44 | /* Increment 32-bit commpage field if present */ | |
45 | movq _commPagePtr32(%rip),%rdx | |
46 | testq %rdx,%rdx | |
47 | je 1f | |
48 | subq $(ASM_COMM_PAGE32_BASE_ADDRESS),%rdx | |
49 | lock | |
50 | incl ASM_COMM_PAGE_SCHED_GEN(%rdx) | |
0c530ab8 | 51 | |
b0d623f7 A |
52 | /* Increment 64-bit commpage field if present */ |
53 | movq _commPagePtr64(%rip),%rdx | |
54 | testq %rdx,%rdx | |
55 | je 1f | |
56 | subq $(ASM_COMM_PAGE32_START_ADDRESS),%rdx | |
57 | lock | |
58 | incl ASM_COMM_PAGE_SCHED_GEN(%rdx) | |
59 | 1: | |
60 | EMARF | |
61 | ret | |
62 | #elif defined (__i386__) | |
63 | FRAME | |
64 | ||
2d21ac55 A |
65 | /* Increment 32-bit commpage field if present */ |
66 | mov _commPagePtr32,%edx | |
67 | testl %edx,%edx | |
0c530ab8 | 68 | je 1f |
b0d623f7 | 69 | sub $(ASM_COMM_PAGE32_BASE_ADDRESS),%edx |
2d21ac55 | 70 | lock |
b0d623f7 | 71 | incl ASM_COMM_PAGE_SCHED_GEN(%edx) |
0c530ab8 | 72 | |
2d21ac55 A |
73 | /* Increment 64-bit commpage field if present */ |
74 | mov _commPagePtr64,%edx | |
75 | testl %edx,%edx | |
76 | je 1f | |
b0d623f7 | 77 | sub $(ASM_COMM_PAGE32_START_ADDRESS),%edx |
2d21ac55 | 78 | lock |
b0d623f7 | 79 | incl ASM_COMM_PAGE_SCHED_GEN(%edx) |
0c530ab8 | 80 | 1: |
b0d623f7 | 81 | EMARF |
0c530ab8 | 82 | ret |
b0d623f7 A |
83 | #else |
84 | #error unsupported architecture | |
85 | #endif | |
0c530ab8 A |
86 | |
87 | /* pointers to the 32-bit commpage routine descriptors */ | |
88 | /* WARNING: these must be sorted by commpage address! */ | |
89 | .const_data | |
b0d623f7 | 90 | .align 3 |
0c530ab8 A |
91 | .globl _commpage_32_routines |
92 | _commpage_32_routines: | |
b0d623f7 A |
93 | COMMPAGE_DESCRIPTOR_REFERENCE(compare_and_swap32_mp) |
94 | COMMPAGE_DESCRIPTOR_REFERENCE(compare_and_swap32_up) | |
95 | COMMPAGE_DESCRIPTOR_REFERENCE(compare_and_swap64_mp) | |
96 | COMMPAGE_DESCRIPTOR_REFERENCE(compare_and_swap64_up) | |
97 | COMMPAGE_DESCRIPTOR_REFERENCE(AtomicEnqueue) | |
98 | COMMPAGE_DESCRIPTOR_REFERENCE(AtomicDequeue) | |
99 | COMMPAGE_DESCRIPTOR_REFERENCE(memory_barrier) | |
100 | COMMPAGE_DESCRIPTOR_REFERENCE(memory_barrier_sse2) | |
101 | COMMPAGE_DESCRIPTOR_REFERENCE(atomic_add32_mp) | |
102 | COMMPAGE_DESCRIPTOR_REFERENCE(atomic_add32_up) | |
103 | COMMPAGE_DESCRIPTOR_REFERENCE(cpu_number) | |
104 | COMMPAGE_DESCRIPTOR_REFERENCE(mach_absolute_time) | |
105 | COMMPAGE_DESCRIPTOR_REFERENCE(spin_lock_try_mp) | |
106 | COMMPAGE_DESCRIPTOR_REFERENCE(spin_lock_try_up) | |
107 | COMMPAGE_DESCRIPTOR_REFERENCE(spin_lock_mp) | |
108 | COMMPAGE_DESCRIPTOR_REFERENCE(spin_lock_up) | |
109 | COMMPAGE_DESCRIPTOR_REFERENCE(spin_unlock) | |
110 | COMMPAGE_DESCRIPTOR_REFERENCE(pthread_getspecific) | |
111 | COMMPAGE_DESCRIPTOR_REFERENCE(gettimeofday) | |
112 | COMMPAGE_DESCRIPTOR_REFERENCE(sys_flush_dcache) | |
113 | COMMPAGE_DESCRIPTOR_REFERENCE(sys_icache_invalidate) | |
114 | COMMPAGE_DESCRIPTOR_REFERENCE(pthread_self) | |
115 | COMMPAGE_DESCRIPTOR_REFERENCE(preempt) | |
116 | // COMMPAGE_DESCRIPTOR_REFERENCE(relinquish) | |
117 | COMMPAGE_DESCRIPTOR_REFERENCE(bit_test_and_set_mp) | |
118 | COMMPAGE_DESCRIPTOR_REFERENCE(bit_test_and_set_up) | |
119 | COMMPAGE_DESCRIPTOR_REFERENCE(bit_test_and_clear_mp) | |
120 | COMMPAGE_DESCRIPTOR_REFERENCE(bit_test_and_clear_up) | |
121 | COMMPAGE_DESCRIPTOR_REFERENCE(bzero_scalar) | |
122 | COMMPAGE_DESCRIPTOR_REFERENCE(bzero_sse2) | |
123 | COMMPAGE_DESCRIPTOR_REFERENCE(bzero_sse42) | |
124 | COMMPAGE_DESCRIPTOR_REFERENCE(bcopy_scalar) | |
125 | COMMPAGE_DESCRIPTOR_REFERENCE(bcopy_sse2) | |
126 | COMMPAGE_DESCRIPTOR_REFERENCE(bcopy_sse3x) | |
127 | COMMPAGE_DESCRIPTOR_REFERENCE(bcopy_sse42) | |
128 | COMMPAGE_DESCRIPTOR_REFERENCE(memset_pattern_sse2) | |
129 | COMMPAGE_DESCRIPTOR_REFERENCE(longcopy_sse3x) | |
130 | COMMPAGE_DESCRIPTOR_REFERENCE(backoff) | |
131 | COMMPAGE_DESCRIPTOR_REFERENCE(AtomicFifoEnqueue) | |
132 | COMMPAGE_DESCRIPTOR_REFERENCE(AtomicFifoDequeue) | |
133 | COMMPAGE_DESCRIPTOR_REFERENCE(nanotime) | |
134 | COMMPAGE_DESCRIPTOR_REFERENCE(nanotime_slow) | |
135 | COMMPAGE_DESCRIPTOR_REFERENCE(pthread_mutex_lock) | |
136 | COMMPAGE_DESCRIPTOR_REFERENCE(pfz_enqueue) | |
137 | COMMPAGE_DESCRIPTOR_REFERENCE(pfz_dequeue) | |
138 | COMMPAGE_DESCRIPTOR_REFERENCE(pfz_mutex_lock) | |
139 | #if defined (__i386__) | |
0c530ab8 | 140 | .long 0 |
b0d623f7 A |
141 | #elif defined (__x86_64__) |
142 | .quad 0 | |
143 | #else | |
144 | #error unsupported architecture | |
145 | #endif | |
0c530ab8 A |
146 | |
147 | ||
148 | /* pointers to the 64-bit commpage routine descriptors */ | |
149 | /* WARNING: these must be sorted by commpage address! */ | |
150 | .const_data | |
b0d623f7 | 151 | .align 3 |
0c530ab8 A |
152 | .globl _commpage_64_routines |
153 | _commpage_64_routines: | |
b0d623f7 A |
154 | COMMPAGE_DESCRIPTOR_REFERENCE(compare_and_swap32_mp_64) |
155 | COMMPAGE_DESCRIPTOR_REFERENCE(compare_and_swap32_up_64) | |
156 | COMMPAGE_DESCRIPTOR_REFERENCE(compare_and_swap64_mp_64) | |
157 | COMMPAGE_DESCRIPTOR_REFERENCE(compare_and_swap64_up_64) | |
158 | COMMPAGE_DESCRIPTOR_REFERENCE(AtomicEnqueue_64) | |
159 | COMMPAGE_DESCRIPTOR_REFERENCE(AtomicDequeue_64) | |
160 | COMMPAGE_DESCRIPTOR_REFERENCE(memory_barrier_sse2) /* same routine as 32-bit version */ | |
161 | COMMPAGE_DESCRIPTOR_REFERENCE(atomic_add32_mp_64) | |
162 | COMMPAGE_DESCRIPTOR_REFERENCE(atomic_add32_up_64) | |
163 | COMMPAGE_DESCRIPTOR_REFERENCE(atomic_add64_mp_64) | |
164 | COMMPAGE_DESCRIPTOR_REFERENCE(atomic_add64_up_64) | |
165 | COMMPAGE_DESCRIPTOR_REFERENCE(cpu_number_64) | |
166 | COMMPAGE_DESCRIPTOR_REFERENCE(mach_absolute_time) | |
167 | COMMPAGE_DESCRIPTOR_REFERENCE(spin_lock_try_mp_64) | |
168 | COMMPAGE_DESCRIPTOR_REFERENCE(spin_lock_try_up_64) | |
169 | COMMPAGE_DESCRIPTOR_REFERENCE(spin_lock_mp_64) | |
170 | COMMPAGE_DESCRIPTOR_REFERENCE(spin_lock_up_64) | |
171 | COMMPAGE_DESCRIPTOR_REFERENCE(spin_unlock_64) | |
172 | COMMPAGE_DESCRIPTOR_REFERENCE(pthread_getspecific_64) | |
173 | COMMPAGE_DESCRIPTOR_REFERENCE(gettimeofday_64) | |
174 | COMMPAGE_DESCRIPTOR_REFERENCE(sys_flush_dcache_64) | |
175 | COMMPAGE_DESCRIPTOR_REFERENCE(sys_icache_invalidate) /* same routine as 32-bit version, just a "ret" */ | |
176 | COMMPAGE_DESCRIPTOR_REFERENCE(pthread_self_64) | |
177 | COMMPAGE_DESCRIPTOR_REFERENCE(preempt_64) | |
178 | COMMPAGE_DESCRIPTOR_REFERENCE(bit_test_and_set_mp_64) | |
179 | COMMPAGE_DESCRIPTOR_REFERENCE(bit_test_and_set_up_64) | |
180 | COMMPAGE_DESCRIPTOR_REFERENCE(bit_test_and_clear_mp_64) | |
181 | COMMPAGE_DESCRIPTOR_REFERENCE(bit_test_and_clear_up_64) | |
182 | COMMPAGE_DESCRIPTOR_REFERENCE(bzero_sse2_64) | |
183 | COMMPAGE_DESCRIPTOR_REFERENCE(bzero_sse42_64) | |
184 | COMMPAGE_DESCRIPTOR_REFERENCE(bcopy_sse3x_64) | |
185 | COMMPAGE_DESCRIPTOR_REFERENCE(bcopy_sse42_64) | |
186 | COMMPAGE_DESCRIPTOR_REFERENCE(memset_pattern_sse2_64) | |
187 | COMMPAGE_DESCRIPTOR_REFERENCE(longcopy_sse3x_64) | |
188 | COMMPAGE_DESCRIPTOR_REFERENCE(backoff_64) | |
189 | COMMPAGE_DESCRIPTOR_REFERENCE(AtomicFifoEnqueue_64) | |
190 | COMMPAGE_DESCRIPTOR_REFERENCE(AtomicFifoDequeue_64) | |
191 | COMMPAGE_DESCRIPTOR_REFERENCE(nanotime_64) | |
192 | COMMPAGE_DESCRIPTOR_REFERENCE(pthread_mutex_lock_64) | |
193 | COMMPAGE_DESCRIPTOR_REFERENCE(pfz_enqueue_64) | |
194 | COMMPAGE_DESCRIPTOR_REFERENCE(pfz_dequeue_64) | |
195 | COMMPAGE_DESCRIPTOR_REFERENCE(pfz_mutex_lock_64) | |
196 | #if defined (__i386__) | |
0c530ab8 | 197 | .long 0 |
b0d623f7 A |
198 | #elif defined (__x86_64__) |
199 | .quad 0 | |
200 | #else | |
201 | #error unsupported architecture | |
202 | #endif | |
0c530ab8 | 203 |