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b0d623f7
A
1/*
2 * Copyright (c) 2000-2006 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28/*
29 * @OSF_COPYRIGHT@
30 */
31/*
32 * Mach Operating System
33 * Copyright (c) 1991,1990,1989 Carnegie Mellon University
34 * All Rights Reserved.
35 *
36 * Permission to use, copy, modify and distribute this software and its
37 * documentation is hereby granted, provided that both the copyright
38 * notice and this permission notice appear in all copies of the
39 * software, derivative works or modified versions, and any portions
40 * thereof, and that both notices appear in supporting documentation.
41 *
42 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
43 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
44 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
45 *
46 * Carnegie Mellon requests users of this software to return to
47 *
48 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
49 * School of Computer Science
50 * Carnegie Mellon University
51 * Pittsburgh PA 15213-3890
52 *
53 * any improvements or extensions that they make and grant Carnegie Mellon
54 * the rights to redistribute these changes.
55 */
56/*
57 */
58#include <mach_assert.h>
59
60#include <string.h>
61#include <mach/boolean.h>
62#include <mach/i386/vm_types.h>
63#include <mach/i386/vm_param.h>
64#include <kern/kern_types.h>
65#include <kern/misc_protos.h>
66#include <sys/errno.h>
67#include <i386/param.h>
68#include <i386/misc_protos.h>
69#include <i386/cpu_data.h>
70#include <i386/machine_routines.h>
71#include <i386/cpuid.h>
72#include <i386/vmx.h>
73#include <vm/pmap.h>
74#include <vm/vm_map.h>
75#include <vm/vm_kern.h>
76#include <vm/vm_fault.h>
77
78#include <libkern/OSAtomic.h>
79#include <sys/kdebug.h>
80
81#if 0
82
83#undef KERNEL_DEBUG
84#define KERNEL_DEBUG KERNEL_DEBUG_CONSTANT
85#define KDEBUG 1
86
87#endif
88
89/* XXX - should be gone from here */
90extern void invalidate_icache64(addr64_t addr, unsigned cnt, int phys);
91extern void flush_dcache64(addr64_t addr, unsigned count, int phys);
92extern boolean_t phys_page_exists(ppnum_t);
93extern void bcopy_no_overwrite(const char *from, char *to,vm_size_t bytes);
94extern void pmap_set_reference(ppnum_t pn);
95extern void mapping_set_mod(ppnum_t pa);
96extern void mapping_set_ref(ppnum_t pn);
97
98extern void ovbcopy(const char *from,
99 char *to,
100 vm_size_t nbytes);
101void machine_callstack(natural_t *buf, vm_size_t callstack_max);
102
103
104#define value_64bit(value) ((value) & 0xFFFFFFFF00000000ULL)
105#define low32(x) ((unsigned int)((x) & 0x00000000FFFFFFFFULL))
106
107#define INT_SIZE (BYTE_SIZE * sizeof (int))
108
109/*
110 * Set indicated bit in bit string.
111 */
112void
113setbit(int bitno, int *s)
114{
115 s[bitno / INT_SIZE] |= 1 << (bitno % INT_SIZE);
116}
117
118/*
119 * Clear indicated bit in bit string.
120 */
121void
122clrbit(int bitno, int *s)
123{
124 s[bitno / INT_SIZE] &= ~(1 << (bitno % INT_SIZE));
125}
126
127/*
128 * Test if indicated bit is set in bit string.
129 */
130int
131testbit(int bitno, int *s)
132{
133 return s[bitno / INT_SIZE] & (1 << (bitno % INT_SIZE));
134}
135
136/*
137 * Find first bit set in bit string.
138 */
139int
140ffsbit(int *s)
141{
142 int offset;
143
144 for (offset = 0; !*s; offset += (int)INT_SIZE, ++s);
145 return offset + __builtin_ctz(*s);
146}
147
148int
149ffs(unsigned int mask)
150{
151 if (mask == 0)
152 return 0;
153
154 /*
155 * NOTE: cannot use __builtin_ffs because it generates a call to
156 * 'ffs'
157 */
158 return 1 + __builtin_ctz(mask);
159}
160
161void
162bzero_phys_nc(
163 addr64_t src64,
164 uint32_t bytes)
165{
166 bzero_phys(src64,bytes);
167}
168
169void
170bzero_phys(
171 addr64_t src64,
172 uint32_t bytes)
173{
174 bzero(PHYSMAP_PTOV(src64), bytes);
175}
176
177
178/*
179 * bcopy_phys - like bcopy but copies from/to physical addresses.
180 */
181
182void
183bcopy_phys(
184 addr64_t src64,
185 addr64_t dst64,
186 vm_size_t bytes)
187{
188 /* Not necessary for K64 - but ensure we stay within a page */
189 if (((((uint32_t)src64 & (NBPG-1)) + bytes) > NBPG) ||
190 ((((uint32_t)dst64 & (NBPG-1)) + bytes) > NBPG) ) {
191 panic("bcopy_phys alignment");
192 }
193 bcopy(PHYSMAP_PTOV(src64), PHYSMAP_PTOV(dst64), bytes);
194}
195
6d2010ae
A
196/*
197 * allow a function to get a quick virtual mapping of a physical page
198 */
199
200int
201apply_func_phys(
202 addr64_t dst64,
203 vm_size_t bytes,
204 int (*func)(void * buffer, vm_size_t bytes, void * arg),
205 void * arg)
206{
207 /* Not necessary for K64 - but ensure we stay within a page */
208 if (((((uint32_t)dst64 & (NBPG-1)) + bytes) > NBPG) ) {
209 panic("apply_func_phys alignment");
210 }
211
212 return func(PHYSMAP_PTOV(dst64), bytes, arg);
213}
214
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215/*
216 * ovbcopy - like bcopy, but recognizes overlapping ranges and handles
217 * them correctly.
218 */
219
220void
221ovbcopy(
222 const char *from,
223 char *to,
224 vm_size_t bytes) /* num bytes to copy */
225{
226 /* Assume that bcopy copies left-to-right (low addr first). */
227 if (from + bytes <= to || to + bytes <= from || to == from)
228 bcopy_no_overwrite(from, to, bytes); /* non-overlapping or no-op*/
229 else if (from > to)
230 bcopy_no_overwrite(from, to, bytes); /* overlapping but OK */
231 else {
232 /* to > from: overlapping, and must copy right-to-left. */
233 from += bytes - 1;
234 to += bytes - 1;
235 while (bytes-- > 0)
236 *to-- = *from--;
237 }
238}
239
240
241/*
242 * Read data from a physical address. Memory should not be cache inhibited.
243 */
244
245
6d2010ae 246static inline unsigned int
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247ml_phys_read_data(pmap_paddr_t paddr, int size)
248{
249 unsigned int result;
250
7ddcb079
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251 if (!physmap_enclosed(paddr))
252 panic("%s: 0x%llx out of bounds\n", __FUNCTION__, paddr);
253
b0d623f7 254 switch (size) {
7ddcb079
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255 unsigned char s1;
256 unsigned short s2;
b0d623f7 257 case 1:
7ddcb079
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258 s1 = *(volatile unsigned char *)PHYSMAP_PTOV(paddr);
259 result = s1;
260 break;
b0d623f7 261 case 2:
7ddcb079
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262 s2 = *(volatile unsigned short *)PHYSMAP_PTOV(paddr);
263 result = s2;
264 break;
b0d623f7 265 case 4:
7ddcb079
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266 result = *(volatile unsigned int *)PHYSMAP_PTOV(paddr);
267 break;
268 default:
269 panic("Invalid size %d for ml_phys_read_data\n", size);
270 break;
b0d623f7 271 }
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272 return result;
273}
274
275static unsigned long long
276ml_phys_read_long_long(pmap_paddr_t paddr )
277{
7ddcb079
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278 if (!physmap_enclosed(paddr))
279 panic("%s: 0x%llx out of bounds\n", __FUNCTION__, paddr);
280 return *(volatile unsigned long long *)PHYSMAP_PTOV(paddr);
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281}
282
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283unsigned int ml_phys_read( vm_offset_t paddr)
284{
285 return ml_phys_read_data((pmap_paddr_t)paddr, 4);
286}
287
288unsigned int ml_phys_read_word(vm_offset_t paddr) {
289
290 return ml_phys_read_data((pmap_paddr_t)paddr, 4);
291}
292
293unsigned int ml_phys_read_64(addr64_t paddr64)
294{
295 return ml_phys_read_data((pmap_paddr_t)paddr64, 4);
296}
297
298unsigned int ml_phys_read_word_64(addr64_t paddr64)
299{
300 return ml_phys_read_data((pmap_paddr_t)paddr64, 4);
301}
302
303unsigned int ml_phys_read_half(vm_offset_t paddr)
304{
305 return ml_phys_read_data((pmap_paddr_t)paddr, 2);
306}
307
308unsigned int ml_phys_read_half_64(addr64_t paddr64)
309{
310 return ml_phys_read_data((pmap_paddr_t)paddr64, 2);
311}
312
313unsigned int ml_phys_read_byte(vm_offset_t paddr)
314{
315 return ml_phys_read_data((pmap_paddr_t)paddr, 1);
316}
317
318unsigned int ml_phys_read_byte_64(addr64_t paddr64)
319{
320 return ml_phys_read_data((pmap_paddr_t)paddr64, 1);
321}
322
323unsigned long long ml_phys_read_double(vm_offset_t paddr)
324{
325 return ml_phys_read_long_long((pmap_paddr_t)paddr);
326}
327
328unsigned long long ml_phys_read_double_64(addr64_t paddr64)
329{
330 return ml_phys_read_long_long((pmap_paddr_t)paddr64);
331}
332
333
334
335/*
336 * Write data to a physical address. Memory should not be cache inhibited.
337 */
338
6d2010ae 339static inline void
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340ml_phys_write_data(pmap_paddr_t paddr, unsigned long data, int size)
341{
7ddcb079
A
342 if (!physmap_enclosed(paddr))
343 panic("%s: 0x%llx out of bounds\n", __FUNCTION__, paddr);
344
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345 switch (size) {
346 case 1:
7ddcb079 347 *(volatile unsigned char *)PHYSMAP_PTOV(paddr) = (unsigned char)data;
b0d623f7
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348 break;
349 case 2:
7ddcb079 350 *(volatile unsigned short *)PHYSMAP_PTOV(paddr) = (unsigned short)data;
b0d623f7
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351 break;
352 case 4:
7ddcb079 353 *(volatile unsigned int *)PHYSMAP_PTOV(paddr) = (unsigned int)data;
b0d623f7 354 break;
7ddcb079
A
355 default:
356 panic("Invalid size %d for ml_phys_write_data\n", size);
357 break;
b0d623f7
A
358 }
359}
360
361static void
362ml_phys_write_long_long(pmap_paddr_t paddr, unsigned long long data)
363{
7ddcb079
A
364 if (!physmap_enclosed(paddr))
365 panic("%s: 0x%llx out of bounds\n", __FUNCTION__, paddr);
366
367 *(volatile unsigned long long *)PHYSMAP_PTOV(paddr) = data;
b0d623f7
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368}
369
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370void ml_phys_write_byte(vm_offset_t paddr, unsigned int data)
371{
372 ml_phys_write_data((pmap_paddr_t)paddr, data, 1);
373}
374
375void ml_phys_write_byte_64(addr64_t paddr64, unsigned int data)
376{
377 ml_phys_write_data((pmap_paddr_t)paddr64, data, 1);
378}
379
380void ml_phys_write_half(vm_offset_t paddr, unsigned int data)
381{
382 ml_phys_write_data((pmap_paddr_t)paddr, data, 2);
383}
384
385void ml_phys_write_half_64(addr64_t paddr64, unsigned int data)
386{
387 ml_phys_write_data((pmap_paddr_t)paddr64, data, 2);
388}
389
390void ml_phys_write(vm_offset_t paddr, unsigned int data)
391{
392 ml_phys_write_data((pmap_paddr_t)paddr, data, 4);
393}
394
395void ml_phys_write_64(addr64_t paddr64, unsigned int data)
396{
397 ml_phys_write_data((pmap_paddr_t)paddr64, data, 4);
398}
399
400void ml_phys_write_word(vm_offset_t paddr, unsigned int data)
401{
402 ml_phys_write_data((pmap_paddr_t)paddr, data, 4);
403}
404
405void ml_phys_write_word_64(addr64_t paddr64, unsigned int data)
406{
407 ml_phys_write_data((pmap_paddr_t)paddr64, data, 4);
408}
409
410void ml_phys_write_double(vm_offset_t paddr, unsigned long long data)
411{
412 ml_phys_write_long_long((pmap_paddr_t)paddr, data);
413}
414
415void ml_phys_write_double_64(addr64_t paddr64, unsigned long long data)
416{
417 ml_phys_write_long_long((pmap_paddr_t)paddr64, data);
418}
419
420
421/* PCI config cycle probing
422 *
423 *
424 * Read the memory location at physical address paddr.
7ddcb079
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425 * *Does not* recover from machine checks, unlike the PowerPC implementation.
426 * Should probably be deprecated.
b0d623f7
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427 */
428
429boolean_t
430ml_probe_read(vm_offset_t paddr, unsigned int *val)
431{
432 if ((PAGE_SIZE - (paddr & PAGE_MASK)) < 4)
433 return FALSE;
434
435 *val = ml_phys_read((pmap_paddr_t)paddr);
436
437 return TRUE;
438}
439
440/*
441 * Read the memory location at physical address paddr.
442 * This is a part of a device probe, so there is a good chance we will
443 * have a machine check here. So we have to be able to handle that.
444 * We assume that machine checks are enabled both in MSR and HIDs
445 */
446boolean_t
447ml_probe_read_64(addr64_t paddr64, unsigned int *val)
448{
449 if ((PAGE_SIZE - (paddr64 & PAGE_MASK)) < 4)
450 return FALSE;
451
452 *val = ml_phys_read_64((pmap_paddr_t)paddr64);
453 return TRUE;
454}
455
456
457int bcmp(
458 const void *pa,
459 const void *pb,
460 size_t len)
461{
462 const char *a = (const char *)pa;
463 const char *b = (const char *)pb;
464
465 if (len == 0)
466 return 0;
467
468 do
469 if (*a++ != *b++)
470 break;
471 while (--len);
472
473 return (int)len;
474}
475
476int
477memcmp(const void *s1, const void *s2, size_t n)
478{
479 if (n != 0) {
480 const unsigned char *p1 = s1, *p2 = s2;
481
482 do {
483 if (*p1++ != *p2++)
484 return (*--p1 - *--p2);
485 } while (--n != 0);
486 }
487 return (0);
488}
489
490/*
491 * Abstract:
492 * strlen returns the number of characters in "string" preceeding
493 * the terminating null character.
494 */
495
496size_t
497strlen(
498 register const char *string)
499{
500 register const char *ret = string;
501
502 while (*string++ != '\0')
503 continue;
504 return string - 1 - ret;
505}
506
507uint32_t
508hw_compare_and_store(uint32_t oldval, uint32_t newval, volatile uint32_t *dest)
509{
510 return OSCompareAndSwap((UInt32)oldval,
511 (UInt32)newval,
512 (volatile UInt32 *)dest);
513}
514
515#if MACH_ASSERT
516
517/*
518 * Machine-dependent routine to fill in an array with up to callstack_max
519 * levels of return pc information.
520 */
521void machine_callstack(
522 __unused natural_t *buf,
523 __unused vm_size_t callstack_max)
524{
525}
526
527#endif /* MACH_ASSERT */
528
529void fillPage(ppnum_t pa, unsigned int fill)
530{
531 pmap_paddr_t src;
532 int i;
533 int cnt = PAGE_SIZE / sizeof(unsigned int);
534 unsigned int *addr;
535
536 src = i386_ptob(pa);
537 for (i = 0, addr = (unsigned int *)PHYSMAP_PTOV(src); i < cnt; i++)
538 *addr++ = fill;
539}
540
541static inline void __sfence(void)
542{
543 __asm__ volatile("sfence");
544}
545static inline void __mfence(void)
546{
547 __asm__ volatile("mfence");
548}
549static inline void __wbinvd(void)
550{
551 __asm__ volatile("wbinvd");
552}
553static inline void __clflush(void *ptr)
554{
555 __asm__ volatile("clflush (%0)" : : "r" (ptr));
556}
557
558void dcache_incoherent_io_store64(addr64_t pa, unsigned int count)
559{
6d2010ae
A
560 addr64_t linesize = cpuid_info()->cache_linesize;
561 addr64_t bound = (pa + count + linesize - 1) & ~(linesize - 1);
b0d623f7
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562
563 __mfence();
564
6d2010ae
A
565 while (pa < bound) {
566 __clflush(PHYSMAP_PTOV(pa));
567 pa += linesize;
568 }
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569
570 __mfence();
571}
572
573void dcache_incoherent_io_flush64(addr64_t pa, unsigned int count)
574{
575 return(dcache_incoherent_io_store64(pa,count));
576}
577
578void
6d2010ae 579flush_dcache64(addr64_t addr, unsigned count, int phys)
b0d623f7 580{
6d2010ae
A
581 if (phys) {
582 dcache_incoherent_io_flush64(addr, count);
583 }
584 else {
585 uint32_t linesize = cpuid_info()->cache_linesize;
586 addr64_t bound = (addr + count + linesize -1) & ~(linesize - 1);
587 __mfence();
588 while (addr < bound) {
589 __clflush((void *) (uintptr_t) addr);
590 addr += linesize;
591 }
592 __mfence();
593 }
b0d623f7
A
594}
595
596void
597invalidate_icache64(__unused addr64_t addr,
598 __unused unsigned count,
599 __unused int phys)
600{
601}
602
603
604addr64_t vm_last_addr;
605
606void
607mapping_set_mod(ppnum_t pn)
608{
609 pmap_set_modify(pn);
610}
611
612void
613mapping_set_ref(ppnum_t pn)
614{
615 pmap_set_reference(pn);
616}
617
618void
619cache_flush_page_phys(ppnum_t pa)
620{
621 boolean_t istate;
622 unsigned char *cacheline_addr;
623 int cacheline_size = cpuid_info()->cache_linesize;
624 int cachelines_to_flush = PAGE_SIZE/cacheline_size;
625
626 __mfence();
627
628 istate = ml_set_interrupts_enabled(FALSE);
629
630 for (cacheline_addr = (unsigned char *)PHYSMAP_PTOV(i386_ptob(pa));
631 cachelines_to_flush > 0;
632 cachelines_to_flush--, cacheline_addr += cacheline_size) {
633 __clflush((void *) cacheline_addr);
634 }
635
636 (void) ml_set_interrupts_enabled(istate);
637
638 __mfence();
639}
640
641
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642#if !MACH_KDP
643void
644kdp_register_callout(void)
645{
646}
647#endif
648
649#if !CONFIG_VMX
650int host_vmxon(boolean_t exclusive __unused)
651{
652 return VMX_UNSUPPORTED;
653}
654
655void host_vmxoff(void)
656{
657 return;
658}
659#endif