[apple/xnu.git] / osfmk / i386 / postcode.h

/*
 * Copyright (c) 2008 Apple Computer, Inc. All rights reserved.
 *
 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
 * 
 * This file contains Original Code and/or Modifications of Original Code
 * as defined in and that are subject to the Apple Public Source License
 * Version 2.0 (the 'License'). You may not use this file except in
 * compliance with the License. The rights granted to you under the License
 * may not be used to create, or enable the creation or redistribution of,
 * unlawful or unlicensed copies of an Apple operating system, or to
 * circumvent, violate, or enable the circumvention or violation of, any
 * terms of an Apple operating system software license agreement.
 * 
 * Please obtain a copy of the License at
 * http://www.opensource.apple.com/apsl/ and read it before using this file.
 * 
 * The Original Code and all software distributed under the License are
 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
 * Please see the License for the specific language governing rights and
 * limitations under the License.
 * 
 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
 */

#ifndef	_I386_POSTCODE_H_
#define	_I386_POSTCODE_H_

/* Define this to delay about 1 sec after posting each code */
//#define POSTCODE_DELAY 1

/* The POSTCODE is port 0x80 */
#define	POSTPORT 0x80

#define	SPINCOUNT	300000000
#define CPU_PAUSE()	rep; nop

#if DEBUG
/*
 * Macro to output byte value to postcode, destoying register al.
 * Additionally, if POSTCODE_DELAY, spin for about a second.
 */
#if POSTCODE_DELAY
#define POSTCODE_AL			\
        outb    %al,$(POSTPORT);	\
	movl	$(SPINCOUNT), %eax;	\
1:					\
	CPU_PAUSE();			\
	decl	%eax;			\
	jne	1b
#define POSTCODE_AX			\
        outw    %ax,$(POSTPORT);	\
	movl	$(SPINCOUNT), %eax;	\
1:					\
	CPU_PAUSE();			\
	decl	%eax;			\
	jne	1b
#else
#define POSTCODE_AL			\
        outb    %al,$(POSTPORT)
#define POSTCODE_AX			\
        outw    %ax,$(POSTPORT)
#endif /* POSTCODE_DELAY */

#define POSTCODE(XX)			\
	mov	$(XX), %al;		\
	POSTCODE_AL

#define POSTCODE2(XXXX)			\
	mov	$(XXXX), %ax;		\
	POSTCODE_AX

/* Output byte value to postcode, without destoying register eax */ 
#define	POSTCODE_SAVE_EAX(XX)		\
	push	%eax;			\
	POSTCODE(XX);			\
	pop	%eax

/*
 * Display a 32-bit value to the post card - low byte to high byte
 * Entry: value in %ebx
 * Exit: %ebx preserved; %eax destroyed
 */ 
#define POSTCODE32_EBX			\
	roll	$8, %ebx;		\
	movl	%ebx, %eax;		\
	POSTCODE_AL;			\
					\
	roll	$8, %ebx;		\
	movl	%ebx, %eax;		\
	POSTCODE_AL;			\
					\
	roll	$8, %ebx;		\
	movl	%ebx, %eax;		\
	POSTCODE_AL;			\
					\
	roll	$8, %ebx;		\
	movl	%ebx, %eax;		\
	POSTCODE_AL

#else	/* DEBUG */
#define POSTCODE_AL
#define POSTCODE_AX
#define POSTCODE(X)
#define POSTCODE2(X)
#define POSTCODE_SAVE_EAX(X)
#define POSTCODE32_EBX
#endif	/* DEBUG */

/*
 * The following postcodes are defined for stages of early startup:
 */

#define	_PSTART_ENTRY			0xFF
#define	_PSTART_RELOC			0xFE
#define	PSTART_ENTRY			0xFD
#define PSTART_PAGE_TABLES		0xFC
#if defined(__x86_64__)
#define PSTART_BEFORE_ID_MAP		0xFB
#else
#define PSTART_BEFORE_PAGING		0xFB
#endif
#define VSTART_ENTRY			0xFA
#define VSTART_STACK_SWITCH		0xF9
#define VSTART_BEFORE_PAGING		0xF8
#define VSTART_EXIT			0xF7
#define	I386_INIT_ENTRY			0xF6
#define	CPU_INIT_D			0xF5
#define	PE_INIT_PLATFORM_D		0xF4

#define	SLAVE_RSTART_ENTRY		0xEF
#define	SLAVE_REAL_TO_PROT_ENTRY	0xEE
#define	SLAVE_REAL_TO_PROT_EXIT		0xED
#define	SLAVE_STARTPROG_ENTRY		0xEC
#define	SLAVE_STARTPROG_EXIT		0xEB
#define	SLAVE_PSTART_ENTRY		0xEA
#define	SLAVE_PSTART_EXIT		0xE9
#if defined(__i386__)
#define	SLAVE_VSTART_ENTRY		0xE8
#define	SLAVE_VSTART_DESC_INIT		0xE7
#define	SLAVE_VSTART_STACK_SWITCH	0xE6
#define	SLAVE_VSTART_EXIT		0xE5
#endif
#define	I386_INIT_SLAVE			0xE4

#define	PANIC_DOUBLE_FAULT		0xDF	/* Double Fault exception */
#define	PANIC_MACHINE_CHECK		0xDE	/* Machine-Check */
#define	MP_KDP_ENTER			0xDB	/* Machine in kdp DeBugger */
#define	PANIC_HLT			0xD1	/* Die an early death */ 
#define	NO_64BIT			0x64	/* No 64-bit support yet */

#define ACPI_WAKE_START_ENTRY		0xCF
#define ACPI_WAKE_PROT_ENTRY		0xCE
#define ACPI_WAKE_PAGED_ENTRY		0xCD

#define	CPU_IA32_ENABLE_ENTRY		0xBF
#define	CPU_IA32_ENABLE_EXIT		0xBE
#define ML_LOAD_DESC64_ENTRY		0xBD
#define ML_LOAD_DESC64_GDT		0xBC
#define ML_LOAD_DESC64_IDT		0xBB
#define ML_LOAD_DESC64_LDT		0xBA
#define ML_LOAD_DESC64_EXIT		0xB9
#define	CPU_IA32_DISABLE_ENTRY		0xB8
#define	CPU_IA32_DISABLE_EXIT		0xB7

#ifndef ASSEMBLER
inline static void
_postcode_delay(uint32_t	spincount)
{
	asm volatile("1:			\n\t"
	             "  rep; nop;		\n\t"	
		     "  decl %%eax;		\n\t"
		     "  jne 1b"
		     : : "a" (spincount));
}
inline static void
_postcode(uint8_t	xx)
{
	asm volatile("outb %0, %1" : : "a" (xx), "N" (POSTPORT));
}
inline static void
_postcode2(uint16_t	xxxx)
{
	asm volatile("outw %0, %1" : : "a" (xxxx), "N" (POSTPORT));
}
#if	DEBUG
inline static void
postcode(uint8_t	xx)
{
	_postcode(xx);
#if	POSTCODE_DELAY
	_postcode_delay(SPINCOUNT);
#endif
}
inline static void
postcode2(uint8_t	xxxx)
{
	_postcode2(xxxx);
#if	POSTCODE_DELAY
	_postcode_delay(SPINCOUNT);
#endif
}
#else
#define postcode(xx) do {} while(0)
#define postcode2(xxxx) do {} while(0)
#endif
#endif

#endif /* _I386_POSTCODE_H_ */
Commit	Line	Data
91447636	1	/*
b0d623f7	2	* Copyright (c) 2008 Apple Computer, Inc. All rights reserved.
91447636	3	*
2d21ac55	4	* @APPLE_OSREFERENCE_LICENSE_HEADER_START@
91447636	5	*
2d21ac55 A	6	* This file contains Original Code and/or Modifications of Original Code
	7	* as defined in and that are subject to the Apple Public Source License
	8	* Version 2.0 (the 'License'). You may not use this file except in
	9	* compliance with the License. The rights granted to you under the License
	10	* may not be used to create, or enable the creation or redistribution of,
	11	* unlawful or unlicensed copies of an Apple operating system, or to
	12	* circumvent, violate, or enable the circumvention or violation of, any
	13	* terms of an Apple operating system software license agreement.
8f6c56a5	14	*
2d21ac55 A	15	* Please obtain a copy of the License at
	16	* http://www.opensource.apple.com/apsl/ and read it before using this file.
	17	*
	18	* The Original Code and all software distributed under the License are
	19	* distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
8f6c56a5 A	20	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
8f6c56a5 A	21	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
2d21ac55 A	22	* FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
	23	* Please see the License for the specific language governing rights and
	24	* limitations under the License.
8f6c56a5	25	*
2d21ac55	26	* @APPLE_OSREFERENCE_LICENSE_HEADER_END@
91447636 A	27	*/
	28
	29	#ifndef _I386_POSTCODE_H_
	30	#define _I386_POSTCODE_H_
	31
91447636	32	/* Define this to delay about 1 sec after posting each code */
2d21ac55	33	//#define POSTCODE_DELAY 1
91447636 A	34
	35	/* The POSTCODE is port 0x80 */
	36	#define POSTPORT 0x80
	37
0c530ab8	38	#define SPINCOUNT 300000000
91447636 A	39	#define CPU_PAUSE() rep; nop
	40
	41	#if DEBUG
	42	/*
	43	* Macro to output byte value to postcode, destoying register al.
	44	* Additionally, if POSTCODE_DELAY, spin for about a second.
	45	*/
	46	#if POSTCODE_DELAY
	47	#define POSTCODE_AL \
	48	outb %al,$(POSTPORT); \
	49	movl $(SPINCOUNT), %eax; \
	50	1: \
	51	CPU_PAUSE(); \
	52	decl %eax; \
	53	jne 1b
b0d623f7 A	54	#define POSTCODE_AX \
	55	outw %ax,$(POSTPORT); \
	56	movl $(SPINCOUNT), %eax; \
	57	1: \
	58	CPU_PAUSE(); \
	59	decl %eax; \
	60	jne 1b
91447636 A	61	#else
	62	#define POSTCODE_AL \
	63	outb %al,$(POSTPORT)
b0d623f7 A	64	#define POSTCODE_AX \
b0d623f7 A	65	outw %ax,$(POSTPORT)
91447636 A	66	#endif /* POSTCODE_DELAY */
	67
	68	#define POSTCODE(XX) \
	69	mov $(XX), %al; \
	70	POSTCODE_AL
	71
b0d623f7 A	72	#define POSTCODE2(XXXX) \
	73	mov $(XXXX), %ax; \
	74	POSTCODE_AX
	75
91447636 A	76	/* Output byte value to postcode, without destoying register eax */
	77	#define POSTCODE_SAVE_EAX(XX) \
	78	push %eax; \
	79	POSTCODE(XX); \
	80	pop %eax
	81
	82	/*
	83	* Display a 32-bit value to the post card - low byte to high byte
	84	* Entry: value in %ebx
	85	* Exit: %ebx preserved; %eax destroyed
	86	*/
	87	#define POSTCODE32_EBX \
	88	roll $8, %ebx; \
	89	movl %ebx, %eax; \
	90	POSTCODE_AL; \
	91	\
	92	roll $8, %ebx; \
	93	movl %ebx, %eax; \
	94	POSTCODE_AL; \
	95	\
	96	roll $8, %ebx; \
	97	movl %ebx, %eax; \
	98	POSTCODE_AL; \
	99	\
	100	roll $8, %ebx; \
	101	movl %ebx, %eax; \
	102	POSTCODE_AL
	103
	104	#else /* DEBUG */
	105	#define POSTCODE_AL
b0d623f7	106	#define POSTCODE_AX
91447636	107	#define POSTCODE(X)
b0d623f7 A	108	#define POSTCODE2(X)
b0d623f7 A	109	#define POSTCODE_SAVE_EAX(X)
91447636 A	110	#define POSTCODE32_EBX
	111	#endif /* DEBUG */
	112
	113	/*
	114	* The following postcodes are defined for stages of early startup:
	115	*/
	116
0c530ab8 A	117	#define _PSTART_ENTRY 0xFF
	118	#define _PSTART_RELOC 0xFE
	119	#define PSTART_ENTRY 0xFD
	120	#define PSTART_PAGE_TABLES 0xFC
b0d623f7 A	121	#if defined(__x86_64__)
	122	#define PSTART_BEFORE_ID_MAP 0xFB
	123	#else
0c530ab8	124	#define PSTART_BEFORE_PAGING 0xFB
b0d623f7	125	#endif
0c530ab8 A	126	#define VSTART_ENTRY 0xFA
0c530ab8 A	127	#define VSTART_STACK_SWITCH 0xF9
b0d623f7 A	128	#define VSTART_BEFORE_PAGING 0xF8
	129	#define VSTART_EXIT 0xF7
	130	#define I386_INIT_ENTRY 0xF6
	131	#define CPU_INIT_D 0xF5
	132	#define PE_INIT_PLATFORM_D 0xF4
0c530ab8 A	133
	134	#define SLAVE_RSTART_ENTRY 0xEF
	135	#define SLAVE_REAL_TO_PROT_ENTRY 0xEE
	136	#define SLAVE_REAL_TO_PROT_EXIT 0xED
	137	#define SLAVE_STARTPROG_ENTRY 0xEC
	138	#define SLAVE_STARTPROG_EXIT 0xEB
	139	#define SLAVE_PSTART_ENTRY 0xEA
	140	#define SLAVE_PSTART_EXIT 0xE9
b0d623f7	141	#if defined(__i386__)
0c530ab8 A	142	#define SLAVE_VSTART_ENTRY 0xE8
	143	#define SLAVE_VSTART_DESC_INIT 0xE7
	144	#define SLAVE_VSTART_STACK_SWITCH 0xE6
	145	#define SLAVE_VSTART_EXIT 0xE5
b0d623f7	146	#endif
0c530ab8 A	147	#define I386_INIT_SLAVE 0xE4
	148
	149	#define PANIC_DOUBLE_FAULT 0xDF /* Double Fault exception */
	150	#define PANIC_MACHINE_CHECK 0xDE /* Machine-Check */
	151	#define MP_KDP_ENTER 0xDB /* Machine in kdp DeBugger */
	152	#define PANIC_HLT 0xD1 /* Die an early death */
	153	#define NO_64BIT 0x64 /* No 64-bit support yet */
	154
	155	#define ACPI_WAKE_START_ENTRY 0xCF
	156	#define ACPI_WAKE_PROT_ENTRY 0xCE
	157	#define ACPI_WAKE_PAGED_ENTRY 0xCD
	158
	159	#define CPU_IA32_ENABLE_ENTRY 0xBF
	160	#define CPU_IA32_ENABLE_EXIT 0xBE
	161	#define ML_LOAD_DESC64_ENTRY 0xBD
	162	#define ML_LOAD_DESC64_GDT 0xBC
	163	#define ML_LOAD_DESC64_IDT 0xBB
	164	#define ML_LOAD_DESC64_LDT 0xBA
	165	#define ML_LOAD_DESC64_EXIT 0xB9
	166	#define CPU_IA32_DISABLE_ENTRY 0xB8
	167	#define CPU_IA32_DISABLE_EXIT 0xB7
91447636 A	168
	169	#ifndef ASSEMBLER
	170	inline static void
	171	_postcode_delay(uint32_t spincount)
	172	{
	173	asm volatile("1: \n\t"
	174	" rep; nop; \n\t"
	175	" decl %%eax; \n\t"
	176	" jne 1b"
	177	: : "a" (spincount));
	178	}
	179	inline static void
	180	_postcode(uint8_t xx)
	181	{
	182	asm volatile("outb %0, %1" : : "a" (xx), "N" (POSTPORT));
	183	}
b0d623f7 A	184	inline static void
	185	_postcode2(uint16_t xxxx)
	186	{
	187	asm volatile("outw %0, %1" : : "a" (xxxx), "N" (POSTPORT));
	188	}
91447636 A	189	#if DEBUG
	190	inline static void
	191	postcode(uint8_t xx)
	192	{
	193	_postcode(xx);
	194	#if POSTCODE_DELAY
	195	_postcode_delay(SPINCOUNT);
	196	#endif
	197	}
b0d623f7 A	198	inline static void
	199	postcode2(uint8_t xxxx)
	200	{
	201	_postcode2(xxxx);
	202	#if POSTCODE_DELAY
	203	_postcode_delay(SPINCOUNT);
	204	#endif
	205	}
91447636	206	#else
2d21ac55	207	#define postcode(xx) do {} while(0)
b0d623f7	208	#define postcode2(xxxx) do {} while(0)
91447636 A	209	#endif
	210	#endif
	211
	212	#endif /* _I386_POSTCODE_H_ */