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91447636 1/*
e2fac8b1 2 * Copyright (c) 2000-2009 Apple Inc. All rights reserved.
91447636 3 *
2d21ac55 4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
91447636 5 *
2d21ac55
A
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
8f6c56a5 14 *
2d21ac55
A
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
8f6c56a5
A
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
2d21ac55
A
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
8f6c56a5 25 *
2d21ac55 26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
91447636
A
27 */
28
b0d623f7
A
29#include <i386/pmap.h>
30#include <i386/proc_reg.h>
31#include <i386/mp_desc.h>
91447636 32#include <i386/misc_protos.h>
b0d623f7 33#include <i386/mp.h>
2d21ac55 34#include <i386/cpu_data.h>
6d2010ae 35#if CONFIG_MTRR
91447636 36#include <i386/mtrr.h>
6d2010ae 37#endif
b0d623f7 38#if CONFIG_VMX
2d21ac55 39#include <i386/vmx/vmx_cpu.h>
b0d623f7 40#endif
6d2010ae 41#include <i386/ucode.h>
91447636 42#include <i386/acpi.h>
0c530ab8 43#include <i386/fpu.h>
593a1d5f 44#include <i386/lapic.h>
91447636 45#include <i386/mp.h>
0c530ab8 46#include <i386/mp_desc.h>
2d21ac55 47#include <i386/serial_io.h>
b0d623f7 48#if CONFIG_MCA
0c530ab8 49#include <i386/machine_check.h>
b0d623f7 50#endif
593a1d5f 51#include <i386/pmCPU.h>
91447636 52
0b4c1975
A
53#include <i386/tsc.h>
54
91447636 55#include <kern/cpu_data.h>
2d21ac55 56#include <console/serial_protos.h>
6d2010ae 57#include <machine/pal_routines.h>
0b4c1975 58#include <vm/vm_page.h>
3a60a9f5 59
2d21ac55 60#if HIBERNATION
3a60a9f5 61#include <IOKit/IOHibernatePrivate.h>
2d21ac55 62#endif
91447636
A
63#include <IOKit/IOPlatformExpert.h>
64
0b4c1975
A
65#include <sys/kdebug.h>
66
b0d623f7 67#if CONFIG_SLEEP
91447636 68extern void acpi_sleep_cpu(acpi_sleep_callback, void * refcon);
b0d623f7
A
69extern void acpi_wake_prot(void);
70#endif
91447636 71
0c530ab8
A
72extern void fpinit(void);
73
91447636
A
74vm_offset_t
75acpi_install_wake_handler(void)
76{
b0d623f7
A
77#if CONFIG_SLEEP
78 install_real_mode_bootstrap(acpi_wake_prot);
79 return REAL_MODE_BOOTSTRAP_OFFSET;
80#else
81 return 0;
82#endif
91447636
A
83}
84
2d21ac55
A
85#if HIBERNATION
86struct acpi_hibernate_callback_data {
87 acpi_sleep_callback func;
88 void *refcon;
89};
90typedef struct acpi_hibernate_callback_data acpi_hibernate_callback_data_t;
91447636 91
0b4c1975
A
92unsigned int save_kdebug_enable = 0;
93static uint64_t acpi_sleep_abstime;
94
95
b0d623f7 96#if CONFIG_SLEEP
91447636 97static void
3a60a9f5 98acpi_hibernate(void *refcon)
91447636 99{
2d21ac55 100 uint32_t mode;
3a60a9f5 101
2d21ac55
A
102 acpi_hibernate_callback_data_t *data =
103 (acpi_hibernate_callback_data_t *)refcon;
91447636 104
2d21ac55 105 if (current_cpu_datap()->cpu_hibernate)
0c530ab8 106 {
b0d623f7 107#if defined(__i386__)
2d21ac55 108 cpu_IA32e_enable(current_cpu_datap());
b0d623f7 109#endif
2d21ac55
A
110 mode = hibernate_write_image();
111
112 if( mode == kIOHibernatePostWriteHalt )
113 {
114 // off
115 HIBLOG("power off\n");
116 if (PE_halt_restart) (*PE_halt_restart)(kPEHaltCPU);
117 }
118 else if( mode == kIOHibernatePostWriteRestart )
119 {
120 // restart
121 HIBLOG("restart\n");
122 if (PE_halt_restart) (*PE_halt_restart)(kPERestartCPU);
123 }
124 else
125 {
126 // sleep
127 HIBLOG("sleep\n");
128
129 // should we come back via regular wake, set the state in memory.
130 cpu_datap(0)->cpu_hibernate = 0;
131 }
132
b0d623f7 133#if defined(__i386__)
2d21ac55
A
134 /*
135 * If we're in 64-bit mode, drop back into legacy mode during sleep.
136 */
137 cpu_IA32e_disable(current_cpu_datap());
b0d623f7 138#endif
0c530ab8 139 }
0b4c1975
A
140 kdebug_enable = 0;
141
142 acpi_sleep_abstime = mach_absolute_time();
91447636 143
2d21ac55 144 (data->func)(data->refcon);
91447636 145
2d21ac55 146 /* should never get here! */
91447636 147}
b0d623f7
A
148#endif /* CONFIG_SLEEP */
149#endif /* HIBERNATION */
91447636 150
6d2010ae
A
151extern void slave_pstart(void);
152
0c530ab8 153
91447636
A
154void
155acpi_sleep_kernel(acpi_sleep_callback func, void *refcon)
156{
2d21ac55
A
157#if HIBERNATION
158 acpi_hibernate_callback_data_t data;
2d21ac55 159#endif
b0d623f7 160 boolean_t did_hibernate;
e2fac8b1
A
161 unsigned int cpu;
162 kern_return_t rc;
163 unsigned int my_cpu;
0b4c1975
A
164 uint64_t now;
165 uint64_t my_tsc;
166 uint64_t my_abs;
91447636 167
6d2010ae
A
168 kprintf("acpi_sleep_kernel hib=%d, cpu=%d\n",
169 current_cpu_datap()->cpu_hibernate, cpu_number());
0c530ab8 170
b0d623f7
A
171 /* Get all CPUs to be in the "off" state */
172 my_cpu = cpu_number();
e2fac8b1
A
173 for (cpu = 0; cpu < real_ncpus; cpu += 1) {
174 if (cpu == my_cpu)
175 continue;
176 rc = pmCPUExitHaltToOff(cpu);
177 if (rc != KERN_SUCCESS)
b0d623f7
A
178 panic("Error %d trying to transition CPU %d to OFF",
179 rc, cpu);
e2fac8b1
A
180 }
181
6d2010ae 182 /* shutdown local APIC before passing control to firmware */
2d21ac55 183 lapic_shutdown();
91447636 184
2d21ac55
A
185#if HIBERNATION
186 data.func = func;
187 data.refcon = refcon;
188#endif
91447636 189
593a1d5f
A
190 /* Save power management timer state */
191 pmTimerSave();
0c530ab8 192
b0d623f7 193#if CONFIG_VMX
2d21ac55
A
194 /*
195 * Turn off VT, otherwise switching to legacy mode will fail
196 */
197 vmx_suspend();
b0d623f7 198#endif
2d21ac55 199
b0d623f7 200#if defined(__i386__)
2d21ac55
A
201 /*
202 * If we're in 64-bit mode, drop back into legacy mode during sleep.
203 */
0c530ab8 204 cpu_IA32e_disable(current_cpu_datap());
b0d623f7 205#endif
060df5ea
A
206 /*
207 * Enable FPU/SIMD unit for potential hibernate acceleration
208 */
209 clear_ts();
210
0b4c1975
A
211 KERNEL_DEBUG_CONSTANT(IOKDBG_CODE(DBG_HIBERNATE, 0) | DBG_FUNC_START, 0, 0, 0, 0, 0);
212
213 save_kdebug_enable = kdebug_enable;
214 kdebug_enable = 0;
0c530ab8
A
215
216 acpi_sleep_abstime = mach_absolute_time();
2d21ac55 217
b0d623f7 218#if CONFIG_SLEEP
2d21ac55
A
219 /*
220 * Save master CPU state and sleep platform.
221 * Will not return until platform is woken up,
222 * or if sleep failed.
223 */
b0d623f7
A
224#ifdef __x86_64__
225 uint64_t old_cr3 = x86_64_pre_sleep();
226#endif
2d21ac55
A
227#if HIBERNATION
228 acpi_sleep_cpu(acpi_hibernate, &data);
229#else
230 acpi_sleep_cpu(func, refcon);
231#endif
060df5ea 232
b0d623f7
A
233#ifdef __x86_64__
234 x86_64_post_sleep(old_cr3);
235#endif
236
237#endif /* CONFIG_SLEEP */
2d21ac55 238
4a3eedf9
A
239 /* Reset UART if kprintf is enabled.
240 * However kprintf should not be used before rtc_sleep_wakeup()
241 * for compatibility with firewire kprintf.
242 */
243
2d21ac55 244 if (FALSE == disable_serial_output)
6d2010ae 245 pal_serial_init();
2d21ac55
A
246
247#if HIBERNATION
248 if (current_cpu_datap()->cpu_hibernate) {
b0d623f7 249#if defined(__i386__)
2d21ac55
A
250 int i;
251 for (i = 0; i < PMAP_NWINDOWS; i++)
252 *current_cpu_datap()->cpu_pmap->mapwindow[i].prv_CMAP = 0;
b0d623f7 253#endif
2d21ac55
A
254 did_hibernate = TRUE;
255
256 } else
257#endif
258 {
259 did_hibernate = FALSE;
0c530ab8 260 }
3a60a9f5 261
2d21ac55
A
262 /* Re-enable mode (including 64-bit if applicable) */
263 cpu_mode_init(current_cpu_datap());
3a60a9f5 264
b0d623f7 265#if CONFIG_MCA
2d21ac55
A
266 /* Re-enable machine check handling */
267 mca_cpu_init();
b0d623f7 268#endif
91447636 269
6d2010ae 270#if CONFIG_MTRR
2d21ac55
A
271 /* restore MTRR settings */
272 mtrr_update_cpu();
6d2010ae
A
273#endif
274
275 /* update CPU microcode */
276 ucode_update_wake();
0c530ab8 277
b0d623f7 278#if CONFIG_VMX
2d21ac55
A
279 /*
280 * Restore VT mode
281 */
282 vmx_resume();
b0d623f7 283#endif
0c530ab8 284
6d2010ae 285#if CONFIG_MTRR
2d21ac55
A
286 /* set up PAT following boot processor power up */
287 pat_init();
6d2010ae 288#endif
91447636 289
593a1d5f
A
290 /*
291 * Go through all of the CPUs and mark them as requiring
292 * a full restart.
293 */
294 pmMarkAllCPUsOff();
295
0b4c1975
A
296 ml_get_timebase(&now);
297
060df5ea
A
298 /* re-enable and re-init local apic (prior to starting timers) */
299 if (lapic_probe())
300 lapic_configure();
301
0c530ab8
A
302 /* let the realtime clock reset */
303 rtc_sleep_wakeup(acpi_sleep_abstime);
91447636 304
0b4c1975
A
305 kdebug_enable = save_kdebug_enable;
306
307 if (did_hibernate) {
308
309 my_tsc = (now >> 32) | (now << 32);
310 my_abs = tmrCvt(my_tsc, tscFCvtt2n);
311
312 KERNEL_DEBUG_CONSTANT(IOKDBG_CODE(DBG_HIBERNATE, 2) | DBG_FUNC_START,
313 (uint32_t)(my_abs >> 32), (uint32_t)my_abs, 0, 0, 0);
2d21ac55 314 hibernate_machine_init();
0b4c1975
A
315 KERNEL_DEBUG_CONSTANT(IOKDBG_CODE(DBG_HIBERNATE, 2) | DBG_FUNC_END, 0, 0, 0, 0, 0);
316
b0d623f7 317 current_cpu_datap()->cpu_hibernate = 0;
0b4c1975
A
318
319 KERNEL_DEBUG_CONSTANT(IOKDBG_CODE(DBG_HIBERNATE, 0) | DBG_FUNC_END, 0, 0, 0, 0, 0);
320 } else
321 KERNEL_DEBUG_CONSTANT(IOKDBG_CODE(DBG_HIBERNATE, 0) | DBG_FUNC_END, 0, 0, 0, 0, 0);
322
593a1d5f
A
323 /* Restore power management register state */
324 pmCPUMarkRunning(current_cpu_datap());
91447636 325
593a1d5f
A
326 /* Restore power management timer state */
327 pmTimerRestore();
0c530ab8 328
060df5ea
A
329 /* Restart timer interrupts */
330 rtc_timer_start();
0c530ab8 331
060df5ea
A
332 /* Reconfigure FP/SIMD unit */
333 init_fpu();
2d21ac55
A
334
335#if HIBERNATION
b0d623f7
A
336#ifdef __i386__
337 /* The image is written out using the copy engine, which disables
338 * preemption. Since the copy engine writes out the page which contains
339 * the preemption variable when it is disabled, we need to explicitly
340 * enable it here */
2d21ac55
A
341 if (did_hibernate)
342 enable_preemption();
b0d623f7 343#endif
91447636 344
2d21ac55
A
345 kprintf("ret from acpi_sleep_cpu hib=%d\n", did_hibernate);
346#endif
b0d623f7
A
347
348#if CONFIG_SLEEP
349 /* Becase we don't save the bootstrap page, and we share it
350 * between sleep and mp slave init, we need to recreate it
351 * after coming back from sleep or hibernate */
352 install_real_mode_bootstrap(slave_pstart);
353#endif
91447636 354}
b0d623f7
A
355
356extern char real_mode_bootstrap_end[];
357extern char real_mode_bootstrap_base[];
358
359void
360install_real_mode_bootstrap(void *prot_entry)
361{
362 /*
363 * Copy the boot entry code to the real-mode vector area REAL_MODE_BOOTSTRAP_OFFSET.
364 * This is in page 1 which has been reserved for this purpose by
365 * machine_startup() from the boot processor.
366 * The slave boot code is responsible for switching to protected
367 * mode and then jumping to the common startup, _start().
368 */
369 bcopy_phys(kvtophys((vm_offset_t) real_mode_bootstrap_base),
370 (addr64_t) REAL_MODE_BOOTSTRAP_OFFSET,
371 real_mode_bootstrap_end-real_mode_bootstrap_base);
372
373 /*
374 * Set the location at the base of the stack to point to the
375 * common startup entry.
376 */
377 ml_phys_write_word(
378 PROT_MODE_START+REAL_MODE_BOOTSTRAP_OFFSET,
379 (unsigned int)kvtophys((vm_offset_t)prot_entry));
380
381 /* Flush caches */
382 __asm__("wbinvd");
383}
384