[apple/xnu.git] / osfmk / ppc / asm.h

/*
 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
 *
 * @APPLE_LICENSE_HEADER_START@
 * 
 * The contents of this file constitute Original Code as defined in and
 * are subject to the Apple Public Source License Version 1.1 (the
 * "License").  You may not use this file except in compliance with the
 * License.  Please obtain a copy of the License at
 * http://www.apple.com/publicsource and read it before using this file.
 * 
 * This Original Code and all software distributed under the License are
 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
 * License for the specific language governing rights and limitations
 * under the License.
 * 
 * @APPLE_LICENSE_HEADER_END@
 */
/*
 * @OSF_COPYRIGHT@
 */
#ifndef	_PPC_ASM_H_
#define	_PPC_ASM_H_

#define	__ASMNL__	@
#define STRINGD .ascii

#ifdef ASSEMBLER


#define br0 0

#define ARG0 r3
#define ARG1 r4
#define ARG2 r5
#define ARG3 r6
#define ARG4 r7
#define ARG5 r8
#define ARG6 r9
#define ARG7 r10

#define tmp0	r0	/* Temporary GPR remapping (603e specific) */
#define tmp1	r1
#define tmp2	r2
#define tmp3	r3

/* SPR registers */

#define mq		0		/* MQ register for 601 emulation */
#define rtcu	4		/* RTCU - upper word of RTC for 601 emulation */
#define rtcl	5		/* RTCL - lower word of RTC for 601 emulation */
#define dsisr	18
#define ppcDAR	19
#define ppcdar	19
#define dar		19
#define SDR1	25
#define sdr1	25
#define srr0	26
#define srr1	27
#define vrsave	256		/* Vector Register save */
#define sprg0	272
#define sprg1	273
#define sprg2	274
#define sprg3	275
#define pvr		287

#define IBAT0U	528
#define IBAT0L	529
#define IBAT1U	530
#define IBAT1L	531
#define IBAT2U	532
#define IBAT2L	533
#define IBAT3U	534
#define IBAT3L	535
#define ibat0u	528
#define ibat0l	529
#define ibat1u	530
#define ibat1l	531
#define ibat2u	532
#define ibat2l	533
#define ibat3u	534
#define ibat3l	535

#define DBAT0U	536
#define DBAT0L	537
#define DBAT1U	538
#define DBAT1L	539
#define DBAT2U	540
#define DBAT2L	541
#define DBAT3U	542
#define DBAT3L	543
#define dbat0u	536
#define dbat0l	537
#define dbat1u	538
#define dbat1l	539
#define dbat2u	540
#define dbat2l	541
#define dbat3u	542
#define dbat3l	543

#define ummcr2	928		/* Performance monitor control */
#define ubamr	935		/* Performance monitor mask */
#define ummcr0	936		/* Performance monitor control */
#define upmc1	937		/* Performance monitor counter */
#define upmc2	938		/* Performance monitor counter */
#define usia	939		/* User sampled instruction address */
#define ummcr1	940		/* Performance monitor control */
#define upmc3	941		/* Performance monitor counter */
#define upmc4	942		/* Performance monitor counter */
#define usda	943		/* User sampled data address */
#define mmcr2	944		/* Performance monitor control */
#define bamr	951		/* Performance monitor mask */
#define mmcr0	952
#define pmc1	953
#define	pmc2	954
#define	sia		955
#define	mmcr1	956
#define	pmc3	957
#define	pmc4	958
#define	sda		959		/* Sampled data address */
#define dmiss	976		/* ea that missed */
#define dcmp	977		/* compare value for the va that missed */
#define hash1	978		/* pointer to first hash pteg */
#define	hash2	979		/* pointer to second hash pteg */
#define imiss	980		/* ea that missed */
#define tlbmiss	980		/* ea that missed */
#define icmp	981		/* compare value for the va that missed */
#define ptehi	981		/* compare value for the va that missed */
#define rpa		982		/* required physical address register */
#define ptelo	982		/* required physical address register */
#define l3pdet	984		/* l3pdet */

#define HID0	1008	/* Checkstop and misc enables */
#define hid0	1008	/* Checkstop and misc enables */
#define HID1	1009	/* Clock configuration */
#define hid1	1009	/* Clock configuration */
#define iabr	1010	/* Instruction address breakpoint register */
#define ictrl	1011	/* Instruction Cache Control */
#define ldstdb	1012	/* Load/Store Debug */
#define dabr	1013	/* Data address breakpoint register */
#define msscr0	1014	/* Memory subsystem control */
#define msscr1	1015	/* Memory subsystem debug */
#define msssr0	1015	/* Memory Subsystem Status */
#define ldstcr	1016	/* Load/Store Status/Control */
#define l2cr2	1016	/* L2 Cache control 2 */
#define l2cr	1017	/* L2 Cache control */
#define l3cr	1018	/* L3 Cache control */
#define ictc	1019	/* I-cache throttling control */
#define thrm1	1020	/* Thermal management 1 */
#define thrm2	1021	/* Thermal management 2 */
#define thrm3	1022	/* Thermal management 3 */
#define pir		1023	/* Processor ID Register */

;	hid0 bits
#define emcp	0
#define emcpm	0x80000000
#define dbp		1
#define dbpm	0x40000000
#define eba		2
#define ebam	0x20000000
#define ebd		3
#define ebdm	0x10000000
#define sbclk	4
#define sbclkm	0x08000000
#define eclk	6
#define eclkm	0x02000000
#define par		7
#define parm	0x01000000
#define sten	7
#define stenm	0x01000000
#define doze	8
#define dozem	0x00800000
#define nap		9
#define napm	0x00400000
#define sleep	10
#define sleepm	0x00200000
#define dpm		11
#define dpmm	0x00100000
#define riseg	12
#define risegm	0x00080000
#define eiec	13
#define eiecm	0x00040000
#define nhr		15
#define nhrm	0x00010000
#define ice		16
#define icem	0x00008000
#define dce		17
#define dcem	0x00004000
#define ilock	18
#define ilockm	0x00002000
#define dlock	19
#define dlockm	0x00001000
#define icfi	20
#define icfim	0x00000800
#define dcfi	21
#define dcfim	0x00000400
#define spd		22
#define spdm	0x00000200
#define sge		24
#define sgem	0x00000080
#define dcfa	25
#define dcfam	0x00000040
#define btic	26
#define bticm	0x00000020
#define lrstk	27
#define lrstkm	0x00000010
#define abe		28
#define abem	0x00000008
#define fold	28
#define foldm	0x00000008
#define bht		29
#define bhtm	0x00000004
#define nopdst	30
#define nopdstm	0x00000002
#define nopti	31
#define noptim	0x00000001

;	msscr0 bits
#define shden	0
#define shdenm	0x80000000
#define shden3	1
#define shdenm3	0x40000000
#define l1intvs	2	
#define l1intve	4	
#define l1intvb	0x38000000	
#define l2intvs	5	
#define l2intve	7	
#define l2intvb	0x07000000	
#define dl1hwf	8
#define dl1hwfm	0x00800000
#define dbsiz	9
#define dbsizm	0x00400000
#define emode	10
#define emodem	0x00200000
#define abgd	11
#define abgdm	0x00100000
#define tfsts	24
#define tfste	25
#define tfstm	0x000000C0
#define	l2pfes	30
#define	l2pfee	31
#define	l2pfem	0x00000003

;	msscr1 bits
#define cqd		15
#define cqdm	0x00010000
#define csqs	1
#define csqe	2
#define csqm	0x60000000

;	msssr1 bits - 7450
#define vgL2PARA	0
#define vgL3PARA	1
#define vgL2COQEL	2
#define vgL3COQEL	3
#define vgL2CTR		4
#define vgL3CTR		5
#define vgL2COQR	6
#define vgL3COQR	7
#define vgLMQ		8
#define vgSMC		9
#define vgSNP		10
#define vgBIU		11
#define vgSMCE		12
#define vgL2TAG		13
#define vgL2DAT		14
#define vgL3TAG		15
#define vgL3DAT		16
#define vgAPE		17
#define vgDPE		18
#define vgTEA		19

;	srr1 bits
#define icmck	1
#define icmckm	0x40000000
#define dcmck	2
#define dcmckm	0x20000000
#define l2mck	3
#define l2mckm	0x10000000
#define tlbmck	4
#define tlbmckm	0x08000000
#define brmck	5
#define brmckm	0x04000000
#define othmck	10
#define othmckm	0x00200000
#define l2dpmck	11
#define l2dpmckm	0x00100000
#define mcpmck	12
#define mcpmckm	0x00080000
#define teamck	13
#define teamckm	0x00040000
#define dpmck	14
#define dpmckm	0x00020000
#define apmck	15
#define apmckm	0x00010000

;	L2 cache control
#define l2e		0
#define l2em	0x80000000
#define l2pe	1
#define l2pem	0x40000000
#define l2siz	2
#define l2sizf	3
#define l2sizm	0x30000000
#define l2clk	4
#define l2clkf	6
#define l2clkm	0x0E000000
#define l2ram	7
#define l2ramf	8
#define l2ramm	0x01800000
#define l2do	9
#define l2dom	0x00400000
#define l2i		10
#define l2im	0x00200000
#define l2ctl	11
#define l2ctlm	0x00100000
#define l2ionly	11
#define l2ionlym	0x00100000
#define l2wt	12
#define l2wtm	0x00080000
#define l2ts	13
#define l2tsm	0x00040000
#define l2oh	14
#define l2ohf	15
#define l2ohm	0x00030000
#define l2donly	15
#define l2donlym	0x00010000
#define l2sl	16
#define l2slm	0x00008000
#define l2df	17
#define l2dfm	0x00004000
#define l2byp	18
#define l2bypm	0x00002000
#define l2fa	19
#define l2fam	0x00001000
#define l2hwf	20
#define l2hwfm	0x00000800
#define l2io	21
#define l2iom	0x00000400
#define l2clkstp	22
#define	l2clkstpm	0x00000200
#define l2dro	23
#define l2drom	0x00000100 
#define l2ctr	24
#define l2ctrf	30
#define l2ctrm	0x000000FE
#define	l2ip	31
#define l2ipm	0x00000001

;	L3 cache control
#define l3e		0
#define l3em	0x80000000
#define l3pe	1
#define l3pem	0x40000000
#define l3siz	3
#define l3sizm	0x10000000
#define l3clken	4
#define l3clkenm	0x08000000
#define l3dx	5
#define l3dxm	0x04000000
#define l3clk	6
#define l3clkf	8
#define l3clkm	0x03800000
#define l3io	9
#define l3iom	0x00400000
#define l3spo	13
#define l3spom	0x00040000
#define l3cksp	14
#define l3ckspf	15
#define l3ckspm	0x00030000
#define l3psp	16
#define l3pspf	18
#define l3pspm	0x0000E000
#define l3rep	19
#define l3repm	0x00001000
#define l3hwf	20
#define l3hwfm	0x00000800
#define l3i		21
#define l3im	0x00000400
#define l3rt	22
#define l3rtf	23
#define	l3rtm	0x00000300
#define l3dro	23
#define l3drom	0x00000100 
#define l3cya	24
#define l3cyam	0x00000080
#define l3donly	25
#define l3donlym	0x00000040
#define l3dmem	29
#define l3dmemm	0x00000004
#define l3dmsiz	31
#define l3dmsizm	0x00000001

#define	thrmtin		0
#define	thrmtinm	0x80000000
#define	thrmtiv		1
#define thrmtivm	0x40000000
#define thrmthrs	2
#define thrmthre	8
#define thrmthrm	0x3F800000
#define thrmtid		29
#define thrmtidm	0x00000004
#define thrmtie		30
#define thrmtiem	0x00000002
#define thrmv		31
#define thrmvm		0x00000001

#define thrmsitvs	15
#define thrmsitve	30
#define thrmsitvm	0x0001FFFE
#define thrme		31
#define thrmem		0x00000001

#define ictcfib		23
#define ictcfie		30
#define ictcfim		0x000001FE
#define ictce		31
#define ictcem		0x00000001

#define cr0_lt	0
#define cr0_gt	1
#define cr0_eq	2
#define cr0_so	3
#define cr0_un	3
#define cr1_lt	4
#define cr1_gt	5
#define cr1_eq	6
#define cr1_so	7
#define cr1_un	7
#define cr2_lt	8
#define cr2_gt	9
#define cr2_eq	10
#define cr2_so	11
#define cr2_un	11
#define cr3_lt	12
#define cr3_gt	13
#define cr3_eq	14
#define cr3_so	15
#define cr3_un	15
#define cr4_lt	16
#define cr4_gt	17
#define cr4_eq	18
#define cr4_so	19
#define cr4_un	19
#define cr5_lt	20
#define cr5_gt	21
#define cr5_eq	22
#define cr5_so	23
#define cr5_un	23
#define cr6_lt	24
#define cr6_gt	25
#define cr6_eq	26
#define cr6_so	27
#define cr6_un	27
#define cr7_lt	28
#define cr7_gt	29
#define cr7_eq	30
#define cr7_so	31
#define cr7_un	31

/*
 * Macros to access high and low word values of an address
 */

#define	HIGH_CADDR(x)	ha16(x)
#define	HIGH_ADDR(x)	hi16(x)
#define	LOW_ADDR(x)	lo16(x)

#endif	/* ASSEMBLER */

/* Tags are placed before Immediately Following Code (IFC) for the debugger
 * to be able to deduce where to find various registers when backtracing
 * 
 * We only define the values as we use them, see SVR4 ABI PowerPc Supplement
 * for more details (defined in ELF spec).
 */

#define TAG_NO_FRAME_USED 0x00000000

/* (should use genassym to get these offsets) */

#define FM_BACKPTR 0
#define	FM_CR_SAVE 4
#define FM_LR_SAVE 8 /* MacOSX is NOT following the ABI at the moment.. */
#define FM_SIZE    64   /* minimum frame contents, backptr and LR save. Make sure it is quadaligned */
#define FM_ARG0	   56
#define FM_ALIGN(l) ((l+15)&-16)
#define	PK_SYSCALL_BEGIN	0x7000


/* redzone is the area under the stack pointer which must be preserved
 * when taking a trap, interrupt etc.
 */
#define FM_REDZONE 224				/* is ((32-14+1)*4) */

#define COPYIN_ARG0_OFFSET FM_ARG0

#ifdef	MACH_KERNEL
#include <mach_kdb.h>
#else	/* MACH_KERNEL */
#define MACH_KDB 0
#endif	/* MACH_KERNEL */

#define BREAKPOINT_TRAP tw	4,r4,r4

/* There is another definition of ALIGN for .c sources */
#ifndef __LANGUAGE_ASSEMBLY
#define ALIGN 4
#endif /* __LANGUAGE_ASSEMBLY */

#ifndef FALIGN
#define FALIGN 4 /* Align functions on words for now. Cachelines is better */
#endif

#define LB(x,n) n
#if	__STDC__
#define	LCL(x)	L ## x
#define EXT(x) _ ## x
#define LEXT(x) _ ## x ## :
#define LBc(x,n) n ## :
#define LBb(x,n) n ## b
#define LBf(x,n) n ## f
#else /* __STDC__ */
#define LCL(x) L/**/x
#define EXT(x) _/**/x
#define LEXT(x) _/**/x/**/:
#define LBc(x,n) n/**/:
#define LBb(x,n) n/**/b
#define LBf(x,n) n/**/f
#endif /* __STDC__ */

#define String	.asciz
#define Value	.word
#define Times(a,b) (a*b)
#define Divide(a,b) (a/b)

#define data16	.byte 0x66
#define addr16	.byte 0x67

#if !GPROF
#define MCOUNT
#endif /* GPROF */

#define ELF_FUNC(x)
#define ELF_DATA(x)
#define ELF_SIZE(x,s)

#define	Entry(x,tag)	.text@.align FALIGN@ .globl EXT(x)@ LEXT(x)
#define	ENTRY(x,tag)	Entry(x,tag)@MCOUNT
#define	ENTRY2(x,y,tag)	.text@ .align FALIGN@ .globl EXT(x)@ .globl EXT(y)@ \
			LEXT(x)@ LEXT(y) @\
			MCOUNT
#if __STDC__
#define	ASENTRY(x) 	.globl x @ .align FALIGN; x ## @ MCOUNT
#else
#define	ASENTRY(x) 	.globl x @ .align FALIGN; x @ MCOUNT
#endif /* __STDC__ */
#define	DATA(x)		.globl EXT(x) @ .align ALIGN @ LEXT(x)


#define End(x)		ELF_SIZE(x,.-x)
#define END(x)		End(EXT(x))
#define ENDDATA(x)	END(x)
#define Enddata(x)	End(x)

/* These defines are here for .c files that wish to reference global symbols
 * within __asm__ statements. 
 */
#define CC_SYM_PREFIX "_"

#endif /* _PPC_ASM_H_ */
Commit	Line	Data
1c79356b A	1	/*
	2	* Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
	3	*
	4	* @APPLE_LICENSE_HEADER_START@
	5	*
	6	* The contents of this file constitute Original Code as defined in and
	7	* are subject to the Apple Public Source License Version 1.1 (the
	8	* "License"). You may not use this file except in compliance with the
	9	* License. Please obtain a copy of the License at
	10	* http://www.apple.com/publicsource and read it before using this file.
	11	*
	12	* This Original Code and all software distributed under the License are
	13	* distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
	14	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
	15	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
	17	* License for the specific language governing rights and limitations
	18	* under the License.
	19	*
	20	* @APPLE_LICENSE_HEADER_END@
	21	*/
	22	/*
	23	* @OSF_COPYRIGHT@
	24	*/
	25	#ifndef _PPC_ASM_H_
	26	#define _PPC_ASM_H_
	27
	28	#define __ASMNL__ @
	29	#define STRINGD .ascii
	30
	31	#ifdef ASSEMBLER
	32
	33
	34	#define br0 0
	35
	36	#define ARG0 r3
	37	#define ARG1 r4
	38	#define ARG2 r5
	39	#define ARG3 r6
	40	#define ARG4 r7
	41	#define ARG5 r8
	42	#define ARG6 r9
	43	#define ARG7 r10
	44
	45	#define tmp0 r0 /* Temporary GPR remapping (603e specific) */
	46	#define tmp1 r1
	47	#define tmp2 r2
	48	#define tmp3 r3
	49
	50	/* SPR registers */
	51
	52	#define mq 0 /* MQ register for 601 emulation */
	53	#define rtcu 4 /* RTCU - upper word of RTC for 601 emulation */
	54	#define rtcl 5 /* RTCL - lower word of RTC for 601 emulation */
	55	#define dsisr 18
	56	#define ppcDAR 19
	57	#define ppcdar 19
	58	#define dar 19
	59	#define SDR1 25
	60	#define sdr1 25
	61	#define srr0 26
	62	#define srr1 27
	63	#define vrsave 256 /* Vector Register save */
	64	#define sprg0 272
65	#define sprg1 273
66	#define sprg2 274
67	#define sprg3 275
68	#define pvr 287
69
70	#define IBAT0U 528
71	#define IBAT0L 529
72	#define IBAT1U 530
73	#define IBAT1L 531
74	#define IBAT2U 532
75	#define IBAT2L 533
76	#define IBAT3U 534
77	#define IBAT3L 535
78	#define ibat0u 528
79	#define ibat0l 529
80	#define ibat1u 530
81	#define ibat1l 531
82	#define ibat2u 532
83	#define ibat2l 533
84	#define ibat3u 534
85	#define ibat3l 535
86
87	#define DBAT0U 536
88	#define DBAT0L 537
89	#define DBAT1U 538
90	#define DBAT1L 539
91	#define DBAT2U 540
92	#define DBAT2L 541
93	#define DBAT3U 542
94	#define DBAT3L 543
95	#define dbat0u 536
96	#define dbat0l 537
97	#define dbat1u 538
98	#define dbat1l 539
99	#define dbat2u 540
100	#define dbat2l 541
101	#define dbat3u 542
102	#define dbat3l 543
103
104	#define ummcr2 928 /* Performance monitor control */
105	#define ubamr 935 /* Performance monitor mask */
106	#define ummcr0 936 /* Performance monitor control */
107	#define upmc1 937 /* Performance monitor counter */
108	#define upmc2 938 /* Performance monitor counter */
109	#define usia 939 /* User sampled instruction address */
110	#define ummcr1 940 /* Performance monitor control */
111	#define upmc3 941 /* Performance monitor counter */
112	#define upmc4 942 /* Performance monitor counter */
113	#define usda 943 /* User sampled data address */
114	#define mmcr2 944 /* Performance monitor control */
115	#define bamr 951 /* Performance monitor mask */
116	#define mmcr0 952
117	#define pmc1 953
118	#define pmc2 954
119	#define sia 955
120	#define mmcr1 956
121	#define pmc3 957
122	#define pmc4 958
123	#define sda 959 /* Sampled data address */
124	#define dmiss 976 /* ea that missed */
125	#define dcmp 977 /* compare value for the va that missed */
126	#define hash1 978 /* pointer to first hash pteg */
127	#define hash2 979 /* pointer to second hash pteg */
128	#define imiss 980 /* ea that missed */
129	#define tlbmiss 980 /* ea that missed */
130	#define icmp 981 /* compare value for the va that missed */
131	#define ptehi 981 /* compare value for the va that missed */
132	#define rpa 982 /* required physical address register */
133	#define ptelo 982 /* required physical address register */
134	#define l3pdet 984 /* l3pdet */
135
136	#define HID0 1008 /* Checkstop and misc enables */
137	#define hid0 1008 /* Checkstop and misc enables */
138	#define HID1 1009 /* Clock configuration */
139	#define hid1 1009 /* Clock configuration */
140	#define iabr 1010 /* Instruction address breakpoint register */
141	#define ictrl 1011 /* Instruction Cache Control */
0b4e3aa0	142	#define ldstdb 1012 /* Load/Store Debug */
1c79356b A	143	#define dabr 1013 /* Data address breakpoint register */
	144	#define msscr0 1014 /* Memory subsystem control */
	145	#define msscr1 1015 /* Memory subsystem debug */
	146	#define msssr0 1015 /* Memory Subsystem Status */
	147	#define ldstcr 1016 /* Load/Store Status/Control */
	148	#define l2cr2 1016 /* L2 Cache control 2 */
	149	#define l2cr 1017 /* L2 Cache control */
	150	#define l3cr 1018 /* L3 Cache control */
	151	#define ictc 1019 /* I-cache throttling control */
	152	#define thrm1 1020 /* Thermal management 1 */
	153	#define thrm2 1021 /* Thermal management 2 */
	154	#define thrm3 1022 /* Thermal management 3 */
	155	#define pir 1023 /* Processor ID Register */
	156
	157	; hid0 bits
	158	#define emcp 0
	159	#define emcpm 0x80000000
	160	#define dbp 1
	161	#define dbpm 0x40000000
	162	#define eba 2
	163	#define ebam 0x20000000
	164	#define ebd 3
	165	#define ebdm 0x10000000
	166	#define sbclk 4
	167	#define sbclkm 0x08000000
	168	#define eclk 6
	169	#define eclkm 0x02000000
	170	#define par 7
	171	#define parm 0x01000000
	172	#define sten 7
	173	#define stenm 0x01000000
	174	#define doze 8
	175	#define dozem 0x00800000
	176	#define nap 9
	177	#define napm 0x00400000
	178	#define sleep 10
	179	#define sleepm 0x00200000
	180	#define dpm 11
	181	#define dpmm 0x00100000
	182	#define riseg 12
	183	#define risegm 0x00080000
	184	#define eiec 13
	185	#define eiecm 0x00040000
	186	#define nhr 15
	187	#define nhrm 0x00010000
	188	#define ice 16
	189	#define icem 0x00008000
	190	#define dce 17
	191	#define dcem 0x00004000
	192	#define ilock 18
	193	#define ilockm 0x00002000
	194	#define dlock 19
	195	#define dlockm 0x00001000
	196	#define icfi 20
	197	#define icfim 0x00000800
	198	#define dcfi 21
	199	#define dcfim 0x00000400
	200	#define spd 22
	201	#define spdm 0x00000200
	202	#define sge 24
	203	#define sgem 0x00000080
	204	#define dcfa 25
	205	#define dcfam 0x00000040
	206	#define btic 26
207	#define bticm 0x00000020
208	#define lrstk 27
209	#define lrstkm 0x00000010
210	#define abe 28
211	#define abem 0x00000008
212	#define fold 28
213	#define foldm 0x00000008
214	#define bht 29
215	#define bhtm 0x00000004
216	#define nopdst 30
217	#define nopdstm 0x00000002
218	#define nopti 31
219	#define noptim 0x00000001
220
221	; msscr0 bits
222	#define shden 0
223	#define shdenm 0x80000000
224	#define shden3 1
225	#define shdenm3 0x40000000
226	#define l1intvs 2
227	#define l1intve 4
228	#define l1intvb 0x38000000
229	#define l2intvs 5
230	#define l2intve 7
231	#define l2intvb 0x07000000
232	#define dl1hwf 8
233	#define dl1hwfm 0x00800000
234	#define dbsiz 9
235	#define dbsizm 0x00400000
236	#define emode 10
237	#define emodem 0x00200000
238	#define abgd 11
239	#define abgdm 0x00100000
240	#define tfsts 24
241	#define tfste 25
242	#define tfstm 0x000000C0
0b4e3aa0 A	243	#define l2pfes 30
	244	#define l2pfee 31
	245	#define l2pfem 0x00000003
1c79356b A	246
	247	; msscr1 bits
	248	#define cqd 15
	249	#define cqdm 0x00010000
	250	#define csqs 1
	251	#define csqe 2
	252	#define csqm 0x60000000
	253
	254	; msssr1 bits - 7450
	255	#define vgL2PARA 0
	256	#define vgL3PARA 1
	257	#define vgL2COQEL 2
	258	#define vgL3COQEL 3
	259	#define vgL2CTR 4
	260	#define vgL3CTR 5
	261	#define vgL2COQR 6
	262	#define vgL3COQR 7
	263	#define vgLMQ 8
	264	#define vgSMC 9
	265	#define vgSNP 10
	266	#define vgBIU 11
	267	#define vgSMCE 12
	268	#define vgL2TAG 13
	269	#define vgL2DAT 14
	270	#define vgL3TAG 15
	271	#define vgL3DAT 16
	272	#define vgAPE 17
	273	#define vgDPE 18
	274	#define vgTEA 19
	275
	276	; srr1 bits
	277	#define icmck 1
	278	#define icmckm 0x40000000
	279	#define dcmck 2
	280	#define dcmckm 0x20000000
	281	#define l2mck 3
	282	#define l2mckm 0x10000000
	283	#define tlbmck 4
	284	#define tlbmckm 0x08000000
	285	#define brmck 5
	286	#define brmckm 0x04000000
	287	#define othmck 10
	288	#define othmckm 0x00200000
	289	#define l2dpmck 11
	290	#define l2dpmckm 0x00100000
	291	#define mcpmck 12
	292	#define mcpmckm 0x00080000
	293	#define teamck 13
	294	#define teamckm 0x00040000
	295	#define dpmck 14
	296	#define dpmckm 0x00020000
	297	#define apmck 15
	298	#define apmckm 0x00010000
	299
	300	; L2 cache control
	301	#define l2e 0
	302	#define l2em 0x80000000
	303	#define l2pe 1
	304	#define l2pem 0x40000000
	305	#define l2siz 2
	306	#define l2sizf 3
	307	#define l2sizm 0x30000000
	308	#define l2clk 4
	309	#define l2clkf 6
310	#define l2clkm 0x0E000000
311	#define l2ram 7
312	#define l2ramf 8
313	#define l2ramm 0x01800000
314	#define l2do 9
315	#define l2dom 0x00400000
316	#define l2i 10
317	#define l2im 0x00200000
318	#define l2ctl 11
319	#define l2ctlm 0x00100000
320	#define l2ionly 11
321	#define l2ionlym 0x00100000
322	#define l2wt 12
323	#define l2wtm 0x00080000
324	#define l2ts 13
325	#define l2tsm 0x00040000
326	#define l2oh 14
327	#define l2ohf 15
328	#define l2ohm 0x00030000
329	#define l2donly 15
330	#define l2donlym 0x00010000
331	#define l2sl 16
332	#define l2slm 0x00008000
333	#define l2df 17
334	#define l2dfm 0x00004000
335	#define l2byp 18
336	#define l2bypm 0x00002000
337	#define l2fa 19
338	#define l2fam 0x00001000
339	#define l2hwf 20
340	#define l2hwfm 0x00000800
341	#define l2io 21
342	#define l2iom 0x00000400
343	#define l2clkstp 22
344	#define l2clkstpm 0x00000200
345	#define l2dro 23
346	#define l2drom 0x00000100
347	#define l2ctr 24
348	#define l2ctrf 30
349	#define l2ctrm 0x000000FE
350	#define l2ip 31
351	#define l2ipm 0x00000001
352
353	; L3 cache control
354	#define l3e 0
355	#define l3em 0x80000000
356	#define l3pe 1
357	#define l3pem 0x40000000
358	#define l3siz 3
359	#define l3sizm 0x10000000
360	#define l3clken 4
361	#define l3clkenm 0x08000000
362	#define l3dx 5
363	#define l3dxm 0x04000000
364	#define l3clk 6
365	#define l3clkf 8
366	#define l3clkm 0x03800000
367	#define l3io 9
368	#define l3iom 0x00400000
369	#define l3spo 13
370	#define l3spom 0x00040000
371	#define l3cksp 14
372	#define l3ckspf 15
373	#define l3ckspm 0x00030000
374	#define l3psp 16
375	#define l3pspf 18
376	#define l3pspm 0x0000E000
377	#define l3rep 19
378	#define l3repm 0x00001000
379	#define l3hwf 20
380	#define l3hwfm 0x00000800
381	#define l3i 21
382	#define l3im 0x00000400
383	#define l3rt 22
384	#define l3rtf 23
385	#define l3rtm 0x00000300
386	#define l3dro 23
387	#define l3drom 0x00000100
388	#define l3cya 24
389	#define l3cyam 0x00000080
390	#define l3donly 25
391	#define l3donlym 0x00000040
392	#define l3dmem 29
393	#define l3dmemm 0x00000004
394	#define l3dmsiz 31
395	#define l3dmsizm 0x00000001
396
397	#define thrmtin 0
398	#define thrmtinm 0x80000000
399	#define thrmtiv 1
400	#define thrmtivm 0x40000000
401	#define thrmthrs 2
402	#define thrmthre 8
403	#define thrmthrm 0x3F800000
404	#define thrmtid 29
405	#define thrmtidm 0x00000004
406	#define thrmtie 30
407	#define thrmtiem 0x00000002
408	#define thrmv 31
409	#define thrmvm 0x00000001
410
411	#define thrmsitvs 15
412	#define thrmsitve 30
413	#define thrmsitvm 0x0001FFFE
414	#define thrme 31
415	#define thrmem 0x00000001
416
417	#define ictcfib 23
418	#define ictcfie 30
419	#define ictcfim 0x000001FE
420	#define ictce 31
421	#define ictcem 0x00000001
422
423	#define cr0_lt 0
424	#define cr0_gt 1
425	#define cr0_eq 2
426	#define cr0_so 3
427	#define cr0_un 3
428	#define cr1_lt 4
429	#define cr1_gt 5
430	#define cr1_eq 6
431	#define cr1_so 7
432	#define cr1_un 7
433	#define cr2_lt 8
434	#define cr2_gt 9
435	#define cr2_eq 10
436	#define cr2_so 11
437	#define cr2_un 11
438	#define cr3_lt 12
439	#define cr3_gt 13
440	#define cr3_eq 14
441	#define cr3_so 15
442	#define cr3_un 15
443	#define cr4_lt 16
444	#define cr4_gt 17
445	#define cr4_eq 18
446	#define cr4_so 19
447	#define cr4_un 19
448	#define cr5_lt 20
449	#define cr5_gt 21
450	#define cr5_eq 22
451	#define cr5_so 23
452	#define cr5_un 23
453	#define cr6_lt 24
454	#define cr6_gt 25
455	#define cr6_eq 26
456	#define cr6_so 27
457	#define cr6_un 27
458	#define cr7_lt 28
459	#define cr7_gt 29
460	#define cr7_eq 30
461	#define cr7_so 31
462	#define cr7_un 31
463
464	/*
465	* Macros to access high and low word values of an address
466	*/
467
468	#define HIGH_CADDR(x) ha16(x)
469	#define HIGH_ADDR(x) hi16(x)
470	#define LOW_ADDR(x) lo16(x)
471
472	#endif /* ASSEMBLER */
473
474	/* Tags are placed before Immediately Following Code (IFC) for the debugger
475	* to be able to deduce where to find various registers when backtracing
476	*
477	* We only define the values as we use them, see SVR4 ABI PowerPc Supplement
478	* for more details (defined in ELF spec).
479	*/
480
481	#define TAG_NO_FRAME_USED 0x00000000
482
483	/* (should use genassym to get these offsets) */
484
485	#define FM_BACKPTR 0
486	#define FM_CR_SAVE 4
487	#define FM_LR_SAVE 8 /* MacOSX is NOT following the ABI at the moment.. */
488	#define FM_SIZE 64 /* minimum frame contents, backptr and LR save. Make sure it is quadaligned */
489	#define FM_ARG0 56
490	#define FM_ALIGN(l) ((l+15)&-16)
491	#define PK_SYSCALL_BEGIN 0x7000
492
493
494	/* redzone is the area under the stack pointer which must be preserved
495	* when taking a trap, interrupt etc.
496	*/
497	#define FM_REDZONE 224 /* is ((32-14+1)4) /
498
499	#define COPYIN_ARG0_OFFSET FM_ARG0
500
501	#ifdef MACH_KERNEL
502	#include <mach_kdb.h>
503	#else /* MACH_KERNEL */
504	#define MACH_KDB 0
505	#endif /* MACH_KERNEL */
506
507	#define BREAKPOINT_TRAP tw 4,r4,r4
508
509	/* There is another definition of ALIGN for .c sources */
510	#ifndef __LANGUAGE_ASSEMBLY
511	#define ALIGN 4
512	#endif /* __LANGUAGE_ASSEMBLY */
513
514	#ifndef FALIGN
515	#define FALIGN 4 /* Align functions on words for now. Cachelines is better */
516	#endif
517
518	#define LB(x,n) n
519	#if __STDC__
520	#define LCL(x) L ## x
521	#define EXT(x) _ ## x
522	#define LEXT(x) _ ## x ## :
523	#define LBc(x,n) n ## :
524	#define LBb(x,n) n ## b
525	#define LBf(x,n) n ## f
526	#else /* __STDC__ */
527	#define LCL(x) L/**/x
528	#define EXT(x) _/**/x
529	#define LEXT(x) _//x//:
530	#define LBc(x,n) n/**/:
531	#define LBb(x,n) n/**/b
532	#define LBf(x,n) n/**/f
533	#endif /* __STDC__ */
534
535	#define String .asciz
536	#define Value .word
537	#define Times(a,b) (a*b)
538	#define Divide(a,b) (a/b)
539
540	#define data16 .byte 0x66
541	#define addr16 .byte 0x67
542
543	#if !GPROF
544	#define MCOUNT
545	#endif /* GPROF */
546
547	#define ELF_FUNC(x)
548	#define ELF_DATA(x)
549	#define ELF_SIZE(x,s)
550
551	#define Entry(x,tag) .text@.align FALIGN@ .globl EXT(x)@ LEXT(x)
552	#define ENTRY(x,tag) Entry(x,tag)@MCOUNT
553	#define ENTRY2(x,y,tag) .text@ .align FALIGN@ .globl EXT(x)@ .globl EXT(y)@ \
554	LEXT(x)@ LEXT(y) @\
555	MCOUNT
556	#if __STDC__
557	#define ASENTRY(x) .globl x @ .align FALIGN; x ## @ MCOUNT
558	#else
559	#define ASENTRY(x) .globl x @ .align FALIGN; x @ MCOUNT
560	#endif /* __STDC__ */
561	#define DATA(x) .globl EXT(x) @ .align ALIGN @ LEXT(x)
562
563
564	#define End(x) ELF_SIZE(x,.-x)
565	#define END(x) End(EXT(x))
566	#define ENDDATA(x) END(x)
567	#define Enddata(x) End(x)
568
569	/* These defines are here for .c files that wish to reference global symbols
570	* within __asm__ statements.
571	*/
572	#define CC_SYM_PREFIX "_"
573
574	#endif /* _PPC_ASM_H_ */