[apple/xnu.git] / osfmk / ppc / misc_asm.s

/*
 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
 *
 * @APPLE_LICENSE_HEADER_START@
 * 
 * The contents of this file constitute Original Code as defined in and
 * are subject to the Apple Public Source License Version 1.1 (the
 * "License").  You may not use this file except in compliance with the
 * License.  Please obtain a copy of the License at
 * http://www.apple.com/publicsource and read it before using this file.
 * 
 * This Original Code and all software distributed under the License are
 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT.  Please see the
 * License for the specific language governing rights and limitations
 * under the License.
 * 
 * @APPLE_LICENSE_HEADER_END@
 */
/*
 * @OSF_COPYRIGHT@
 */

#include <mach_kdb.h>
#include <mach_kgdb.h>
#include <mach_debug.h>
#include <assym.s>
#include <ppc/asm.h>
#include <ppc/proc_reg.h>
#include <mach/ppc/vm_param.h>

/*
 * vm_offset_t getrpc(void) - Return address of the function
 *	                      that called the current function
 */

/* By using this function, we force the caller to save its LR in a known
 * location, which we can pick up and return. See PowerPC ELF specs.
 */
ENTRY(getrpc, TAG_NO_FRAME_USED)
	lwz	ARG0,	FM_BACKPTR(r1)		/* Load our backchain ptr */
	lwz	ARG0,	FM_LR_SAVE(ARG0)	/* Load previously saved LR */
	blr					/* And return */


/* Mask and unmask interrupts at the processor level */	
ENTRY(interrupt_disable, TAG_NO_FRAME_USED)
	mfmsr	r0
	rlwinm	r0,	r0,	0,	MSR_EE_BIT+1,	MSR_EE_BIT-1
	mtmsr	r0
	blr

ENTRY(interrupt_enable, TAG_NO_FRAME_USED)

	mfmsr	r0
	ori		r0,	r0,	MASK(MSR_EE)
	mtmsr	r0
	blr

#if	MACH_KDB
/*
 * Kernel debugger versions of the spl*() functions.  This allows breakpoints
 * in the spl*() functions.
 */

/* Mask and unmask interrupts at the processor level */	
ENTRY(db_interrupt_disable, TAG_NO_FRAME_USED)
	mfmsr	r0
	rlwinm	r0,	r0,	0,	MSR_EE_BIT+1,	MSR_EE_BIT-1
	mtmsr	r0
	blr

ENTRY(db_interrupt_enable, TAG_NO_FRAME_USED)
	mfmsr	r0
	ori	r0,	r0,	MASK(MSR_EE)
	mtmsr	r0
	blr
#endif	/* MACH_KDB */

/*
 *	General entry for all debuggers.  This gets us onto the debug stack and
 *	then back off at exit. We need to pass back R3 to caller.
 */
 
ENTRY(Call_Debugger, TAG_NO_FRAME_USED)

			mfmsr	r7				; Get the current MSR
			mflr	r0				; Save the return
			rlwinm	r7,r7,0,MSR_EE_BIT+1,MSR_EE_BIT-1	; Turn off interruptions
			mtmsr	r7				; Do it 
			mfsprg	r8,0			; Get the per_proc block
			stw		r0,FM_LR_SAVE(r1)	; Save return on current stack
			
			lwz		r9,PP_DEBSTACKPTR(r8)	; Get the debug stack
			cmpwi	r9,0			; Are we already on it?
			bne		cdNewDeb		; No...
		
			mr		r9,r1 			; We are already on the stack, so use the current value
			subi	r9,r9,FM_REDZONE+FM_SIZE	; Carve some extra space here
		
cdNewDeb:	li		r0,0			; Clear this out
			stw		r1,FM_ARG0(r9)	; Save the old stack pointer as if it were the first arg

			stw		r0,PP_DEBSTACKPTR(r8)	; Mark debug stack as busy
			
			subi	r1,r9,FM_SIZE	; Carve a new frame
			stw		r0,FM_BACKPTR(r1)	; Chain back
			
			bl		EXT(Call_DebuggerC)	; Call the "C" phase of this
		
			mfmsr	r0				; Get the MSR just in case it was enabled
			addi	r1,r1,FM_SIZE	; Pop off first stack frame
			rlwinm	r0,r0,0,MSR_EE_BIT+1,MSR_EE_BIT-1	; Turn off interruptions enable bit
			mtmsr	r0
		
			mfsprg	r8,0			; Get the per_proc block address
			
			lwz		r9,PP_DEBSTACK_TOP_SS(r8)	; Get the top of the stack
			cmplw	r1,r9			; Have we hit the bottom of the debug stack?
			lwz		r1,FM_ARG0(r1)	; Get previous stack frame
			lwz		r0,FM_LR_SAVE(r1)	; Get return address
			mtlr	r0				; Set the return point
			bnelr					; Return if still on debug stack

			stw		r9,PP_DEBSTACKPTR(r8)	; Mark debug stack as free		
			blr
 

/* The following routines are for C-support. They are usually
 * inlined into the C using the specifications in proc_reg.h,
 * but if optimisation is switched off, the inlining doesn't work
 */

ENTRY(get_got, TAG_NO_FRAME_USED)
	mr	ARG0,	r2
	blr
	
ENTRY(mflr, TAG_NO_FRAME_USED)
	mflr	ARG0
	blr

ENTRY(mfpvr, TAG_NO_FRAME_USED)
	mfpvr	ARG0
	blr

ENTRY(mtmsr, TAG_NO_FRAME_USED)
	mtmsr	ARG0
	isync
	blr

ENTRY(mfmsr, TAG_NO_FRAME_USED)
	mfmsr	ARG0
	blr

ENTRY(mtsrin, TAG_NO_FRAME_USED)
	isync
	mtsrin	ARG0,	ARG1
	isync
	blr

ENTRY(mfsrin, TAG_NO_FRAME_USED)
	mfsrin	ARG0,	ARG0
	blr

ENTRY(mtsdr1, TAG_NO_FRAME_USED)
	mtsdr1	ARG0
	blr

ENTRY(mtdar, TAG_NO_FRAME_USED)
	mtdar	ARG0
	blr

ENTRY(mfdar, TAG_NO_FRAME_USED)
	mfdar	ARG0
	blr

ENTRY(mtdec, TAG_NO_FRAME_USED)
	mtdec	ARG0
	blr

/* Decrementer frequency and realtime|timebase processor registers
 * are different between ppc601 and ppc603/4, we define them all.
 */

ENTRY(isync_mfdec, TAG_NO_FRAME_USED)
	isync
	mfdec	ARG0
	blr


ENTRY(mftb, TAG_NO_FRAME_USED)
	mftb	ARG0
	blr

ENTRY(mftbu, TAG_NO_FRAME_USED)
	mftbu	ARG0
	blr

ENTRY(mfrtcl, TAG_NO_FRAME_USED)
	mfspr	ARG0,	5
	blr

ENTRY(mfrtcu, TAG_NO_FRAME_USED)
	mfspr	ARG0,	4
	blr

ENTRY(tlbie, TAG_NO_FRAME_USED)
	tlbie	ARG0
	blr


/*
 * Performance Monitor Register Support
 */	

ENTRY(mfmmcr0, TAG_NO_FRAME_USED)	
	mfspr	r3,mmcr0
	blr

ENTRY(mtmmcr0, TAG_NO_FRAME_USED)
	mtspr	mmcr0,r3
	blr								

ENTRY(mfmmcr1, TAG_NO_FRAME_USED)
	mfspr	r3,mmcr1
	blr								

ENTRY(mtmmcr1, TAG_NO_FRAME_USED)
	mtspr	mmcr1,r3
	blr

ENTRY(mfmmcr2, TAG_NO_FRAME_USED)
	mfspr	r3,mmcr2
	blr								

ENTRY(mtmmcr2, TAG_NO_FRAME_USED)
	mtspr	mmcr2,r3
	blr

ENTRY(mfpmc1, TAG_NO_FRAME_USED)
	mfspr	r3,pmc1
	blr

ENTRY(mtpmc1, TAG_NO_FRAME_USED)
	mtspr	pmc1,r3
	blr								

ENTRY(mfpmc2, TAG_NO_FRAME_USED)
	mfspr	r3,pmc2
	blr

ENTRY(mtpmc2, TAG_NO_FRAME_USED)
	mtspr	pmc2,r3
	blr								

ENTRY(mfpmc3, TAG_NO_FRAME_USED)
	mfspr	r3,pmc3
	blr

ENTRY(mtpmc3, TAG_NO_FRAME_USED)
	mtspr	pmc3,r3
	blr								

ENTRY(mfpmc4, TAG_NO_FRAME_USED)
	mfspr	r3,pmc4
	blr

ENTRY(mtpmc4, TAG_NO_FRAME_USED)
	mtspr	pmc4,r3
	blr			
						
ENTRY(mfsia, TAG_NO_FRAME_USED)
	mfspr	r3,sia
	blr

ENTRY(mfsda, TAG_NO_FRAME_USED)
	mfspr	r3,sda
	blr
Commit	Line	Data
1c79356b A	1	/*
	2	* Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
	3	*
	4	* @APPLE_LICENSE_HEADER_START@
	5	*
	6	* The contents of this file constitute Original Code as defined in and
	7	* are subject to the Apple Public Source License Version 1.1 (the
	8	* "License"). You may not use this file except in compliance with the
	9	* License. Please obtain a copy of the License at
	10	* http://www.apple.com/publicsource and read it before using this file.
	11	*
	12	* This Original Code and all software distributed under the License are
	13	* distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
	14	* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
	15	* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
	17	* License for the specific language governing rights and limitations
	18	* under the License.
	19	*
	20	* @APPLE_LICENSE_HEADER_END@
	21	*/
	22	/*
	23	* @OSF_COPYRIGHT@
	24	*/
	25
	26	#include <mach_kdb.h>
	27	#include <mach_kgdb.h>
	28	#include <mach_debug.h>
	29	#include <assym.s>
	30	#include <ppc/asm.h>
	31	#include <ppc/proc_reg.h>
	32	#include <mach/ppc/vm_param.h>
	33
	34	/*
	35	* vm_offset_t getrpc(void) - Return address of the function
	36	* that called the current function
	37	*/
	38
	39	/* By using this function, we force the caller to save its LR in a known
	40	* location, which we can pick up and return. See PowerPC ELF specs.
	41	*/
	42	ENTRY(getrpc, TAG_NO_FRAME_USED)
	43	lwz ARG0, FM_BACKPTR(r1) /* Load our backchain ptr */
	44	lwz ARG0, FM_LR_SAVE(ARG0) /* Load previously saved LR */
	45	blr /* And return */
	46
	47
	48	/* Mask and unmask interrupts at the processor level */
	49	ENTRY(interrupt_disable, TAG_NO_FRAME_USED)
	50	mfmsr r0
	51	rlwinm r0, r0, 0, MSR_EE_BIT+1, MSR_EE_BIT-1
	52	mtmsr r0
	53	blr
	54
	55	ENTRY(interrupt_enable, TAG_NO_FRAME_USED)
	56
	57	mfmsr r0
	58	ori r0, r0, MASK(MSR_EE)
	59	mtmsr r0
	60	blr
	61
	62	#if MACH_KDB
	63	/*
	64	* Kernel debugger versions of the spl*() functions. This allows breakpoints
65	* in the spl*() functions.
66	*/
67
68	/* Mask and unmask interrupts at the processor level */
69	ENTRY(db_interrupt_disable, TAG_NO_FRAME_USED)
70	mfmsr r0
71	rlwinm r0, r0, 0, MSR_EE_BIT+1, MSR_EE_BIT-1
72	mtmsr r0
73	blr
74
75	ENTRY(db_interrupt_enable, TAG_NO_FRAME_USED)
76	mfmsr r0
77	ori r0, r0, MASK(MSR_EE)
78	mtmsr r0
79	blr
80	#endif /* MACH_KDB */
81
82	/*
83	* General entry for all debuggers. This gets us onto the debug stack and
84	* then back off at exit. We need to pass back R3 to caller.
85	*/
86
87	ENTRY(Call_Debugger, TAG_NO_FRAME_USED)
88
89	mfmsr r7 ; Get the current MSR
90	mflr r0 ; Save the return
91	rlwinm r7,r7,0,MSR_EE_BIT+1,MSR_EE_BIT-1 ; Turn off interruptions
92	mtmsr r7 ; Do it
93	mfsprg r8,0 ; Get the per_proc block
94	stw r0,FM_LR_SAVE(r1) ; Save return on current stack
95
96	lwz r9,PP_DEBSTACKPTR(r8) ; Get the debug stack
97	cmpwi r9,0 ; Are we already on it?
98	bne cdNewDeb ; No...
99
100	mr r9,r1 ; We are already on the stack, so use the current value
101	subi r9,r9,FM_REDZONE+FM_SIZE ; Carve some extra space here
102
103	cdNewDeb: li r0,0 ; Clear this out
104	stw r1,FM_ARG0(r9) ; Save the old stack pointer as if it were the first arg
105
106	stw r0,PP_DEBSTACKPTR(r8) ; Mark debug stack as busy
107
108	subi r1,r9,FM_SIZE ; Carve a new frame
109	stw r0,FM_BACKPTR(r1) ; Chain back
110
111	bl EXT(Call_DebuggerC) ; Call the "C" phase of this
112
113	mfmsr r0 ; Get the MSR just in case it was enabled
114	addi r1,r1,FM_SIZE ; Pop off first stack frame
115	rlwinm r0,r0,0,MSR_EE_BIT+1,MSR_EE_BIT-1 ; Turn off interruptions enable bit
116	mtmsr r0
117
118	mfsprg r8,0 ; Get the per_proc block address
119
120	lwz r9,PP_DEBSTACK_TOP_SS(r8) ; Get the top of the stack
121	cmplw r1,r9 ; Have we hit the bottom of the debug stack?
122	lwz r1,FM_ARG0(r1) ; Get previous stack frame
123	lwz r0,FM_LR_SAVE(r1) ; Get return address
124	mtlr r0 ; Set the return point
125	bnelr ; Return if still on debug stack
126
127	stw r9,PP_DEBSTACKPTR(r8) ; Mark debug stack as free
128	blr
129
130
131	/* The following routines are for C-support. They are usually
132	* inlined into the C using the specifications in proc_reg.h,
133	* but if optimisation is switched off, the inlining doesn't work
134	*/
135
136	ENTRY(get_got, TAG_NO_FRAME_USED)
137	mr ARG0, r2
138	blr
139
140	ENTRY(mflr, TAG_NO_FRAME_USED)
141	mflr ARG0
142	blr
143
144	ENTRY(mfpvr, TAG_NO_FRAME_USED)
145	mfpvr ARG0
146	blr
147
148	ENTRY(mtmsr, TAG_NO_FRAME_USED)
149	mtmsr ARG0
150	isync
151	blr
152
153	ENTRY(mfmsr, TAG_NO_FRAME_USED)
154	mfmsr ARG0
155	blr
156
157	ENTRY(mtsrin, TAG_NO_FRAME_USED)
158	isync
159	mtsrin ARG0, ARG1
160	isync
161	blr
162
163	ENTRY(mfsrin, TAG_NO_FRAME_USED)
164	mfsrin ARG0, ARG0
165	blr
166
167	ENTRY(mtsdr1, TAG_NO_FRAME_USED)
168	mtsdr1 ARG0
169	blr
170
171	ENTRY(mtdar, TAG_NO_FRAME_USED)
172	mtdar ARG0
173	blr
174
175	ENTRY(mfdar, TAG_NO_FRAME_USED)
176	mfdar ARG0
177	blr
178
179	ENTRY(mtdec, TAG_NO_FRAME_USED)
180	mtdec ARG0
181	blr
182
183	/* Decrementer frequency and realtime\|timebase processor registers
184	* are different between ppc601 and ppc603/4, we define them all.
185	*/
186
187	ENTRY(isync_mfdec, TAG_NO_FRAME_USED)
188	isync
189	mfdec ARG0
190	blr
191
192
193	ENTRY(mftb, TAG_NO_FRAME_USED)
194	mftb ARG0
195	blr
196
197	ENTRY(mftbu, TAG_NO_FRAME_USED)
198	mftbu ARG0
199	blr
200
201	ENTRY(mfrtcl, TAG_NO_FRAME_USED)
202	mfspr ARG0, 5
203	blr
204
205	ENTRY(mfrtcu, TAG_NO_FRAME_USED)
206	mfspr ARG0, 4
207	blr
208
209	ENTRY(tlbie, TAG_NO_FRAME_USED)
210	tlbie ARG0
211	blr
212
213
214	/*
215	* Performance Monitor Register Support
216	*/
217
218	ENTRY(mfmmcr0, TAG_NO_FRAME_USED)
219	mfspr r3,mmcr0
220	blr
221
222	ENTRY(mtmmcr0, TAG_NO_FRAME_USED)
223	mtspr mmcr0,r3
224	blr
225
226	ENTRY(mfmmcr1, TAG_NO_FRAME_USED)
227	mfspr r3,mmcr1
228	blr
229
230	ENTRY(mtmmcr1, TAG_NO_FRAME_USED)
231	mtspr mmcr1,r3
232	blr
233
234	ENTRY(mfmmcr2, TAG_NO_FRAME_USED)
235	mfspr r3,mmcr2
236	blr
237
238	ENTRY(mtmmcr2, TAG_NO_FRAME_USED)
239	mtspr mmcr2,r3
240	blr
241
242	ENTRY(mfpmc1, TAG_NO_FRAME_USED)
243	mfspr r3,pmc1
244	blr
245
246	ENTRY(mtpmc1, TAG_NO_FRAME_USED)
247	mtspr pmc1,r3
248	blr
249
250	ENTRY(mfpmc2, TAG_NO_FRAME_USED)
251	mfspr r3,pmc2
252	blr
253
254	ENTRY(mtpmc2, TAG_NO_FRAME_USED)
255	mtspr pmc2,r3
256	blr
257
258	ENTRY(mfpmc3, TAG_NO_FRAME_USED)
259	mfspr r3,pmc3
260	blr
261
262	ENTRY(mtpmc3, TAG_NO_FRAME_USED)
263	mtspr pmc3,r3
264	blr
265
266	ENTRY(mfpmc4, TAG_NO_FRAME_USED)
267	mfspr r3,pmc4
268	blr
269
270	ENTRY(mtpmc4, TAG_NO_FRAME_USED)
271	mtspr pmc4,r3
272	blr
273
274	ENTRY(mfsia, TAG_NO_FRAME_USED)
275	mfspr r3,sia
276	blr
277
278	ENTRY(mfsda, TAG_NO_FRAME_USED)
279	mfspr r3,sda
280	blr
281