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1/*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_LICENSE_HEADER_START@
5 *
6 * The contents of this file constitute Original Code as defined in and
7 * are subject to the Apple Public Source License Version 1.1 (the
8 * "License"). You may not use this file except in compliance with the
9 * License. Please obtain a copy of the License at
10 * http://www.apple.com/publicsource and read it before using this file.
11 *
12 * This Original Code and all software distributed under the License are
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
17 * License for the specific language governing rights and limitations
18 * under the License.
19 *
20 * @APPLE_LICENSE_HEADER_END@
21 */
22/*
23 * @OSF_FREE_COPYRIGHT@
24 */
25/*
26 * @APPLE_FREE_COPYRIGHT@
27 */
28
29/*
30 * Author: Bill Angell, Apple
31 * Date: 9/auht-aught
32 *
33 * Random diagnostics
34 */
35
36
37#include <kern/machine.h>
38#include <kern/processor.h>
39#include <mach/machine.h>
40#include <mach/processor_info.h>
41#include <mach/mach_types.h>
42#include <mach/boolean.h>
43#include <kern/thread.h>
44#include <kern/task.h>
45#include <mach/vm_param.h>
46#include <vm/vm_kern.h>
47#include <vm/vm_map.h>
48#include <vm/vm_page.h>
49#include <vm/pmap.h>
50#include <ppc/exception.h>
51#include <ppc/Firmware.h>
52#include <ppc/low_trace.h>
53#include <ppc/db_low_trace.h>
54#include <ppc/mappings.h>
55#include <ppc/pmap.h>
56#include <ppc/mem.h>
57#include <ppc/pmap_internals.h>
58#include <ppc/savearea.h>
59#include <ppc/Diagnostics.h>
60#include <ppc/machine_cpu.h>
61#include <pexpert/pexpert.h>
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62#include <ppc/POWERMAC/video_console.h>
63
64extern struct vc_info vinfo;
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65
66int diagCall(struct savearea *save) {
67
68 union {
69 unsigned long long tbase;
70 unsigned int tb[2];
71 } ttt, adj;
72 natural_t tbu, tbu2, tbl;
73 struct per_proc_info *per_proc; /* Area for my per_proc address */
74 int cpu;
0b4e3aa0 75 unsigned int tstrt, tend;
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76
77 if(!(dgWork.dgFlags & enaDiagSCs)) return 0; /* If not enabled, cause an exception */
78
79 switch(save->save_r3) { /* Select the routine */
80
81/*
82 * Adjust the timebase for drift recovery testing
83 */
84 case dgAdjTB: /* Adjust the timebase */
85
86 adj.tb[0] = 0; /* Clear high part */
87 adj.tb[1] = save->save_r4; /* Set low order */
88 if(adj.tb[1] & 0x80000000) adj.tb[0] = 0xFFFFFFFF; /* Propagate sign bit */
89
90 do { /* Read current time */
91 asm volatile(" mftbu %0" : "=r" (tbu));
92 asm volatile(" mftb %0" : "=r" (tbl));
93 asm volatile(" mftbu %0" : "=r" (tbu2));
94 } while (tbu != tbu2);
95
96 ttt.tb[0] = tbu; /* Set high */
97 ttt.tb[1] = tbl; /* Set low */
98
99 ttt.tbase = ttt.tbase + adj.tbase; /* Increment or decrement the TB */
100
101 tbu = ttt.tb[0]; /* Save in regular variable */
102 tbl = ttt.tb[1]; /* Save in regular variable */
103
104 mttb(0); /* Set low to keep from ticking */
105 mttbu(tbu); /* Set adjusted high */
106 mttb(tbl); /* Set adjusted low */
107
108 return -1; /* Return no AST checking... */
109
110/*
111 * Return physical address of a page
112 */
113 case dgLRA:
114
115 save->save_r3 = pmap_extract(current_act()->map->pmap, save->save_r4); /* Get read address */
116
117 return -1; /* Return no AST checking... */
118
119/*
120 * Copy physical to virtual
121 */
122 case dgpcpy:
123
124#if 0
125 save->save_r3 = copyp2v(save->save_r4, save->save_r5, save->save_r6); /* Copy the physical page */
126#endif
127 return 1; /* Return and check for ASTs... */
128
129
130/*
131 * Soft reset processor
132 */
133 case dgreset:
134
135 cpu = save->save_r4; /* Get the requested CPU number */
136
137 if(cpu >= NCPUS) { /* Check for bogus cpu */
138 save->save_r3 = KERN_FAILURE; /* Set failure */
139 return 1;
140 }
141
142 if(!machine_slot[cpu].running) return KERN_FAILURE; /* It is not running */
143
144 per_proc = &per_proc_info[cpu]; /* Point to the processor */
145
146 (void)PE_cpu_start(per_proc->cpu_id,
147 per_proc->start_paddr, (vm_offset_t)per_proc);
148
149 save->save_r3 = KERN_SUCCESS; /* Set scuuess */
150
151 return 1; /* Return and check for ASTs... */
152
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153/*
154 * Force cache flush
155 */
156 case dgflush:
157
158#if 1
159 cacheInit(); /* Blow cache */
160#else
161 asm volatile(" mftb %0" : "=r" (tstrt));
162 tend = tstrt;
163 while((tend - tstrt) < 0x000A2837) {
164 asm volatile(" mftb %0" : "=r" (tend));
165 }
166
167#endif
168 return 1; /* Return and check for ASTs... */
169
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170/*
171 * various hack tests
172 */
173 case dgtest:
174
175 pmap_remove(kernel_pmap, save->save_r4, save->save_r4 + 4096);
176
177 return 1; /* Return and check for ASTs... */
178
179
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180
181/*
182 * Create a physical block map into the current task
183 * Don't bother to check for any errors.
184 * parms - vaddr, paddr, size, prot, attributes
185 */
186 case dgBMphys:
187
188 pmap_map_block(current_act()->map->pmap, save->save_r4, save->save_r5, save->save_r6, /* Map in the block */
189 save->save_r7, save->save_r8, 0);
190
191 return 1; /* Return and check for ASTs... */
192
193
194/*
195 * Remove any mapping from the current task
196 * Don't bother to check for any errors.
197 * parms - vaddr
198 */
199 case dgUnMap:
200
201 (void)mapping_remove(current_act()->map->pmap, save->save_r4); /* Remove mapping */
202 return 1; /* Return and check for ASTs... */
203
204/*
205 * Return info for boot screen
206 */
207 case dgBootScreen:
208
209#if 0
210 ml_set_interrupts_enabled(1);
211 (void)copyout((char *)&vinfo, (char *)save->save_r4, sizeof(struct vc_info)); /* Copy out the video info */
212 ml_set_interrupts_enabled(0);
213#endif
214 return 1; /* Return and check for ASTs... */
215
216
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217 default: /* Handle invalid ones */
218 return 0; /* Return an exception */
219
220 };
221
222}